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1. 发明授权

US06793500B1 Radial contact pad footprint and wiring for electrical components 失效
标题翻译：径向接触焊盘尺寸和电气元件接线
公开(公告)号：US06793500B1
公开(公告)日：2004-09-21
申请号：US10666607
申请日：2003-09-18
申请人： Timothy W. Budell , Esmaeil Rahmati , David B. Stone , Jerzy M. Zalesinski
发明人： Timothy W. Budell , Esmaeil Rahmati , David B. Stone , Jerzy M. Zalesinski
IPC分类号： H01R1200
CPC分类号： H01L23/50 , H01L23/49838 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/15312 , H05K1/0224 , H05K1/111 , H05K2201/09227 , H05K2201/093 , H05K2201/09418 , H05K2201/09681 , Y02P70/611 , H01L2224/05599
摘要： A structure and associated method comprising contact pads on a surface of a substrate for coupling signal, power, and ground connections for an electrical device to a plurality of conductive wires on the substrate. The contact pads are formed in single lines along radial edges of sectors on the substrate. Each of the sectors comprise a predetermined angle between the radial edges of each of the sectors. The plurality of sectors collectively form a circular area. The contact pads comprise signal, power, and ground connections located at predetermined positions on the single lines along the radial edges of each of the sectors on the substrate.
摘要翻译：一种结构和相关方法，包括在衬底的表面上的接触焊盘，用于将用于电气设备的信号，功率和接地连接耦合到衬底上的多个导电线。接触焊盘沿着衬底上的扇区的沿边缘沿单条线形成。每个扇区在每个扇区的径向边缘之间包括预定角度。多个扇区共同形成圆形区域。接触焊盘包括沿着衬底上每个扇区的径向边缘位于单个线上的预定位置处的信号，功率和接地连接。

2. 发明授权

US07196908B2 Dual pitch contact pad footprint for flip-chip chips and modules 失效
标题翻译：用于倒装芯片和模块的双音高接触焊盘尺寸
公开(公告)号：US07196908B2
公开(公告)日：2007-03-27
申请号：US10455982
申请日：2003-06-05
申请人： Timothy W. Budell , David B. Stone , Jerzy M. Zalesinski
发明人： Timothy W. Budell , David B. Stone , Jerzy M. Zalesinski
IPC分类号： H05K7/10
CPC分类号： H01L23/49838 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2924/00014 , H01L2924/15174 , H01L2924/15312 , H05K1/111 , H05K2201/09227 , H05K2201/10674 , Y02P70/611 , H01L2224/05599
摘要： An electronic device, including: a plurality of contacts pads on a surface of a substrate; the contacts pads spaced apart a first predetermined distance in a first direction; and the contact pads spaced apart a second predetermined distance in a second direction, the first predetermined distance different from the second predetermined distance, the first direction perpendicular to the second direction.
摘要翻译：一种电子设备，包括：在基板的表面上的多个接触焊盘; 所述接触垫在第一方向上间隔开第一预定距离; 并且所述接触垫在第二方向上间隔开第二预定距离，所述第一预定距离不同于所述第二预定距离，所述第一方向垂直于所述第二方向。

3. 发明授权

US06177729B1 Rolling ball connector 失效
标题翻译：滚球连接器
公开(公告)号：US06177729B1
公开(公告)日：2001-01-23
申请号：US09303290
申请日：1999-04-03
申请人： Joseph A. Benenati , Claude L. Bertin , William T. Chen , Thomas E. Dinan , Wayne F. Ellis , Wayne J. Howell , John U. Knickerbocker , Mark V. Pierson , William R. Tonti , Jerzy M. Zalesinski
发明人： Joseph A. Benenati , Claude L. Bertin , William T. Chen , Thomas E. Dinan , Wayne F. Ellis , Wayne J. Howell , John U. Knickerbocker , Mark V. Pierson , William R. Tonti , Jerzy M. Zalesinski
IPC分类号： H01L2348
CPC分类号： H01L24/16 , G01R1/0483 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/83 , H01L2224/05147 , H01L2224/05155 , H01L2224/05568 , H01L2224/05573 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/11003 , H01L2224/11334 , H01L2224/13099 , H01L2224/13111 , H01L2224/1319 , H01L2224/17051 , H01L2224/2919 , H01L2224/8319 , H01L2224/838 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/14 , H01L2924/15787 , H01L2924/3025 , H01L2924/351 , H05K1/111 , H05K3/321 , H05K2201/0133 , H05K2201/0212 , H05K2201/0221 , H05K2201/0233 , H05K2201/10234 , H05K2201/10734 , H05K2201/10992 , H05K2203/0307 , Y10T428/12472 , H01L2924/00 , H01L2924/3512 , H01L2924/00014
摘要： An integrated circuit assembly has pads of a chip electrically connected to pads of a substrate with rolling metal balls. A pliable material bonds the balls in movable contact with pads of the chip and substrate. Because the balls are relatively free to move, thermal expansion differences that would ordinarily cause enormous stresses in the attached joints of the prior art, simply cause rolling of the balls of the present invention, avoiding thermal stress altogether. Reliability of the connections is substantially improved as compared with C4 solder bumps, and chips can be safely directly mounted to such substrates as PC boards, despite substantial thermal mismatch.
摘要翻译：集成电路组件具有与滚动金属球电连接到衬底的焊盘的芯片焊盘。柔韧的材料将球与芯片和衬底的焊盘可动地接触。由于球相对自由移动，因此在现有技术的连接接头中通常会引起巨大应力的热膨胀差异简单地导致本发明的滚珠滚动，从而完全避免热应力。与C4焊料凸块相比，连接的可靠性大大提高，尽管存在大量的热失配，芯片可以安全地直接安装到诸如PC板的基板上。

4. 发明授权

US5747101A Direct chip attachment (DCA) with electrically conductive adhesives 失效
公开(公告)号：US5747101A
公开(公告)日：1998-05-05
申请号：US630033
申请日：1996-04-09
申请人： Richard B. Booth , Michael A. Gaynes , Robert M. Murcko , Viswanadham Puligandla , Judith M. Roldan , Ravi Saraf , Jerzy M. Zalesinski
发明人： Richard B. Booth , Michael A. Gaynes , Robert M. Murcko , Viswanadham Puligandla , Judith M. Roldan , Ravi Saraf , Jerzy M. Zalesinski
IPC分类号： H01L21/56 , H01L21/60 , H01L23/485 , H01R4/04 , B05D5/12
CPC分类号： H01L24/10 , H01L21/563 , H01L24/13 , H01L24/27 , H01L24/28 , H01L24/83 , H01L2224/13 , H01L2224/13099 , H01L2224/1319 , H01L2224/16 , H01L2224/274 , H01L2224/73104 , H01L2224/73203 , H01L2224/8319 , H01L2224/838 , H01L2224/90 , H01L24/90 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/0781 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , Y10T29/49204 , Y10T29/49222
摘要： A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives. Two methods create the same intermediate wafer product with a layer of insulative thermoplastic and conductive thermoplastic bumps. After sawing or dicing the wafer to form the chips, the chips are adhered to chip carriers with conductive pads which match the conductive thermoplastic bumps, using heat and pressure. Chips may be easily removed and replaced using heat.

5. 发明授权

US06212076B1 Enhanced heat-dissipating printed circuit board package 失效
标题翻译：增强散热印刷电路板封装
公开(公告)号：US06212076B1
公开(公告)日：2001-04-03
申请号：US09259809
申请日：1999-02-26
申请人： Stephen W. MacQuarrie , Randall J. Stutzman , Jerzy M. Zalesinski
发明人： Stephen W. MacQuarrie , Randall J. Stutzman , Jerzy M. Zalesinski
IPC分类号： H05K720
CPC分类号： H05K1/0209 , H05K1/0206 , H05K1/0207 , H05K1/189 , H05K3/429 , H05K3/4691 , H05K2201/066 , H05K2201/09354 , H05K2201/09781 , H05K2201/10159 , H05K2201/10689
摘要： A printed circuit board is provided comprising a substrate, a conductor on the surface of the substrate, and an electronic component mounted on the conductor. The printed circuit board includes a first thermally conductive layer within the substrate and a second thermally conductive layer on a portion of the surface of the substrate and spaced from the electronic component. The electronic component is thermally coupled to the second thermally conductive layer by a thermally conductive aperture positioned within the substrate and connected to the conductor and the first thermally conductive layer. The first thermally conductive layer is connected to the second thermally conductive layer by a plurality of apertures also positioned in the substrate. Another printed circuit board is also provided comprising a first plurality of laminate dielectric layers, a conductor on a surface of the first plurality of laminated dielectric layers, and an electronic component mounted on the conductor. The printed circuit board includes a second plurality of laminated dielectric layers connected to the first plurality of laminated dielectric layers by a flexible web. The flexible web includes a first thermally conductive layer positioned within the first plurality of dielectric layers. A thermally conductive aperture thermally connects the electronic component to the first thermally conductive layer. A plurality of thermally conductive apertures is positioned within the second plurality of dielectric layers and thermally couples the first thermally conductive layer to a second thermally conductive layer which is included on a portion of a surface of the second plurality of dielectric layers and spaced from the electronic component. The flexible web portion thus allows positioning of the second thermally conductive layer in a plane remote from the electronic component when it is positioned in a confined space.
摘要翻译：提供一种印刷电路板，包括基板，基板表面上的导体和安装在导体上的电子部件。印刷电路板包括衬底内的第一导热层和在衬底的表面的一部分上并与电子部件隔开的第二导热层。电子部件通过定位在衬底内并连接到导体和第一导热层的导热孔热耦合到第二导热层。第一导热层通过也位于基板中的多个孔连接到第二导热层。还提供了另一印刷电路板，其包括第一多个叠层电介质层，在第一多个叠层电介质层的表面上的导体和安装在导体上的电子部件。印刷电路板包括通过柔性网连接到第一多个叠层电介质层的第二多个叠层电介质层。柔性幅材包括位于第一多个电介质层内的第一导热层。导热孔将电子部件热连接到第一导热层。多个导热孔定位在第二多个介电层内并且将第一导热层热耦合到第二导热层，第二导热层包括在第二多个电介质层的表面的一部分上并与电子零件。柔性腹板部分因此允许第二导热层在位于密闭空间中时远离电子部件的平面定位。

6. 发明授权

US5729052A Integrated ULSI heatsink 失效
标题翻译：集成ULSI散热器
公开(公告)号：US5729052A
公开(公告)日：1998-03-17
申请号：US667210
申请日：1996-06-20
申请人： William R. Tonti , Jack A. Mandelman , Jerzy M. Zalesinski , Toshiharu Furukawa , Son V. Nguyen , Dureseti Chidambarrao
发明人： William R. Tonti , Jack A. Mandelman , Jerzy M. Zalesinski , Toshiharu Furukawa , Son V. Nguyen , Dureseti Chidambarrao
IPC分类号： H01L21/60 , H01L23/367 , H01L29/06 , H01L29/34 , H01L23/34
CPC分类号： H01L24/27 , H01L23/367 , H01L24/32 , H01L24/83 , H01L29/0657 , H01L29/34 , H01L2224/03505 , H01L2224/04026 , H01L2224/16225 , H01L2224/16227 , H01L2224/32057 , H01L2224/32059 , H01L2224/48091 , H01L2224/48247 , H01L2224/73253 , H01L2224/8319 , H01L2224/83385 , H01L2224/83801 , H01L24/48 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10158 , H01L2924/10253 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15312 , H01L2924/16152 , H01L2924/181 , Y10S438/928 , Y10S438/964
摘要： A simple and low cost ULSI integrated heatsink more efficiently removes heat from a silicon package by integrating the heat sink material into the silicon die, transforming the present two-dimensional art into three dimensions. The fabrication of a high power integrated ULSI package and heatsink begins by fabricating an integrated circuit wafer up to the point of dicing the wafer into individual chips. The front side of the wafer is protected, while the backside of the wafer is exposed. The exposed backside is roughened by chemical and/or mechanical process. Optionally, a gettering process is then performed to remove impurities. The roughened backside is then coated with metal interlayers, preferably aluminum (Al) followed by chromium (Cr). A layer of copper (Cu) is optionally coated on the metal interlayers. A highly conductive reflowable material, such as solder or gold eutectic, is deposited on the metal interlayers. At this point, the wafer is diced to form chips. The heatsink itself is prepared by first optionally roughening the surface and metalizing the backside of the heatsink with metal interlayer. Next, the chip is thermally attached to the heatsink by reflowing the thermally conductive reflowable material.
摘要翻译：简单且低成本的ULSI集成散热器通过将散热材料集成到硅晶片中更有效地从硅封装中去除热量，将现有的二维技术转化为三维。高功率集成ULSI封装和散热器的制造开始于制造集成电路晶片，直到将晶片切割成单个芯片。晶片的正面受到保护，而晶片的背面露出。暴露的背面通过化学和/或机械过程粗糙化。任选地，然后执行吸气过程以除去杂质。然后将粗糙的背面涂覆有金属中间层，优选铝（Al），随后涂覆铬（Cr）。一层铜（Cu）任选地涂覆在金属夹层上。高度导电的可回流材料，例如焊料或金共晶，沉积在金属夹层上。此时，晶片被切割成芯片。散热器本身通过首先任选地使表面粗糙化并用金属中间层金属化散热器的背面来制备。接下来，通过回流导热的可回流材料将芯片热连接到散热器。

7. 发明授权

US06816374B2 High efficiency heat sink/air cooler system for heat-generating components 失效
标题翻译：用于发热部件的高效散热器/空气冷却器系统
公开(公告)号：US06816374B2
公开(公告)日：2004-11-09
申请号：US10397028
申请日：2003-03-25
申请人： Janak G. Patel , Jerzy M. Zalesinski
发明人： Janak G. Patel , Jerzy M. Zalesinski
IPC分类号： H05K720
CPC分类号： G06F1/20 , H01L23/4332 , H01L23/467 , H01L2924/0002 , H01L2924/00
摘要： A high efficiency two-part heat sink and air cooler apparatus or system for heat generating components, such as CPUs (central processing units) or the like electronic components. Moreover, there is also provided to a method of providing a high-efficiency heat sink and air cooling for the cooling of electronic components such as CPU units for processors, computers and diverse heat-generating devices.
摘要翻译：用于诸如CPU（中央处理单元）等的热产生部件的高效率两部分散热器和空气冷却器装置或系统等电子部件。此外，还提供了一种提供用于处理器，计算机和各种发热装置的诸如CPU单元的电子部件的冷却的高效率散热器和空气冷却的方法。

8. 发明授权

US5663806A Non-destructive target marking for image stitching 失效
标题翻译：用于图像拼接的非破坏性目标标记
公开(公告)号：US5663806A
公开(公告)日：1997-09-02
申请号：US538542
申请日：1995-10-03
申请人： Gary Grise , Jerzy M. Zalesinski
发明人： Gary Grise , Jerzy M. Zalesinski
IPC分类号： H04N1/04 , G06T1/00 , H04N1/047 , H04N1/12 , H04N1/191 , H04N1/10 , H04N1/053
CPC分类号： H04N1/128 , H04N1/047 , H04N1/12 , H04N1/1911 , H04N2201/04729
摘要： A scanner using a small, inexpensive CCD array for accurately and easily re-creating an error free reproduction of any scanned image wherein a plurality of laser alignment marks are temporarily projected, from an inexpensive solid state laser via a low cost plastic fiber optic cable, onto the surface of the document, and capturing the image as a number of small segments, along both the horizontal and vertical dimensions of the document onto the surface of the image being scanned. These temporary, projected, alignment marks permit the accurate positioning of adjacent, scanned segments during reconstruction of the scanned document. This scanner can scan documents of any width with an accuracy such that the scanned document can be readily, easily and accurately reassembled regardless of the insensitivity of, or misalignment of the scanning array in the apparatus or the skew of the document relative to the camera doing the scanning.
摘要翻译：一种使用小型便宜的CCD阵列的扫描器，用于通过低成本塑料光缆从廉价的固体激光器准确且容易地重新创建其中暂时投射多个激光对准标记的任何扫描图像的无错误再现，并将文档的水平和垂直尺寸沿着正在扫描的图像的表面上沿数个小段捕获。这些临时的，投影的对准标记允许在扫描的文件重建期间相邻的被扫描的段的精确定位。该扫描仪可以以精确度扫描任何宽度的文档，使得扫描的文档可以容易，容易和准确地重新组装，而不管扫描阵列在设备中的不敏感性或不对准，或者文档相对于相机的倾斜。扫描。

9. 发明授权

US5567984A Process for fabricating an electronic circuit package 失效
标题翻译：电子电路封装的制造工艺
公开(公告)号：US5567984A
公开(公告)日：1996-10-22
申请号：US468313
申请日：1995-06-06
申请人： Jerzy M. Zalesinski , Alan J. Emerick
发明人： Jerzy M. Zalesinski , Alan J. Emerick
IPC分类号： H01L23/498 , H05K3/30 , H01L23/48 , H01L23/04
CPC分类号： H01L23/49861 , H01L2924/0002 , H05K3/306
摘要： An electronic circuit package is fabricated by providing a substrate having attached to at least one of its major surfaces, at least one integrated circuit chip; and providing a carrier that comprises a polymeric composition. The carrier holds a desired array of conductive pins, which protrude from both major surfaces of the carrier. The substrate is placed in contact with the pins to provide a subassembly.
摘要翻译：电子电路封装通过提供连接到其主要表面中的至少一个的衬底，至少一个集成电路芯片来制造; 并提供包含聚合物组合物的载体。载体保持从载体的两个主表面突出的所需阵列的导电针。将基板放置成与销接触以提供子组件。

10. 发明授权

US07394268B2 Carrier for test, burn-in, and first level packaging 失效
标题翻译：用于测试，老化和一级包装的载体
公开(公告)号：US07394268B2
公开(公告)日：2008-07-01
申请号：US11531140
申请日：2006-09-12
申请人： Claude L. Bertin , Wayne F. Ellis , Mark W. Kellogg , William R. Tonti , Jerzy M. Zalesinski , James M. Leas , Wayne J. Howell
发明人： Claude L. Bertin , Wayne F. Ellis , Mark W. Kellogg , William R. Tonti , Jerzy M. Zalesinski , James M. Leas , Wayne J. Howell
IPC分类号： G01R31/02
CPC分类号： G01R31/2867 , G11C5/04 , G11C29/06 , G11C29/1201 , G11C29/48 , G11C29/56016 , G11C29/785 , G11C2029/2602 , G11C2029/5602 , H01L22/22 , H01L22/32 , H01L2924/0002 , H01L2924/00
摘要： A plurality of semiconductor devices are provided on a carrier for testing or burning-in. The carrier is then cut up to provide single chip-on-carrier components or multi-chip-on-carrier components. The carrier is used as a first level package for each chip. Thus, the carrier serves a dual purpose for test and burn-in and for packaging. A lead reduction mechanism, such as a built-in self-test engine, can be provided on each chip or on the carrier and is connected to contacts of the carrier for the testing and burn-in steps. The final package after cutting includes at least one known good die and may include an array of chips on the carrier, such as a SIMM or a DIMM. The final package can also be a stack of chips each mounted on a separate carrier. The carriers of the stack are connected to each other through a substrate mounted along a side face of the stack that is electrically connected to a line of pads along an edge of each carrier.
摘要翻译：在载体上提供多个半导体器件用于测试或烧录。然后将载体切割以提供单个芯片上载波部件或多芯片载波部件。载体用作每个芯片的第一级封装。因此，载体用于测试和烧录和包装的双重目的。可以在每个芯片或载体上提供诸如内置自检引擎的引线减少机构，并且连接到载体的触点用于测试和老化步骤。切割后的最终包装包括至少一个已知的良好的模具，并且可以包括载体上的芯片阵列，例如SIMM或DIMM。最终的包装也可以是一堆芯片，每个芯片都安装在单独的载体上。堆叠的载体通过沿着堆叠的侧面安装的基板彼此连接，该基板沿着每个载体的边缘电连接到焊盘一排。

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