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1. 发明授权

US06777789B1 Mounting for a package containing a chip 失效
标题翻译：安装一个包含芯片的包装
公开(公告)号：US06777789B1
公开(公告)日：2004-08-17
申请号：US10340256
申请日：2003-01-10
申请人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
IPC分类号： H01L23495
CPC分类号： H05K1/182 , H01L23/5389 , H01L24/45 , H01L24/48 , H01L2224/32145 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/73265 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.
摘要翻译：公开了一种用于包含半导体芯片的封装的安装件，以及制造这种安装的方法。安装件包括具有其上具有导电迹线的安装表面的基板和延伸穿过基板的孔。该包装包括底座，例如引线框或层压板，以及输入/输出端子。芯片位于基座的第一侧，并与输入/输出端子电连接（直接或间接）。在芯片上的基座的第一侧上提供可以是模制密封剂的盖。封装被安装在基板上，使得帽位于孔中，并且基座的第一侧的周边部分在安装表面上方，以便将封装支撑在孔中，并且允许端子的输入/输出端子包装与安装表面的电路图案并列。因为盖在孔内，所以在安装表面上方的包装的高度被最小化。

2. 发明授权

US06528875B1 Vacuum sealed package for semiconductor chip 有权
标题翻译：用于半导体芯片的真空密封封装
公开(公告)号：US06528875B1
公开(公告)日：2003-03-04
申请号：US09839305
申请日：2001-04-20
申请人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
发明人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
IPC分类号： H01L2312
CPC分类号： B81B7/007 , B81B2207/096 , H01L23/10 , H01L23/13 , H01L24/48 , H01L24/49 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/85399 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/16152 , H01L2924/16195 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A vacuum sealed package for a semiconductor chip, such as a micro-electromechanical (MEM) chip, is disclosed, along with a method of making such a package. In an exemplary embodiment, the package includes a ceramic substrate and a lid that together define a cavity wherein the chip is mounted. The substrate includes a conductive (e.g., metal) interconnect pattern that extends, at least in part, vertically through the substrate. I/O terminals are provided on an external surface of the substrate. A vent hole, at least partially lined with a metal coating, extends through the substrate into the cavity. A metal plug seals the vent hole. The vent hole is sealed by placing the package in a vacuum chamber, evacuating the chamber, and heating the chamber so as to cause a metal preform on the substrate to flow into the vent hole and form the plug.
摘要翻译：公开了一种用于诸如微机电（MEM）芯片的半导体芯片的真空密封封装以及制造这种封装的方法。在示例性实施例中，封装包括陶瓷基板和盖，其一起限定其中安装芯片的空腔。衬底包括至少部分地垂直延伸穿过衬底的导电（例如，金属）互连图案。 I / O端子设置在基板的外表面上。至少部分衬有金属涂层的排气孔延伸穿过衬底进入空腔。金属插头密封通气孔。通过将包装物放置在真空室中，排空室并加热室以使基板上的金属预成型件流入通气孔并形成插塞来密封通气孔。

3. 发明授权

US06532157B1 Angulated semiconductor packages 有权
标题翻译：半导体封装
公开(公告)号：US06532157B1
公开(公告)日：2003-03-11
申请号：US09714622
申请日：2000-11-16
申请人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
发明人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
IPC分类号： H05K700
CPC分类号： H01L31/0203 , H01L2924/0002 , H05K1/02 , H05K1/189 , H01L2924/00
摘要： A novel semiconductor package comprises a rigid dielectric, e.g., ceramic, substrate having first and second portions joined to one another at respective margins thereof to form an angle, e.g., a right angle, between the portions. Each of the portions has electrically conductive paths connected to one another through the angle. A semiconductor device, e.g., a die, is mounted to the first portion and electrically connected to the conductive paths thereof. An array of electrically conductive lands, balls, or pins are mounted on the second portion for connecting the package to a printed circuit board. In a high-power embodiment, the device is mounted directly on a threaded stud projecting from the first portion to enable intimate thermal coupling of the device to a heat sink. In another embodiment, a connector projects from the first portion to optically couple an optical device directly to an end of a fiber optic cable.
摘要翻译：新颖的半导体封装包括刚性电介质，例如陶瓷衬底，其具有在其相应边缘处彼此连接的第一和第二部分，以在这些部分之间形成一个角度，例如直角。每个部分具有通过该角度彼此连接的导电路径。诸如裸片的半导体器件被安装到第一部分并且电连接到其导电路径。在第二部分上安装有导电焊盘，滚珠或引脚的阵列，用于将封装连接到印刷电路板。在大功率实施例中，该装置直接安装在从第一部分突出的螺柱上，以使装置能够与散热器紧密地热耦合。在另一个实施例中，连接器从第一部分突出以将光学装置直接光耦合到光纤电缆的端部。

4. 发明授权

US06627987B1 Ceramic semiconductor package and method for fabricating the package 有权
标题翻译：陶瓷半导体封装及其制造方法
公开(公告)号：US06627987B1
公开(公告)日：2003-09-30
申请号：US09881343
申请日：2001-06-13
申请人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
发明人： Thomas P. Glenn , Roy D. Hollaway , Steven Webster
IPC分类号： H01L2348
CPC分类号： H01L23/10 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/16195 , Y10T428/239 , H01L2224/45015 , H01L2924/207
摘要： A sealed ceramic package for a semiconductor device and a method of fabricating the same are disclosed. In one embodiment, a ceramic substrate has a set of cavities each having an opening at a substrate top surface. A semiconductor die is disposed within each cavity, and is electrically connected through the substrate to input/output terminals of the substrate. The substrate has a metal film on the top surface thereof around the opening of the respective the cavities. A metal lid panel, covering the cavity openings, is soldered to the metal film by reflowing a layer of solder disposed over a lid panel bottom surface, thereby sealing the die in each cavity. Subsequently, individual packages are singulated from the ceramic substrate.
摘要翻译：公开了一种用于半导体器件的密封陶瓷封装及其制造方法。在一个实施例中，陶瓷衬底具有一组空腔，每个空腔在衬底顶表面具有开口。半导体管芯设置在每个腔内，并且通过衬底电连接到衬底的输入/输出端子。衬底在其顶表面上具有围绕各腔的开口的金属膜。覆盖空腔开口的金属盖板通过回流设置在盖板底部表面上的焊料层而焊接到金属膜，从而将模具密封在每个空腔中。随后，从陶瓷衬底分离各个封装。

5. 发明授权

US06545345B1 Mounting for a package containing a chip 有权
标题翻译：安装一个包含芯片的包装
公开(公告)号：US06545345B1
公开(公告)日：2003-04-08
申请号：US09813485
申请日：2001-03-20
申请人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
IPC分类号： H01L23495
CPC分类号： H05K1/182 , H01L23/5389 , H01L24/45 , H01L24/48 , H01L2224/32145 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/73265 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.
摘要翻译：公开了一种用于包含半导体芯片的封装的安装件，以及制造这种安装的方法。安装件包括具有其上具有导电迹线的安装表面的基板和延伸穿过基板的孔。该包装包括底座，例如引线框或层压板，以及输入/输出端子。芯片位于基座的第一侧，并与输入/输出端子电连接（直接或间接）。在芯片上的基座的第一侧上提供可以是模制密封剂的盖。封装被安装在基板上，使得帽位于孔中，并且基座的第一侧的周边部分在安装表面上方，以便将封装支撑在孔中，并且允许端子的输入/输出端子包装与安装表面的电路图案并列。因为盖在孔内，所以在安装表面上方的包装的高度被最小化。

6. 发明授权

US06967395B1 Mounting for a package containing a chip 有权
标题翻译：安装一个包含芯片的包装
公开(公告)号：US06967395B1
公开(公告)日：2005-11-22
申请号：US10688138
申请日：2003-10-17
申请人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
发明人： Thomas P. Glenn , Steven Webster , Roy D. Hollaway
IPC分类号： H01L23/31 , H01L23/495 , H01L25/10
CPC分类号： H01L23/49575 , H01L23/3107 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48247 , H01L2225/1029 , H01L2225/1058 , H01L2225/107 , H01L2924/01079 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H05K1/182 , H05K2201/09472 , H05K2201/10515 , H05K2201/1053 , H05K2203/1572 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.
摘要翻译：公开了一种用于包含半导体芯片的封装的安装件，以及制造这种安装的方法。安装件包括具有其上具有导电迹线的安装表面的基板和延伸穿过基板的孔。该包装包括底座，例如引线框或层压板，以及输入/输出端子。芯片位于基座的第一侧，并与输入/输出端子电连接（直接或间接）。在芯片上的基座的第一侧上提供可以是模制密封剂的盖。封装被安装在基板上，使得帽位于孔中，并且基座的第一侧的周边部分在安装表面上方，以便将封装支撑在孔中，并且允许端子的输入/输出端子包装与安装表面的电路图案并列。因为盖在孔内，所以在安装表面上方的包装的高度被最小化。

7. 发明授权

US06228676B1 Near chip size integrated circuit package 有权
标题翻译：近芯片尺寸集成电路封装
公开(公告)号：US06228676B1
公开(公告)日：2001-05-08
申请号：US09348772
申请日：1999-07-07
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： H01L2144
CPC分类号： H01L21/561 , H01L21/56 , H01L23/3128 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/16225 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/15173 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/3025 , H01L2924/00014 , H01L2224/83 , H01L2224/81 , H01L2224/85 , H01L2224/92247 , H01L2924/00 , H01L2924/00012
摘要： A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first surface. The first metallizations, IC chip including bonding pads and first substrate surface are then encapsulated. Interconnection balls or pads are formed at substrate bonding locations on a substrate second surface, the interconnection pads or balls being electrically connected to corresponding first metallizations. The substrate and encapsulant are then cut along the periphery of each section to form the plurality of IC chip packages.
摘要翻译：从具有截面的单个绝缘基板同时制造多个集成电路芯片（IC芯片）封装。在每个部分中，连接有IC芯片。 IC芯片上的接合焊盘与衬底第一表面上的第一金属化电连接。然后封装包括接合焊盘和第一衬底表面的第一金属化IC芯片。互连球或焊盘形成在衬底第二表面上的衬底接合位置处，互连衬垫或球电连接到对应的第一金属化。然后沿每个部分的周边切割衬底和密封剂以形成多个IC芯片封装。

8. 发明授权

US06528869B1 Semiconductor package with molded substrate and recessed input/output terminals 有权
标题翻译：具有模制基板和凹入式输入/输出端子的半导体封装
公开(公告)号：US06528869B1
公开(公告)日：2003-03-04
申请号：US09827619
申请日：2001-04-06
申请人： Thomas P. Glenn , Roy D. Hollaway
发明人： Thomas P. Glenn , Roy D. Hollaway
IPC分类号： H01L2302
CPC分类号： H01L23/13 , H01L21/4853 , H01L23/3128 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L2224/16225 , H01L2224/16235 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H05K1/119 , H05K3/3436 , H05K2201/0373 , H05K2201/09472 , Y02P70/613 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： Semiconductor chip packages having molded plastic substrates and recessed I/O terminals are disclosed, along with methods of making such packages. In an exemplary embodiment, the molded plastic substrate includes a metal interconnect pattern and a plurality of indentations in a surface thereof. Each indentation may include at least one projection. The indentation and any projections therein are covered by a metal lining. A metal contact, which serves as an I/O terminal, is placed in each of the indentations and is fused to the metal lining thereof. A chip is mounted on the substrate and is electrically connected to the metal contacts by the interconnect pattern. The package further includes a lid or hardened encapsulant over the chip.
摘要翻译：公开了具有模制塑料基板和凹入I / O端子的半导体芯片封装以及制造这种封装的方法。在示例性实施例中，模制塑料基板包括金属互连图案和其表面中的多个凹口。每个缩进可以包括至少一个投影。凹痕和其中的任何突起都被金属衬里覆盖。用作I / O端子的金属接触件被放置在每个凹口中并且熔合到其金属衬里。芯片安装在基板上，并通过互连图案与金属触点电连接。封装还包括在芯片上的盖子或硬化的密封剂。

9. 发明授权

US5950074A Method of making an integrated circuit package 失效
标题翻译：制造集成电路封装的方法
公开(公告)号：US5950074A
公开(公告)日：1999-09-07
申请号：US85136
申请日：1998-05-26
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： G11C16/02 , G11C16/18 , H01L23/02 , H01L23/04 , H01L23/055 , H01L23/10 , H01L31/02 , H01L31/0203 , H01L21/44
CPC分类号： H01L31/0203 , G11C16/18 , H01L23/04 , H01L23/055 , H01L23/10 , H01L24/97 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16195
摘要： A package for an integrated circuit is described, as is a method of making the package. An exemplary method of making a package for an integrated circuit die includes a first step of providing an insulating substrate having a substantially planar first surface. A conductive path extends through the substrate. Step two of the method places an integrated circuit die, such as an EEPROM or a CCD or SAW integrated circuit die, on the first surface of the substrate. Step three electrically connects the integrated circuit die to the conductive path. Step three applies an imperforate bead of a viscous adhesive material on the first surface of the substrate around the die. The bead extends to a height above the first surface of the substrate greater than the height of the integrated circuit die. Step four provides a lid having a first surface. Step five places a peripheral portion of the first surface of the lid on the bead, such that the first surface of the lid is above the first surface of the substrate and the integrated circuit die. Step six press fits the lid into the bead. Step seven hardens the bead, and thus completes the package. Epoxy is a preferred material for the bead. The lid is a single-piece of flat material, such as plastic, ceramic, or glass, which can have a diagonal edge.
摘要翻译：描述了用于集成电路的封装，以及制造封装的方法。制造用于集成电路晶片的封装的示例性方法包括提供具有基本平坦的第一表面的绝缘基板的第一步骤。导电路径延伸穿过衬底。该方法的第二步将诸如EEPROM或CCD或SAW集成电路管芯的集成电路管芯放置在衬底的第一表面上。步骤3将集成电路管芯电连接到导电路径上。第三步将粘性粘合剂材料的无孔珠子施加在模具周围的基底的第一表面上。珠子延伸到衬底的第一表面上方的高度大于集成电路管芯的高度。步骤四提供具有第一表面的盖。步骤五，将盖的第一表面的周边部分放置在胎圈上，使得盖的第一表面在基板的第一表面上方和集成电路管芯之上。第六步按压将盖子装入珠子。第七步硬化珠子，从而完成包装。环氧树脂是珠粒的优选材料。盖子是可以具有对角边缘的单件扁平材料，例如塑料，陶瓷或玻璃。

10. 发明授权

US5796163A Solder ball joint 失效
标题翻译：焊球接头
公开(公告)号：US5796163A
公开(公告)日：1998-08-18
申请号：US862687
申请日：1997-05-23
申请人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
发明人： Thomas P. Glenn , Roy D. Hollaway , Anthony E. Panczak
IPC分类号： H01L23/12 , H01L23/31 , H01L23/498 , H05K1/11 , H05K3/00 , H05K3/34 , H01L23/04
CPC分类号： H05K1/113 , H01L23/49816 , H01L23/49827 , H01L2224/48091 , H01L2224/48227 , H01L24/48 , H01L2924/00014 , H01L2924/01067 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H05K2201/0959 , H05K3/0094 , H05K3/3457
摘要： An improved interconnection ball joint for a ball grid array integrated circuit package includes a substrate base having a first surface to which an integrated circuit die is affixed, and an opposite second surface. A metallized via extends through the substrate. The via has a central hole which extends through the substrate. The hole is plugged with a flexible nonconductive material, such as epoxy solder mask material. A metallic interconnection ball land is on the second surface of the substrate, integral with the metallized via and adjacent to the hole and the plug of nonconductive material. A solder interconnection ball is formed on the land, opposite the via and the plug of nonconductive material. A metal-to-metal annular bond is formed at the joint between the interconnection ball and the land around the plug of nonconductive material in the center of the via. The joint has an unexpectedly high shearing strength, and resists cracking, which reduces risks of a electrical connectivity failure at the joint. Location of the interconnection ball directly opposite the via allows miniaturization of the package.
摘要翻译：用于球栅阵列集成电路封装的改进的互连球接头包括具有固定有集成电路管芯的第一表面和相对的第二表面的衬底基底。金属化通孔延伸穿过衬底。通孔具有延伸穿过基板的中心孔。该孔用柔性非导电材料（例如环氧焊料掩模材料）堵塞。金属互连球台面位于基板的第二表面上，与金属化通孔相邻，并且与非导电材料的孔和插头相邻。焊盘互连球形成在与导电材料的通孔和插头相对的台面上。在互连球和通孔中心的非导电材料的插头周围的接合处的接合处形成金属对金属环形接合。接头具有出人意料的高剪切强度，抵抗裂纹，降低了接头电连接失效的风险。直接与通孔相对的互连球的位置允许包装的小型化。

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