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1. 发明授权

US5559614A Liquid crystal display with integral heater and method of fabricating same 失效
标题翻译：具有整体加热器的液晶显示器及其制造方法
公开(公告)号：US5559614A
公开(公告)日：1996-09-24
申请号：US432346
申请日：1995-05-01
申请人： Glenn F. Urbish , Dale W. Dorinski , Thomas J. Swirbel
发明人： Glenn F. Urbish , Dale W. Dorinski , Thomas J. Swirbel
IPC分类号： G02F1/133
CPC分类号： G02F1/133382
摘要： A liquid crystal display device (11) is made by sputtering a layer of indium-tin oxide and copper on a transparent substrate. This metal layer is photodelineated to form a pattern of electrodes (17) and heating elements (81), the heating elements being interlaced between the electrodes. The heating elements are converted to a more resistive form by applying a constant voltage signal to only the heating elements in an oxygen-containing atmosphere. The assembled LCD has the heating elements on the inside of the display, so that when the heating elements are pulsed, they heat only a portion of the liquid crystal fluid in the immediate proximity. The heaters are activated by a signal from a display driver.
摘要翻译：液晶显示装置（11）通过在透明基板上溅射氧化铟锡和铜层而制成。该金属层被光线化以形成电极图案（17）和加热元件（81），加热元件在电极之间交错。通过在含氧气氛中仅对加热元件施加恒定电压信号，将加热元件转换成更电阻的形式。组装的LCD在显示器的内部具有加热元件，使得当加热元件被脉冲时，它们仅加热一部分液晶流体。加热器由显示驱动器的信号激活。

2. 发明授权

US5631120A Method of forming a pattern with step features in a photopolymer 失效
标题翻译：在光聚合物中形成具有阶梯特征的图案的方法
公开(公告)号：US5631120A
公开(公告)日：1997-05-20
申请号：US619113
申请日：1996-03-20
申请人： Thomas J. Swirbel , Dale W. Dorinski
发明人： Thomas J. Swirbel , Dale W. Dorinski
IPC分类号： G03F7/16 , H05K3/00 , G03C5/00 , G03C5/16
CPC分类号： G03F7/168 , H05K3/0073 , H05K3/0082 , Y10S430/146
摘要： A stepped pattern is formed in a photoresist film (10) by heating the photoresist at a first temperature to soft bake it, and then heating only a selected portion (15) of the photoresist. That portion of the photoresist film is then heated at a temperature sufficient to partially degrade the photoresist. Another portion (22) of the photoresist film is then exposed to ultraviolet light to degrade it more fully than in the earlier step. The photoresist film is then developed under conditions sufficient to completely remove the portion exposed to ultraviolet light, and to partially remove the portion heated in the first step, thereby creating a stepped feature in the photoresist film.
摘要翻译：在光致抗蚀剂膜（10）中通过在第一温度下加热光致抗蚀剂来软化烘烤它，然后仅加热光刻胶的选定部分（15），形成阶梯图案。然后在足以使光致抗蚀剂部分降解的温度下加热光致抗蚀剂膜的那部分。然后光致抗蚀剂膜的另一部分（22）暴露于紫外光以使其比前面的步骤更完全地降解。然后在足以完全去除暴露于紫外线的部分的条件下显影光致抗蚀剂膜，并部分去除在第一步骤中加热的部分，从而在光致抗蚀剂膜中形成台阶特征。

3. 发明授权

US5693455A Method for creating a pattern having step features in a photopolymer using a thermal mask 失效
标题翻译：使用热掩模产生在光聚合物中具有阶梯特征的图案的方法
公开(公告)号：US5693455A
公开(公告)日：1997-12-02
申请号：US498865
申请日：1995-07-06
申请人： Thomas J. Swirbel , Dale W. Dorinski
发明人： Thomas J. Swirbel , Dale W. Dorinski
IPC分类号： G03F7/16 , H05K3/00 , G03C5/16 , G03C5/04
CPC分类号： G03F7/168 , H05K3/0073 , H05K3/0082 , Y10S430/145
摘要： A stepped pattern is formed in a photoresist film (10) by heating the photoresist at a first temperature to soft bake it, and then applying a mask (10) that allows only a selected portion (15) of the photoresist to be heated. That portion of the photoresist film is then heated at a temperature sufficient to partially degrade the photoresist, and the mask is removed. Another portion (22) of the photoresist film is then exposed to ultraviolet light to degrade it more fully than in the earlier step. The photoresist film is then developed under conditions sufficient to completely remove the portion exposed to ultraviolet light, and to partially remove the portion heated using the mask, thereby creating a stepped feature in the photoresist film.
摘要翻译：在光致抗蚀剂膜（10）中通过在第一温度下加热光致抗蚀剂来软化烘烤它，然后施加仅允许光刻胶的选定部分（15）被加热的掩模（10），在光致抗蚀剂膜（10）中形成阶梯图案。然后在足以使光致抗蚀剂部分降解的温度下加热该光致抗蚀剂膜的部分，并除去掩模。然后光致抗蚀剂膜的另一部分（22）暴露于紫外光以使其比前面的步骤更完全地降解。然后在足以完全去除暴露于紫外光的部分的条件下显影光致抗蚀剂膜，并且部分地去除使用掩模加热的部分，从而在光致抗蚀剂膜中产生阶梯特征。

4. 发明授权

US06990734B2 Methods for shielding one or more circuit of a printed circuit board 有权
标题翻译：屏蔽印刷电路板的一个或多个电路的方法
公开(公告)号：US06990734B2
公开(公告)日：2006-01-31
申请号：US10263006
申请日：2002-10-02
申请人： Jeffrey A. Underwood , John K. Arledge , Thomas J. Swirbel , Joaquin Barreto
发明人： Jeffrey A. Underwood , John K. Arledge , Thomas J. Swirbel , Joaquin Barreto
IPC分类号： H05K3/34
CPC分类号： H05K1/0218 , H01L2223/6622 , H05K1/0221 , H05K1/0222 , H05K1/113 , H05K3/4644 , H05K9/0039 , H05K2201/0715 , H05K2201/09036 , H05K2201/09509 , H05K2201/09809 , H05K2201/09972 , H05K2201/09981 , H05K2201/10553 , H05K2201/10969 , Y10T29/49117 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49156
摘要： Methods for forming a metal shield on a printed circuit board (10) include depositing a first layer of metal (41) on a substrate (22) of the printed circuit board (10), depositing a first layer of dielectric material (42) on the first layer of metal (41), printing one or more circuits (21, 21′) on the first dielectric layer (42), depositing a second layer of dielectric material (43) over the one or more printed circuits (21, 21′), forming a trench-like opening (44) in the two layers of dielectric material (42, 43) surrounding the one or more printed circuits (21, 21′) so that the metal of the first layer (41) is exposed by the trench-like opening (44), depositing a second layer of metal (27) on the second layer of dielectric material (43) such that the second layer of metal (27) plates the trench-like opening (44) and makes electrical contact with the first metal layer (41).
摘要翻译：在印刷电路板（10）上形成金属屏蔽的方法包括在印刷电路板（10）的基板（22）上沉积第一金属层（41），将第一层介电材料（42）沉积在所述第一金属层（41），在所述第一介电层（42）上印刷一个或多个电路（21,21'），在所述一个或多个印刷电路（21,21）上沉积第二介电材料层 '），在围绕所述一个或多个印刷电路（21,21'）的两层介电材料（42,43）中形成沟槽状开口（44），使得第一层（41）的金属暴露通过所述沟槽状开口（44），在所述第二介电材料层（43）上沉积第二金属层（27），使得所述第二金属层（27）平坦化所述沟槽状开口（44）并使与第一金属层（41）电接触。

5. 发明授权

US6091194A Active matrix display 失效
标题翻译：主动矩阵显示
公开(公告)号：US6091194A
公开(公告)日：2000-07-18
申请号：US926627
申请日：1997-09-10
申请人： Thomas J. Swirbel , Patrick M. Dunn
发明人： Thomas J. Swirbel , Patrick M. Dunn
IPC分类号： H01L27/32 , H05B33/14
CPC分类号： H01L27/3253
摘要： A flat panel display (10) uses active matrix addressing. Two parallel substrates (20, 30) have an organic electroluminescent medium (40) that emits visible light in response to an electrical signal, sandwiched between them. The top substrate is transparent to allow emitted light (50) to be discernible to an observer. The bottom substrate does not need to be transparent, as the active matrix display operates in a emissive or reflective mode. An array of electrodes (22) is situated on an inside face of the bottom substrate, and a transparent electrode (32) corresponding to the array is situated on an inside face of the top substrate. The electrodes serve to define an array of pixels. A number of switches (24) are located on the backside of the bottom substrate, and are each connected to respective electrodes (22) by an electrically conductive via (28) in the bottom substrate.
摘要翻译：平板显示器（10）使用有源矩阵寻址。两个平行的基板（20,30）具有有机电致发光介质（40），其响应于电信号发射可见光，夹在它们之间。顶部衬底是透明的，以允许发射光（50）对观察者可辨别。底部衬底不需要是透明的，因为有源矩阵显示器以发射或反射模式工作。电极阵列（22）位于底部基板的内表面上，并且对应于阵列的透明电极（32）位于顶部基板的内表面上。电极用于限定像素阵列。多个开关（24）位于底部基板的背面，并且各自通过底部基板中的导电通孔（28）连接到相应的电极（22）。

6. 发明授权

US5773198A Method of forming high resolution circuitry by depositing a polyvinyl alcohol layer beneath a photosensitive polymer layer 失效
标题翻译：通过在感光聚合物层下沉积聚乙烯醇层形成高分辨率电路的方法
公开(公告)号：US5773198A
公开(公告)日：1998-06-30
申请号：US660384
申请日：1996-06-07
申请人： Thomas J. Swirbel , Anthony B. Suppelsa , Joaquin Barreto
发明人： Thomas J. Swirbel , Anthony B. Suppelsa , Joaquin Barreto
IPC分类号： G03F7/09 , H05K3/10 , G03C5/56
CPC分类号： H05K3/108 , G03F7/092 , H05K2203/0577 , H05K2203/0789 , Y10S438/95 , Y10S438/951
摘要： A method of forming a high resolution metal pattern on a substrate. A temporary polyvinyl alcohol (10) layer underneath the photoresist layer (20) aids in removing the photoresist layer after plating. The photoresist is photodelineated in conventional manner to form a pattern (40). During photodelineation, the developing process for the resist does not completely remove the PVA (45) that lies directly under the removed resist, but instead reveals those portions of the polyvinyl alcohol layer. The substrate is then rinsed in a hot aqueous solution to effect removal of the revealed PVA portions, now exposing portions (40) of the substrate (15). Metal (50) is then electroplated to build up a metal circuitry pattern. The remaining portions of the photoresist and the PVA are then removed by a hot aqueous solution.
摘要翻译：在基板上形成高分辨率金属图案的方法。在光致抗蚀剂层（20）下面的临时聚乙烯醇（10）层有助于在电镀后去除光致抗蚀剂层。光致抗蚀剂以常规方式光线照射以形成图案（40）。在光线照射期间，抗蚀剂的显影过程不能完全去除位于去除的抗蚀剂正下方的PVA（45），而是透露聚乙烯醇层的那些部分。然后将衬底在热水溶液中漂洗以实现所揭露的PVA部分的去除，现在暴露衬底（15）的部分（40）。然后电镀金属（50）以建立金属电路图案。然后通过热水溶液除去光致抗蚀剂和PVA的剩余部分。

7. 发明授权

US5591480A Method for fabricating metallization patterns on an electronic substrate 失效
标题翻译：在电子基板上制造金属化图案的方法
公开(公告)号：US5591480A
公开(公告)日：1997-01-07
申请号：US517392
申请日：1995-08-21
申请人： Douglas H. Weisman , Thomas J. Swirbel , John K. Arledge
发明人： Douglas H. Weisman , Thomas J. Swirbel , John K. Arledge
IPC分类号： G02F1/1345 , H01L21/48 , H03H3/08 , H05K3/06 , H05K3/24 , B05D5/12 , C23C14/00 , C25D5/02 , H01L21/465
CPC分类号： H05K3/243 , H01L21/4846 , H03H3/08 , G02F1/1345 , H05K2201/0326 , H05K2203/0384 , H05K2203/095 , H05K3/062 , H05K3/064
摘要： One method for fabricating solderable pads (406) onto a substrate (220) for direct chip attachment uses a multilayer metallization coating (500). The coating has a bottom layer (202) of indium-tin oxide, with an intermediate layer (204) of copper and a top layer (206) of indium-tin oxide. A masking layer (208) is deposited on the active display area (402) of the substrate, leaving the bonding pads uncovered. The revealed bonding pads are then plasma etched, using the polyimide as an etch resist, and the top layer of ITO is selectively removed to reveal the underlying copper layer. The exposed copper layer (204) is then plated with a solderable metal to the desired thickness to form bonding pads that may be used with direct chip attachment schemes.
摘要翻译：用于将可焊焊盘（406）制造到用于直接芯片附接的基板（220）上的一种方法使用多层金属化涂层（500）。涂层具有铟锡氧化物的底层（202），其中铜的中间层（204）和氧化铟锡的顶层（206）。掩模层（208）沉积在衬底的有源显示区域（402）上，留下焊盘未被覆盖。然后使用聚酰亚胺作为抗蚀剂，然后等离子体蚀刻所揭示的接合焊盘，并且选择性地去除ITO的顶层以露出下面的铜层。然后将暴露的铜层（204）用可焊接金属镀覆至所需厚度，以形成可与直接芯片附接方案一起使用的焊盘。

8. 发明授权

US5515191A Liquid crystal display having enhanced conductors and adhesive spacers 失效
标题翻译：液晶显示器具有增强的导体和粘合间隔物
公开(公告)号：US5515191A
公开(公告)日：1996-05-07
申请号：US251446
申请日：1994-05-31
申请人： Thomas J. Swirbel
发明人： Thomas J. Swirbel
IPC分类号： G02F1/1333 , G02F1/1339 , G02F1/1343
CPC分类号： G02F1/13394 , G02F1/133305
摘要： Briefly, according to the invention, there is provided a liquid crystal display device (LCD). The LCD has an electrode pattern (14) deposited on one side of a substrate (10). The pattern is formed in a series of elements or pixels (13), that are arranged in a regularly ordered matrix of rows and columns. Metal conductors (16) are also on the face of the substrate and are electrically connected to the electrode elements. A spacer material (27) is formed on metal conductors and a second substrate (10') is placed on the first substrate, and the two substrates are arranged so that a uniform gap (25) is maintained between the substrates by the spacer material. A liquid crystal material (29) is then disposed in the uniform gap. The spacer material can be a photoimaged adhesive, the electrode pattern can be indium/tin oxide, the metal conductors can be copper, and the metal conductors are located between the rows and columns of the plurality of elements in the electrode pattern.
摘要翻译：简而言之，根据本发明，提供了一种液晶显示装置（LCD）。 LCD具有沉积在基板（10）的一侧上的电极图案（14）。图案形成在一系列元件或像素（13）中，其被布置成行和列的规则排列的矩阵。金属导体（16）也位于基板的表面上并与电极元件电连接。间隔材料（27）形成在金属导体上，第二基板（10'）放置在第一基板上，并且两个基板被布置成使得通过间隔材料在基板之间保持均匀的间隙（25）。然后将液晶材料（29）设置在均匀间隙中。隔离材料可以是光刻胶粘剂，电极图案可以是铟/锡氧化物，金属导体可以是铜，并且金属导体位于电极图案中的多个元件的行和列之间。

9. 发明授权

US5395740A Method for fabricating electrode patterns 失效
标题翻译：电极图形制作方法
公开(公告)号：US5395740A
公开(公告)日：1995-03-07
申请号：US10224
申请日：1993-01-27
申请人： Thomas J. Swirbel , John K. Arledge , James L. Davis
发明人： Thomas J. Swirbel , John K. Arledge , James L. Davis
IPC分类号： G02F1/1343 , G03F7/00 , G03F7/20 , H01L27/32 , H01L51/52 , H05K3/04 , G03F7/26 , G03C5/16
CPC分类号： H05K3/048 , G02F1/13439 , G03F7/00 , G03F7/0035 , G03F7/2022 , H01L51/0021
摘要： A method of forming electrode patterns on a substrate. A transparent substrate (10) is patterned with a photoresist layer (14) on the front side so that portions (18) of the substrate are revealed. A metal oxide layer (12) is deposited on the patterned photoresist layer and the revealed portions of the substrate. The patterned photoresist layer is then exposed to actinic radiation (19) through the back side (25) of the transparent substrate. The photoresist pattern (20) is removed, carrying with it those portions of the metal oxide layer deposited on the photoresist layer, forming an electrode pattern (22) by a lift-off technique.
摘要翻译：在基板上形成电极图案的方法。透明基板（10）被图案化，在前侧具有光致抗蚀剂层（14），从而露出基板的部分（18）。金属氧化物层（12）沉积在图案化的光刻胶层和衬底的露出部分上。然后将图案化的光致抗蚀剂层通过透明基底的背面（25）暴露于光化辐射（19）。去除光致抗蚀剂图案（20），携带沉积在光致抗蚀剂层上的金属氧化物层的那些部分，通过剥离技术形成电极图案（22）。

10. 发明授权

US07579215B2 Method for fabricating a low cost integrated circuit (IC) package 失效
标题翻译：制造低成本集成电路（IC）封装的方法
公开(公告)号：US07579215B2
公开(公告)日：2009-08-25
申请号：US11694744
申请日：2007-03-30
申请人： Thomas J. Swirbel
发明人： Thomas J. Swirbel
IPC分类号： H01L21/56 , H01L21/60
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3135 , H01L23/525 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L2224/24227 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2224/82 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.
摘要翻译：一种用于制造低成本集成电路封装（600）的方法包括将经处理的硅晶片分离成多个单独的裸片（601），然后将裸片（603）定位在第二基板上，以便朝下放置以允许增加的裸片 I / O连接区域。用一种或多种环氧树脂材料覆盖（605）模具以形成一组嵌入式模具封装。然后裸片上的一个或多个焊盘暴露（615）并随后连接（617）到管芯I / O连接区域中的I / O连接。然后将每个模具从第二基板分离（619）形成单个嵌入的模具封装。该方法提供了使用晶片级封装和晶片级封装工艺的组合形成低成本，高密度集成电路封装的制造工艺。

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