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1. 发明授权

US08728842B2 Self-aligned multi-dielectric-layer lift off process for laser diode stripes 有权
标题翻译：用于激光二极管条纹的自对准多介质层剥离工艺
公开(公告)号：US08728842B2
公开(公告)日：2014-05-20
申请号：US13425354
申请日：2012-03-20
申请人： James W. Raring , Daniel F. Feezell , Nick Pfister
发明人： James W. Raring , Daniel F. Feezell , Nick Pfister
IPC分类号： H01L33/32
CPC分类号： H01S5/34333 , B82Y20/00 , H01S5/2086 , H01S2301/176 , H01S2304/04 , Y10S438/951 , Y10S438/981
摘要： A method for forming a laser diode structure. The method includes providing a laser diode material having a surface region. A multilayer dielectric mask structure comprising alternating first and second dielectric layers is formed overlying the surface region. The method forms a laser diode structure using the multilayer dielectric mask structure as a mask. The method selectively removes a portion of the first dielectric layer to form one or more undercut regions between the second dielectric layers. A passivation layer overlies the multilayer dielectric mask structure and the undercut region remained intact. The dielectric mask structure is selectively removed, exposing a top surface region of the laser diode structure. A contact structure is formed overlying at least the exposed top surface region.
摘要翻译：一种形成激光二极管结构的方法。该方法包括提供具有表面区域的激光二极管材料。包括交替的第一和第二电介质层的多层电介质掩模结构形成在覆盖表面区域上。该方法使用多层介电掩模结构作为掩模形成激光二极管结构。该方法选择性地去除第一电介质层的一部分以在第二电介质层之间形成一个或多个底切区域。钝化层覆盖多层电介质掩模结构，并且底切区保持完整。选择性地去除电介质掩模结构，暴露激光二极管结构的顶表面区域。形成至少覆盖暴露的顶表面区域的接触结构。

2. 发明申请

US20120178198A1 Self-Aligned Multi-Dielectric-Layer Lift Off Process for Laser Diode Stripes 有权
标题翻译：用于激光二极管条纹的自对准多电介质层剥离工艺
公开(公告)号：US20120178198A1
公开(公告)日：2012-07-12
申请号：US13425354
申请日：2012-03-20
申请人： James W. Raring , Daniel F. Feezell , Nick Pfister
发明人： James W. Raring , Daniel F. Feezell , Nick Pfister
IPC分类号： H01L33/32
CPC分类号： H01S5/34333 , B82Y20/00 , H01S5/2086 , H01S2301/176 , H01S2304/04 , Y10S438/951 , Y10S438/981
摘要： A method for forming a laser diode structure. The method includes providing a laser diode material having a surface region. A multilayer dielectric mask structure comprising alternating first and second dielectric layers is formed overlying the surface region. The method forms a laser diode structure using the multilayer dielectric mask structure as a mask. The method selectively removes a portion of the first dielectric layer to form one or more undercut regions between the second dielectric layers. A passivation layer overlies the multilayer dielectric mask structure and the undercut region remained intact. The dielectric mask structure is selectively removed, exposing a top surface region of the laser diode structure. A contact structure is formed overlying at least the exposed top surface region.
摘要翻译：一种形成激光二极管结构的方法。该方法包括提供具有表面区域的激光二极管材料。包括交替的第一和第二电介质层的多层电介质掩模结构形成在覆盖表面区域上。该方法使用多层介电掩模结构作为掩模形成激光二极管结构。该方法选择性地去除第一电介质层的一部分以在第二电介质层之间形成一个或多个底切区域。钝化层覆盖多层电介质掩模结构，并且底切区保持完整。选择性地去除电介质掩模结构，暴露激光二极管结构的顶表面区域。形成至少覆盖暴露的顶表面区域的接触结构。

3. 发明授权

US08178377B2 Method for fabricating lED chip comprising reduced mask count 有权
标题翻译：制造lED芯片的方法包括减少掩模计数
公开(公告)号：US08178377B2
公开(公告)日：2012-05-15
申请号：US13046632
申请日：2011-03-11
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L21/00
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.
摘要翻译：提供一种制造发光二极管芯片的方法。在该方法中，应用半色调掩模处理，灰度色调处理或多色调掩模处理，并与剥离处理相结合，以进一步减少发光二极管芯片的处理步骤。在本发明中，一些部件也可以通过相同的工艺同时形成，以减少发光二极管芯片的工艺步骤。因此，本发明中提供的发光二极管的制造方法降低了用于制造发光二极管的成本和时间。

4. 发明授权

US08178376B2 Method for fabricating LED chip comprising reduced mask count and lift-off processing 有权
公开(公告)号：US08178376B2
公开(公告)日：2012-05-15
申请号：US13046619
申请日：2011-03-11
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L21/00
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

5. 发明授权

US08173468B2 Method for fabricating LED chip comprising reduced mask count and lift-off processing 有权
公开(公告)号：US08173468B2
公开(公告)日：2012-05-08
申请号：US13046606
申请日：2011-03-11
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L21/00
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

6. 发明授权

US08173465B2 Method for fabricating LED chip comprising reduced mask count and lift-off processing 有权
标题翻译：制造LED芯片的方法包括减少掩模计数和剥离处理
公开(公告)号：US08173465B2
公开(公告)日：2012-05-08
申请号：US13046576
申请日：2011-03-11
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L21/00
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.
摘要翻译：提供一种制造发光二极管芯片的方法。在该方法中，应用半色调掩模处理，灰度色调处理或多色调掩模处理，并与剥离处理相结合，以进一步减少发光二极管芯片的处理步骤。在本发明中，一些部件也可以通过相同的工艺同时形成，以减少发光二极管芯片的工艺步骤。因此，本发明中提供的发光二极管的制造方法降低了用于制造发光二极管的成本和时间。

7. 发明授权

US08143148B1 Self-aligned multi-dielectric-layer lift off process for laser diode stripes 有权
标题翻译：用于激光二极管条纹的自对准多介质层剥离工艺
公开(公告)号：US08143148B1
公开(公告)日：2012-03-27
申请号：US12502382
申请日：2009-07-14
申请人： James W. Raring , Daniel F. Feezell , Nick Pfister
发明人： James W. Raring , Daniel F. Feezell , Nick Pfister
IPC分类号： H01L21/30 , H01L33/00
CPC分类号： H01S5/34333 , B82Y20/00 , H01S5/2086 , H01S2301/176 , H01S2304/04 , Y10S438/951 , Y10S438/981
摘要： A method for forming a laser diode structure. The method includes providing a laser diode material having a surface region. A multilayer dielectric mask structure comprising alternating first and second dielectric layers is formed overlying the surface region. The method forms a laser diode structure using the multilayer dielectric mask structure as a mask. The method selectively removes a portion of the first dielectric layer to form one or more undercut regions between the second dielectric layers. A passivation layer overlies the multilayer dielectric mask structure and the undercut region remained intact. The dielectric mask structure is selectively removed, exposing a top surface region of the laser diode structure. A contact structure is formed overlying at least the exposed top surface region.
摘要翻译：一种形成激光二极管结构的方法。该方法包括提供具有表面区域的激光二极管材料。包括交替的第一和第二电介质层的多层电介质掩模结构形成在覆盖表面区域上。该方法使用多层电介质掩模结构作为掩模形成激光二极管结构。该方法选择性地去除第一电介质层的一部分以在第二电介质层之间形成一个或多个底切区域。钝化层覆盖多层电介质掩模结构，并且底切区保持完整。选择性地去除电介质掩模结构，暴露激光二极管结构的顶表面区域。形成至少覆盖暴露的顶表面区域的接触结构。

8. 发明申请

US20110165706A1 Method for Fabricating LED Chip Comprising Reduced Mask Count and Lift-Off Processing 有权
公开(公告)号：US20110165706A1
公开(公告)日：2011-07-07
申请号：US13046594
申请日：2011-03-11
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L33/48
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

9. 发明授权

US07927901B2 Method for fabricating LED chip comprising reduced mask count and lift-off processing 有权
标题翻译：制造LED芯片的方法包括减少掩模计数和剥离处理
公开(公告)号：US07927901B2
公开(公告)日：2011-04-19
申请号：US12252370
申请日：2008-10-16
申请人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
发明人： Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC分类号： H01L21/00
CPC分类号： H01L33/44 , H01L33/387 , Y10S438/951
摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.
摘要翻译：提供一种制造发光二极管芯片的方法。在该方法中，应用半色调掩模处理，灰度色调处理或多色调掩模处理，并与剥离处理相结合，以进一步减少发光二极管芯片的处理步骤。在本发明中，一些部件也可以通过相同的工艺同时形成，以减少发光二极管芯片的工艺步骤。因此，本发明中提供的发光二极管的制造方法降低了用于制造发光二极管的成本和时间。

10. 发明授权

US07915074B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07915074B2
公开(公告)日：2011-03-29
申请号：US11739753
申请日：2007-04-25
申请人： Soo-Wan Yoon
发明人： Soo-Wan Yoon
IPC分类号： H01L51/40 , H01L29/08 , H01L29/18
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1292 , H01L27/3248 , H01L27/3274 , H01L51/0545 , H01L2227/323 , Y10S438/951
摘要： A method of manufacturing a thin film transistor (“TFT”) array panel includes forming a first conductive layer, gate insulating layer, and first insulating layer on a substrate, patterning the first insulating layer to form a first insulating pattern including an opening, etching the gate insulating layer and first conductive layer to form a gate insulating member and a gate line, forming an organic semiconductor in the opening, forming a passivation layer and a second insulating pattern thereon, patterning the second insulating layer to form a second insulating pattern, etching the passivation layer, depositing a second conductive layer thereon, forming a pixel electrode by removing the second insulating pattern and the second conductive layer deposited on the second insulating pattern, and forming a drain electrode and a data line by depositing and patterning a third conductive layer on the resultant structure.
摘要翻译：制造薄膜晶体管（“TFT”）阵列面板的方法包括在衬底上形成第一导电层，栅极绝缘层和第一绝缘层，图案化第一绝缘层以形成第一绝缘图案，其包括开口，蚀刻栅极绝缘层和第一导电层，以形成栅绝缘构件和栅极线，在开口中形成有机半导体，在其上形成钝化层和第二绝缘图案，图案化第二绝缘层以形成第二绝缘图案，蚀刻钝化层，在其上沉积第二导电层，通过去除沉积在第二绝缘图案上的第二绝缘图案和第二导电层形成像素电极，以及通过沉积和图案化第三导电层形成漏电极和数据线层上的结果。

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