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1. 发明授权

US08193828B2 Buffer apparatus, integrated circuit and method of reducing a portion of an oscillation of an output signal 有权
标题翻译：缓冲装置，集成电路和减少输出信号振荡的一部分的方法
公开(公告)号：US08193828B2
公开(公告)日：2012-06-05
申请号：US13056334
申请日：2008-07-31
申请人： Thierry Cassagnes , Valerie Bernon-Enjalbert , Philippe Lance , Matthijs Pardoen
发明人： Thierry Cassagnes , Valerie Bernon-Enjalbert , Philippe Lance , Matthijs Pardoen
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H03K19/00361 , H03K17/167 , H03K2217/94094
摘要： A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.
摘要翻译：用于通信总线的缓冲装置包括具有输出的驱动器电路。具有输入的放大器电路耦合到驱动器电路的输出端。驱动器电路被布置成在使用时产生具有包括其中的步骤的波形的驱动信号，以便基本上抑制放大器电路产生输出信号的振荡的一部分。

2. 发明申请

US20110121858A1 BUFFER APPARATUS, INTEGRATED CIRCUIT AND METHOD OF REDUCING A PORTION OF AN OSCILLATION OF AN OUTPUT SIGNAL 有权
标题翻译：缓冲器装置，集成电路和减少输出信号振荡部分的方法
公开(公告)号：US20110121858A1
公开(公告)日：2011-05-26
申请号：US13056334
申请日：2008-07-31
申请人： Thierry Cassagnes , Valerie Bernon-Enjalbert , Philippe Lance , Matthijs Pardoen
发明人： Thierry Cassagnes , Valerie Bernon-Enjalbert , Philippe Lance , Matthijs Pardoen
IPC分类号： H03K19/0175
CPC分类号： H03K19/00361 , H03K17/167 , H03K2217/94094
摘要： A buffer apparatus for a communications bus comprises a driver circuit having an output. An amplifier circuit having an input is coupled to the output of the driver circuit. The driver circuit is arranged to generate, when in use, a drive signal having a waveform that comprises a step therein so as to substantially suppress generation by the amplifier circuit of a portion of an oscillation of an output signal.
摘要翻译：用于通信总线的缓冲装置包括具有输出的驱动器电路。具有输入的放大器电路耦合到驱动器电路的输出端。驱动器电路被布置成在使用时产生具有包括其中的步骤的波形的驱动信号，以便基本上抑制放大器电路产生输出信号的振荡的一部分。

3. 发明申请

US20150145563A1 DIFFERENTIAL LINE DRIVER CIRCUIT AND METHOD THEREFOR 有权
标题翻译：差分线路驱动电路及其方法
公开(公告)号：US20150145563A1
公开(公告)日：2015-05-28
申请号：US14403607
申请日：2012-06-27
申请人： Matthijs Pardoen
发明人： Matthijs Pardoen
IPC分类号： G06F13/40
CPC分类号： G06F13/4072
摘要： A differential line driver circuit comprising a plurality of driver stages is described. Each driver stage is operably coupled to at least one output of the line driver circuit and arranged to receive at least one control signal and to drive at least one output signal on the at least one output of the line driver circuit in accordance with the at least one control signal received thereby. The line driver circuit further comprises at least one delay component arranged to receive the at least one control signal, and to sequentially propagate the at least one control signal to the driver stages with time delays between the propagation of the at least one control signal to sequentially adjacent driver stages. The delay component is arranged to sequentially propagate the at least one control signal to the driver stages such that such that the at least one control signal is propagated with at least one of: a progressively increasing time delay between sequentially adjacent driver stages; and a progressively decreasing time delay between sequentially adjacent driver stages.
摘要翻译：描述了包括多个驱动器级的差分线路驱动器电路。每个驱动器级可操作地耦合到线路驱动器电路的至少一个输出，并且被布置为接收至少一个控制信号，并且至少根据至少一个驱动器电路驱动线驱动器电路的至少一个输出上的至少一个输出信号由此接收一个控制信号。线路驱动器电路还包括布置成接收至少一个控制信号的至少一个延迟部件，并且将至少一个控制信号顺序地传播到驱动器级，在至少一个控制信号传播到顺序之间具有时间延迟相邻的驾驶员阶段。延迟分量被布置为将至少一个控制信号顺序地传播到驱动器级，使得至少一个控制信号以下列中的至少一个传播：在顺序相邻的驱动级之间逐渐增加的时间延迟; 并且在顺序相邻的驾驶员阶段之间逐渐减小时间延迟。

4. 发明申请

US20110058293A1 ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT, EQUIPMENT AND METHOD 有权
标题翻译：静电放电保护电路，设备和方法
公开(公告)号：US20110058293A1
公开(公告)日：2011-03-10
申请号：US12991824
申请日：2008-06-04
申请人： Matthijs Pardoen , Patrice Besse
发明人： Matthijs Pardoen , Patrice Besse
IPC分类号： H02H9/04 , H05K3/10
CPC分类号： H01L27/0251 , Y10T29/49155
摘要： An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.
摘要翻译：一种静电放电（ESD）保护电路，用于保护电子电路中的一个或多个器件免受通过一个或多个输入/输出引脚进入电子电路的ESD电流，该保护电路包括：电压钳位电路，可连接到该或每个引脚，用于将ESD电流从该设备或每个设备转向; 连接在输入/输出引脚和电压钳位电路之间并连接到一个或多个器件的电流传感器电路，用于感测ESD电流的电流传感器电路，以及当检测到的电流超过阈值时关断或每个器件值，其中当电流在电流镜像电路中流过高于阈值时，使该装置关闭。

5. 发明授权

US09224726B2 Electrostatic discharge protection circuit, equipment and method 有权
标题翻译：静电放电保护电路，设备及方法
公开(公告)号：US09224726B2
公开(公告)日：2015-12-29
申请号：US12991824
申请日：2008-06-04
申请人： Matthijs Pardoen , Patrice Besse
发明人： Matthijs Pardoen , Patrice Besse
IPC分类号： H02H9/04 , H01L27/02
CPC分类号： H01L27/0251 , Y10T29/49155
摘要： An electrostatic discharge (ESD) protection circuit for protecting one or more devices in an electronic circuit from an ESD current which enters the electronic circuit through one or more input/output pins, the protection circuit comprising: a voltage clamp circuit connectable to the or each pin, for diverting the ESD current from the or each device; and a current sensor circuit connected between the input/output pins and the voltage clamp circuit and connected to the one or more devices, the current sensor circuit for sensing the ESD current and for switching off the or each device when the sensed current exceeds a threshold value, wherein when a current flows in the current mirror circuits above a threshold value the device is caused to switch off.
摘要翻译：一种静电放电（ESD）保护电路，用于保护电子电路中的一个或多个器件免受通过一个或多个输入/输出引脚进入电子电路的ESD电流，该保护电路包括：电压钳位电路，可连接到该或每个引脚，用于将ESD电流从该设备或每个设备转向; 连接在输入/输出引脚和电压钳位电路之间并连接到一个或多个器件的电流传感器电路，用于感测ESD电流的电流传感器电路，以及当检测到的电流超过阈值时关断或每个器件值，其中当电流在电流镜像电路中流过高于阈值时，使该装置关闭。

6. 发明授权

US07560989B2 Power amplifier with controlled output power 有权
标题翻译：具有受控输出功率的功率放大器
公开(公告)号：US07560989B2
公开(公告)日：2009-07-14
申请号：US11745891
申请日：2007-05-08
申请人： Kevin Scott Buescher , Matthijs Pardoen
发明人： Kevin Scott Buescher , Matthijs Pardoen
IPC分类号： H03F3/10
CPC分类号： H03F1/0277 , H03F1/223 , H03F3/211 , H03F3/72 , H03F2200/453 , H03F2203/7236
摘要： The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.
摘要翻译：本发明包括具有放大器核心的功率放大器，包括并联放大器单元，由与放大器核心类似的一个放大器单元制成的复制单元，选择放大器单元组合以激活的功率控制器，用于固定顶部的调节器复制单元的电压到参考电压，电压发生器，用于向调节器提供电压基准;电流发生器，用于提供通过复制单元的参考电流;以及由调节器输出控制的驱动单元，以驱动放大器的组合使得每个选定的激活单元的组合定义了功率放大器输出信号的预定衰减水平，使得其以逐步方式被衰减。

7. 发明授权

US07515050B2 Very high frequency passive transponder, in UHF frequency band, with active voltage multiplier or booster at the entry of its logic circuit 有权
标题翻译：超高频无源应答器，在UHF频段，其逻辑电路入口处为有源电压倍增器或升压器
公开(公告)号：US07515050B2
公开(公告)日：2009-04-07
申请号：US11245014
申请日：2005-10-07
申请人： Matthijs Pardoen , Olivier Desjeux
发明人： Matthijs Pardoen , Olivier Desjeux
IPC分类号： G08B13/14 , G05F1/10 , H04B1/38 , H02M3/18
CPC分类号： G06K19/0723 , G06K19/0713
摘要： The passive transponder comprises an antenna (2) connected to an integrated circuit (6) the analogue part of which includes a passive voltage rectifier (8) supplying a rectified voltage (VDC1) and an active multiplier or booster (16) for said rectified voltage which is formed by a capacitor (C2) switched to a relatively low frequency, for example 1 MHz, by means of switches formed by transistors (18 to 21) controlled using an oscillator (24).
摘要翻译：无源转发器包括连接到集成电路（6）的天线（2），其模拟部分包括提供整流电压（VDC1）的无源电压整流器（8）和用于所述整流电压的有源乘法器或升压器（16）其由通过由使用振荡器（24）控制的晶体管（18至21）形成的开关的电容器（C2）形成，所述电容器（C2）切换到相对低的频率，例如1MHz。

8. 发明授权

US07598843B2 Very high frequency transponder, in particular a UHF transponder, including a protection against electrostatic discharges 有权
标题翻译：超高频转发器，特别是UHF应答器，包括防止静电放电的保护
公开(公告)号：US07598843B2
公开(公告)日：2009-10-06
申请号：US11300347
申请日：2005-12-15
申请人： Matthijs Pardoen
发明人： Matthijs Pardoen
IPC分类号： H04Q5/22
CPC分类号： G06K19/0715 , G06K19/0701 , G06K19/0723
摘要： The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfils two functions: its first response signal modulation function and an additional ESD protection function.
摘要翻译： UHF转发器包括防止由调制晶体管（T1）形成的静电放电（ESD）和用于所述晶体管的附加控制装置（20），其具有两个功能：其第一响应信号调制功能和额外的ESD保护功能。

9. 发明申请

US20050003771A1 Method and apparatus for automatic tuning of a resonant loop antenna in a transceiver circuit 有权
标题翻译：收发电路中谐振环形天线自动调谐的方法和装置
公开(公告)号：US20050003771A1
公开(公告)日：2005-01-06
申请号：US10891708
申请日：2004-07-15
申请人： Hendricus De Ruijter , Gabor Toth , Peter Onody , Andras Hegyi , Attila Zolomy , Matthijs Pardoen , Janos Erdelyi , Ferenc Mernyei
发明人： Hendricus De Ruijter , Gabor Toth , Peter Onody , Andras Hegyi , Attila Zolomy , Matthijs Pardoen , Janos Erdelyi , Ferenc Mernyei
IPC分类号： H01Q7/00 , H01Q23/00 , H04B1/04 , H01Q1/00 , H01Q11/12
CPC分类号： H01Q7/005 , H01Q23/00 , H04B1/0458
摘要： Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.
摘要翻译：公开了一种用于在具有接收器和发射机的收发器中自动调谐谐振电路的电路和方法，该收发器和发射器包括用于驱动谐振电路的功率放大器。在收发器的发送模式期间，将谐振电路的谐振电压与功率放大器的输入电压信号进行比较，以确定转换为控制字的误差信号。控制字驱动作为谐振电路一部分的可调电容组。在收发器的接收模式期间，控制字值保持恒定，以在接收机操作期间基本上保持谐振电路的谐振。

10. 发明授权

US5808510A Demodulator for the demodulation of a frequency-modulated signal 失效
标题翻译：用于解调调制信号的解调器
公开(公告)号：US5808510A
公开(公告)日：1998-09-15
申请号：US705192
申请日：1996-08-29
申请人： Johannes Gerrits , Matthijs Pardoen
发明人： Johannes Gerrits , Matthijs Pardoen
IPC分类号： H03D3/02 , H03D3/00 , H03D3/18
CPC分类号： H03D3/02
摘要： Radio receivers for frequency-modulated signals and more particularly, in such receivers, to a device for the demodulation of a signal modulated at intermediate frequency f.sub.i. The signal F.sub.M that is frequency modulated around a frequency f.sub.i is applied, after conversion into a square-wave signal F.sub.MR, to a delay line with shift registers that is controlled by the signals provided by an oscillator. Each of the three cascade-connected sections of the delay line introduces a delay 1/4f.sub.i and the output signals of each section are applied to EXCLUSIVE OR circuits that respectively give a demodulated signal F.sub.R1, a signal F.sub.R2 for the suppression of a demodulated signal and a signal F.sub.R3 to control the frequency of the oscillator.
摘要翻译：用于频率调制信号的无线电接收机，更具体地，在这样的接收机中，涉及用于解调在中间频率fi调制的信号的装置。在转换成方波信号FMR之后，频率调制频率fi的信号FM被施加到由振荡器提供的信号控制的移位寄存器的延迟线。延迟线的三个级联连接部分中的每一个引入延迟+ E，fra 1/4 + EE fi，并且每个部分的输出信号被施加到分别给出解调信号FR1的异或或电路，信号FR2用于抑制解调信号和信号FR3来控制振荡器的频率。

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