专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07750765B2 Compact via transmission line for printed circuit board and design method of the same 有权
标题翻译：紧凑型印刷电路板传输线及其设计方法相同
公开(公告)号：US07750765B2
公开(公告)日：2010-07-06
申请号：US12249273
申请日：2008-10-10
申请人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
发明人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
IPC分类号： H03H7/38 , H01P1/04
CPC分类号： H05K1/0222 , H01P3/06 , H05K1/024 , H05K1/0251 , H05K3/429 , H05K2201/0187 , H05K2201/09063 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band.
摘要翻译：一种用于具有优选特性阻抗并能够使包括多层印刷电路板的印刷电路板小型化并且扩展安装在印刷电路板上的通孔传输线的频率范围的印刷电路板的紧凑型通路传输线，以及设计方法一样的。传输线具有形成内导体层边界的中心导体，构成信号通孔，围绕中心导体布置的多个通孔形成外导体层边界，以及由印刷电路板导体形成的多个导体板通过传输线在压缩体的内部和外部导体层边界之间进一步设置本构参数调整间隙孔，并且电隔离以防止通过信号通孔传播的信号与其他信号在高电平中的串扰频率信号频带。

2. 发明授权

US07868257B2 Via transmission lines for multilayer printed circuit boards 有权
标题翻译：通过多层印刷电路板的传输线
公开(公告)号：US07868257B2
公开(公告)日：2011-01-11
申请号：US10598134
申请日：2005-03-09
申请人： Taras Kushta , Kaoru Narita , Hirokazu Tohya , Takanori Saeki , Tomoyuki Kaneko
发明人： Taras Kushta , Kaoru Narita , Hirokazu Tohya , Takanori Saeki , Tomoyuki Kaneko
IPC分类号： H01R12/04 , H05K1/11
CPC分类号： H05K1/0222 , H05K1/0269 , H05K3/429 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A via transmission line for a multilayer printed circuit board (PCB) in which a wave guiding channel is formed by a signal via or a number of signal vias, an assembly of ground vias surrounding the signal via or corresponding number of coupled signal vias, a set of ground plates from conductor layers of the multilayer PCB, and a clearance hole. In this via transmission line, the signal via, or the number of signal vias forms an inner conductive boundary, ground vias and ground plates from conductor layers of the multilayer PCB form an outer conductive boundary, and the clearance hole provides both isolation of the inner conductive boundary from the outer conductive boundary and high-performance broadband operation of the via transmission line by means of the predetermined clearance hole cross-sectional shape and dimensions where the cross-sectional shape of the clearance hole is defined by the arrangement of ground vias in the outer conductive boundary and dimensions of the clearance hole are determined according to a method to minimize frequency-dependent return losses caused by specific corrugations of the outer conductive boundary formed by ground plates in the wave guiding channel of the via transmission line.
摘要翻译：一种用于多层印刷电路板（PCB）的通孔传输线，其中通过信号通道或多个信号通路形成波导通道，围绕信号通孔或相应数量的耦合信号通孔的接地通孔的组件，多层PCB的导体层的接地板组以及间隙孔。在这个通过传输线路中，信号通孔或信号通道的数量形成内部导电边界，从多层PCB的导体层形成的接地孔和接地板形成外部导电边界，并且间隙孔提供内部通过外部导电边界的导电边界和通孔传输线的高性能宽带操作，借助于预定的间隙孔横截面形状和尺寸，其中间隙孔的横截面形状由接地通孔的布置根据通过在通孔传输线的波导通道中由接地板形成的外导电边界的特定波纹引起的频率相关的返回损耗的方法来确定间隙孔的外导电边界和尺寸。

3. 发明授权

US07463122B2 Compact via transmission line for printed circuit board and its designing method 有权
标题翻译：用于印刷电路板的紧凑型传输线及其设计方法
公开(公告)号：US07463122B2
公开(公告)日：2008-12-09
申请号：US10558888
申请日：2004-06-01
申请人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
发明人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
IPC分类号： H01P1/04
CPC分类号： H05K1/0222 , H01P3/06 , H05K1/024 , H05K1/0251 , H05K3/429 , H05K2201/0187 , H05K2201/09063 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band.
摘要翻译：一种用于具有优选特性阻抗并能够使包括多层印刷电路板的印刷电路板小型化并且扩展安装在印刷电路板上的通孔传输线的频率范围的印刷电路板的紧凑型通路传输线，以及设计方法一样的。传输线具有形成内导体层边界的中心导体，构成信号通孔，围绕中心导体布置的多个通孔形成外导体层边界，以及由印刷电路板导体形成的多个导体板通过传输线在压缩体的内部和外部导体层边界之间进一步设置本构参数调整间隙孔，并且电隔离以防止通过信号通孔传播的信号与其他信号在高电平中的串扰频率信号频带。

4. 发明申请

US20060255876A1 Compact via transmission line for printed circuit board and its designing method 有权
标题翻译：用于印刷电路板的紧凑型传输线及其设计方法
公开(公告)号：US20060255876A1
公开(公告)日：2006-11-16
申请号：US10558888
申请日：2004-06-01
申请人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
发明人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
IPC分类号： H01P5/02
CPC分类号： H05K1/0222 , H01P3/06 , H05K1/024 , H05K1/0251 , H05K3/429 , H05K2201/0187 , H05K2201/09063 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band.
摘要翻译：一种用于具有优选特性阻抗并能够使包括多层印刷电路板的印刷电路板小型化并且扩展安装在印刷电路板上的通孔传输线的频率范围的印刷电路板的紧凑型通路传输线，以及设计方法一样的。传输线具有形成内导体层边界的中心导体，构成信号通孔，围绕中心导体布置的多个通孔形成外导体层边界，以及由印刷电路板导体形成的多个导体板通过传输线在压缩体的内部和外部导体层边界之间进一步设置本构参数调整间隙孔，并且电隔离以防止通过信号通孔传播的信号与其他信号在高电平中的串扰频率信号频带。

5. 发明申请

US20070205847A1 Via transmission lines for multilayer printed circuit boards 有权
标题翻译：通过多层印刷电路板的传输线
公开(公告)号：US20070205847A1
公开(公告)日：2007-09-06
申请号：US10598134
申请日：2005-03-09
申请人： Taras Kushta , Kaoru Narita , Hirokazu Tohya , Takanori Saeki , Tomoyuki Kaneko
发明人： Taras Kushta , Kaoru Narita , Hirokazu Tohya , Takanori Saeki , Tomoyuki Kaneko
IPC分类号： H01P5/02
CPC分类号： H05K1/0222 , H05K1/0269 , H05K3/429 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A via transmission line for a multilayer printed circuit board (PCB) in which a wave guiding channel is formed by a signal via or a number of signal vias, an assembly of ground vias surrounding the signal via or corresponding number of coupled signal vias, a set of ground plates from conductor layers of the multilayer PCB, and a clearance hole. In this via transmission line, the signal via, or the number of signal vias forms an inner conductive boundary, ground vias and ground plates from conductor layers of the multilayer PCB form an outer conductive boundary, and the clearance hole provides both isolation of the inner conductive boundary from the outer conductive boundary and high-performance broadband operation of the via transmission line by means of the predetermined clearance hole cross-sectional shape and dimensions where the cross-sectional shape of the clearance hole is defined by the arrangement of ground vias in the outer conductive boundary and dimensions of the clearance hole are determined according to a method to minimize frequency-dependent return losses caused by specific corrugations of the outer conductive boundary formed by ground plates in the wave guiding channel of the via transmission line.
摘要翻译：一种用于多层印刷电路板（PCB）的通孔传输线，其中通过信号通道或多个信号通路形成波导通道，围绕信号通孔或相应数量的耦合信号通孔的接地通孔的组件，多层PCB的导体层的接地板组以及间隙孔。在这个通过传输线路中，信号通孔或信号通道的数量形成内部导电边界，从多层PCB的导体层形成的接地孔和接地板形成外部导电边界，并且间隙孔提供内部通过外部导电边界的导电边界和通孔传输线的高性能宽带操作，借助于预定的间隙孔横截面形状和尺寸，其中间隙孔的横截面形状由接地通孔的布置根据通过在通孔传输线的波导通道中由接地板形成的外导电边界的特定波纹引起的频率相关的返回损耗的方法来确定间隙孔的外导电边界和尺寸。

6. 发明授权

US08013685B2 Broadband transition from a via interconnection to a planar transmission line in a multilayer substrate 有权
标题翻译：从多孔衬底中的通孔互连到平面传输线的宽带转变
公开(公告)号：US08013685B2
公开(公告)日：2011-09-06
申请号：US12281460
申请日：2007-03-02
申请人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
发明人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
IPC分类号： H03H7/38
CPC分类号： H05K1/116 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0251 , H05K3/429 , H05K2201/09381 , H05K2201/09636 , H05K2201/09718 , H05K2201/09727
摘要： According to one embodiment, a broadband transition to joint a via structure and a planar transmission line in a multilayer substrate is formed as an intermediate connection between the signal via pad and the planar transmission line disposed at the same conductor layer. The transverse dimensions of the transition are equal to the via pad diameter at the one end and strip width at another end; The length of the transition can be equal to the characteristic dimensions of the clearance hole in the direction of the planar transmission line or defined as providing the minimal excess inductive reactance in time-domain according to numerical diagrams obtained by three-dimensional full-wave simulations.
摘要翻译：根据一个实施例，形成在多层基板中连接通孔结构和平面传输线的宽带转变，作为信号通孔焊盘和布置在相同导体层处的平面传输线之间的中间连接。过渡的横向尺寸等于一端的通孔焊盘直径和另一端的带宽度; 转换的长度可以等于平面传输线方向上的间隙孔的特征尺寸，或者定义为根据通过三维全波模拟获得的数值图在时域中提供最小的额外的电抗。

7. 发明申请

US20090015345A1 BROADBAND TRANSITION FROM A VIA INTERCONNECTION TO A PLANAR TRANSMISSION LINE IN A MULTILAYER SUBSTRATE 有权
标题翻译：从多通道基板中的平面传输线的宽带连接过渡到宽带传输
公开(公告)号：US20090015345A1
公开(公告)日：2009-01-15
申请号：US12281460
申请日：2007-03-02
申请人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
发明人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
IPC分类号： H03H7/38
CPC分类号： H05K1/116 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0251 , H05K3/429 , H05K2201/09381 , H05K2201/09636 , H05K2201/09718 , H05K2201/09727
摘要： According to one embodiment, a broadband transition to joint a via structure and a planar transmission line in a multilayer substrate is formed as an intermediate connection between the signal via pad and the planar transmission line disposed at the same conductor layer. The transverse dimensions of the transition are equal to the via pad diameter at the one end and strip width at another end; The length of the transition can be equal to the characteristic dimensions of the clearance hole in the direction of the planar transmission line or defined as providing the minimal excess inductive reactance in time-domain according to numerical diagrams obtained by three-dimensional full-wave simulations.
摘要翻译：根据一个实施例，形成在多层基板中连接通孔结构和平面传输线的宽带转变，作为信号通孔焊盘和布置在相同导体层处的平面传输线之间的中间连接。过渡的横向尺寸等于一端的通孔焊盘直径和另一端的带宽度; 转换的长度可以等于平面传输线方向上的间隙孔的特征尺寸，或者定义为根据通过三维全波模拟获得的数值图在时域中提供最小的额外的电抗。

8. 发明授权

US08085112B2 Broadband transition from a via interconnection to a planar transmission line in a multilayer substrate 有权
标题翻译：从多孔衬底中的通孔互连到平面传输线的宽带转变
公开(公告)号：US08085112B2
公开(公告)日：2011-12-27
申请号：US13187910
申请日：2011-07-21
申请人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
发明人： Taras Kushta , Kaoru Narita , Tomoyuki Kaneko , Shin-ichi Ogou
IPC分类号： H03H7/38
CPC分类号： H05K1/116 , H05K1/0219 , H05K1/0222 , H05K1/0245 , H05K1/0251 , H05K3/429 , H05K2201/09381 , H05K2201/09636 , H05K2201/09718 , H05K2201/09727
摘要： According to one embodiment, a broadband transition to joint a via structure and a planar transmission line in a multilayer substrate is formed as an intermediate connection between the signal via pad and the planar transmission line disposed at the same conductor layer. The transverse dimensions of the transition are equal to the via pad diameter at the one end and strip width at another end; the length of the transition can be equal to the characteristic dimensions of the clearance hole in the direction of the planar transmission line or defined as providing the minimal excess inductive reactance in time-domain according to numerical diagrams obtained by three-dimensional full-wave simulations.
摘要翻译：根据一个实施例，形成在多层基板中连接通孔结构和平面传输线的宽带转变，作为信号通孔焊盘和布置在相同导体层处的平面传输线之间的中间连接。过渡的横向尺寸等于一端的通孔焊盘直径和另一端的带宽度; 转换的长度可以等于平面传输线方向上的间隙孔的特征尺寸，或者根据通过三维全波模拟获得的数字图，定义为在时域中提供极小的超额感抗。

9. 发明申请

US20090133913A1 VERTICAL TRANSITIONS, PRINTED CIRCUIT BOARDS THEREWITH AND SEMICONDUCTOR PACKAGES WITH THE PRINTED CIRCUIT BOARDS AND SEMICONDUCTOR CHIP 有权
标题翻译：垂直转换，印刷电路板和印刷电路板和半导体芯片的半导体封装
公开(公告)号：US20090133913A1
公开(公告)日：2009-05-28
申请号：US12089483
申请日：2006-10-10
申请人： Taras Kushta , Kaoru Narita
发明人： Taras Kushta , Kaoru Narita
IPC分类号： H05K1/16 , H05K1/00
CPC分类号： H05K1/0222 , H01L23/49827 , H01L23/49838 , H01L2223/6622 , H01L2224/16235 , H01L2924/01004 , H01L2924/01057 , H01L2924/01087 , H01L2924/3011 , H01L2924/3025 , H05K1/115 , H05K1/116 , H05K3/429 , H05K2201/093 , H05K2201/09618 , H05K2201/09636 , H05K2201/09663 , H05K2201/09718
摘要： Provided are vertical transitions which have the high electrical performance and the high shielding properties in the wide frequency band in a multilayer PCB, printed circuit boards with the vertical transitions and semiconductor packages with the printed circuit boards and semiconductor chips. In vertical transitions for a multilayer PCB, a wave guiding channel is a conductor which includes at least more than one of signal vias 201, an assembly of ground vias 202 surrounding the signal via, ground plates from conductor layers of the PCB connected to the ground vias, closed ground striplines 205 connecting the ground vias and power supply layer.
摘要翻译：提供了在多层PCB中的宽频带中具有高电性能和高屏蔽性能的垂直转换，具有垂直转换的印刷电路板和具有印刷电路板和半导体芯片的半导体封装。在多层PCB的垂直转换中，波导通道是包括至少多于一个信号通孔201的导体，围绕信号通孔的接地通孔202的组件，与连接到地面的PCB的导体层的接地板通孔，连接接地通孔和电源层的闭合接地带状线205。

10. 发明申请

US20090015266A1 RESONATOR, PRINTED BOARD, AND METHOD FOR MEASURING COMPLEX DIELECTRIC CONSTANT 有权
标题翻译：谐振器，打印板和测量复合电介质常数的方法
公开(公告)号：US20090015266A1
公开(公告)日：2009-01-15
申请号：US11817280
申请日：2006-03-22
申请人： Kaoru Narita , Taras Kushta
发明人： Kaoru Narita , Taras Kushta
IPC分类号： G01R31/12 , H01P3/02
CPC分类号： H05K1/0268 , G01R27/2617 , G01R31/2805 , H05K1/16 , H05K3/429 , H05K2201/09618 , H05K2201/10068
摘要： A plurality of through-hole vias connected to conductor layers is disposed with gaps left between these vias around opening parts disposed in the conductor layers in a printed board in which these conductor layers are disposed parallel to each other so as to sandwich a dielectric layer in between. Furthermore, through-hole vias used for excitation are disposed in the opening parts of the conductor layers and regions of the dielectric layer matching these opening parts in a non-contact manner with the conductor layers. When the complex dielectric constant is measured, a high-frequency power is applied to the through-hole vias, and the power loss between the through-hole vias and the conductor layers is measured by the S parameter method. As a result, the complex dielectric constant and the frequency dependency of this complex dielectric constant can be measured with a high precision in a frequency range extending from several gigahertzes to 20 GHz, and there is no electrical interference with other parts even when this resonator is mounted on a board.
摘要翻译：连接到导体层的多个通孔过孔被布置成在印刷电路板的布置在导体层中的开口部分周围的这些通孔之间留有间隙，其中这些导体层彼此平行设置，以将电介质层夹在之间。此外，用于激励的通孔过孔以与导体层非接触的方式设置在导体层的开口部分和与这些开口部分匹配的电介质层的区域。当测量复介电常数时，对通孔通孔施加高频功率，通过S参数法测量通孔和导体层之间的功率损耗。结果，可以在从几千兆赫到20GHz的频率范围内以高精度测量该复合介电常数的复介电常数和频率依赖性，即使该谐振器是安装在板上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式