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    • 5. 发明授权
    • Display device and manufacturing method thereof
    • 显示装置及其制造方法
    • US08368077B2
    • 2013-02-05
    • US12578641
    • 2009-10-14
    • Takeshi KuriyagawaTakeshi NodaTakuo Kaitoh
    • Takeshi KuriyagawaTakeshi NodaTakuo Kaitoh
    • H01L27/14
    • H01L27/124H01L27/1248H01L29/66765
    • A second insulation layer which is formed by stacking a plurality of layers made of different materials in a mutually contact manner is formed such that the second insulation layer covers a source region and a drain region and also covers a gate electrode from above. A first contact hole which reaches one of the source region and the drain region and a recessed portion which is arranged above the gate electrode but is not communicated with the gate electrode are simultaneously formed on the second insulation layer by dry etching. A first line layer is formed so as to cover the first contact hole. After forming the first line layer, a bottom surface of the recessed portion is etched by dry etching thus forming a second contact hole which reaches the gate electrode in the first and second insulation layers. A second line layer is formed on the second contact hole.
    • 形成通过以相互接触的方式堆叠由不同材料制成的多个层而形成的第二绝缘层,使得第二绝缘层覆盖源极区域和漏极区域并且还从上方覆盖栅极电极。 通过干法蚀刻在第二绝缘层上同时形成到达源极区域和漏极区域中的一个的第一接触孔和设置在栅电极上方但不与栅电极连通的凹部。 第一线层形成为覆盖第一接触孔。 在形成第一线层之后,通过干蚀刻蚀刻凹陷部分的底表面,从而形成到达第一和第二绝缘层中的栅电极的第二接触孔。 在第二接触孔上形成第二线层。
    • 7. 发明授权
    • Display device with impurities formed within connection regions
    • 在连接区域内形成杂质的显示装置
    • US08110833B2
    • 2012-02-07
    • US12536645
    • 2009-08-06
    • Takeshi KuriyagawaTakeshi NodaTakuo Kaitoh
    • Takeshi KuriyagawaTakeshi NodaTakuo Kaitoh
    • H01L21/336H01L33/00
    • H01L29/78621H01L29/458
    • A display device includes: a transparent substrate; gate electrodes which are stacked on the transparent substrate; semiconductor films which are stacked above the gate electrodes and constitute thin film transistors together with the gate electrodes; source electrodes and drain electrodes which are formed above the semiconductor films; an insulation film which is stacked between the source electrodes and the semiconductor films and between the drain electrodes and the semiconductor films; and contact holes which are formed in the insulation film so as to connect the source electrodes and the drain electrodes with the semiconductor films. The semiconductor film includes a connection region which is positioned at least below the contact hole and is connected with the source electrode, and a connection region which is positioned at least below the contact hole and is connected with the drain electrode, and impurities are implanted into the connection regions.
    • 显示装置包括:透明基板; 层叠在透明基板上的栅电极; 叠层在栅电极上方并与栅电极一起构成薄膜晶体管的半导体膜; 源电极和漏极形成在半导体膜上方; 堆叠在源电极和半导体膜之间以及漏电极和半导体膜之间的绝缘膜; 以及形成在绝缘膜中的接触孔,以便将源电极和漏电极与半导体膜连接。 半导体膜包括至少位于接触孔下方并与源电极连接的连接区域以及至少位于接触孔下方并与漏电极连接的连接区域,并将杂质注入 连接区域。
    • 8. 发明申请
    • DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    • 显示装置及其制造方法
    • US20100096645A1
    • 2010-04-22
    • US12579428
    • 2009-10-15
    • Daisuke SonodaToshio MiyazawaTakuo KaitohYasukazu KimuraTakeshi KuriyagawaTakeshi Noda
    • Daisuke SonodaToshio MiyazawaTakuo KaitohYasukazu KimuraTakeshi KuriyagawaTakeshi Noda
    • H01L33/00
    • H01L27/1288H01L27/1214H01L27/124H01L27/1248
    • A manufacturing method of a display device and a display device which can reduce the number of times that an insulation substrate is put into a CVD device and is taken out from the CVD device are provided. The manufacturing method of a display device includes the steps of forming a conductive layer including first electrode films and second electrode films, a first insulation layer, semiconductor films, a second insulation layer and a protective layer on an insulation substrate; forming first resist films having a predetermined thickness which are arranged in first regions above the semiconductor films, opening portions which are arranged in second regions above the second electrode films and second resist films having a large thickness which are arranged in regions other than the first regions and the second regions on the protective layer; etching portions below the second regions, removing the first resist films by ashing; forming first holes which reach the semiconductor films below the first regions and second holes which reach the second electrode films below the second regions; removing the second resist films, and forming lines which are connected to the semiconductor films and lines which are connected to the second electrode films.
    • 提供了可以减少将绝缘基板放入CVD装置并从CVD装置中取出的次数的显示装置和显示装置的制造方法。 显示装置的制造方法包括在绝缘基板上形成包括第一电极膜和第二电极膜的导电层,第一绝缘层,半导体膜,第二绝缘层和保护层的步骤; 形成具有预定厚度的第一抗蚀剂膜,其布置在半导体膜上方的第一区域中,布置在第二电极膜上方的第二区域中的开口部分和布置在除了第一区域之外的区域中的具有大厚度的第二抗蚀剂膜 和保护层上的第二区域; 蚀刻第二区域下方的部分,通过灰化去除第一抗蚀剂膜; 形成在第一区域下方到达半导体膜的第一孔和在第二区域下方到达第二电极膜的第二孔; 去除第二抗蚀剂膜,以及形成连接到半导体膜的线和连接到第二电极膜的线。
    • 9. 发明申请
    • Display Device and Manufacturing Method Thereof
    • 显示装置及其制造方法
    • US20130193440A1
    • 2013-08-01
    • US13792404
    • 2013-03-11
    • Takeshi KuriyagawaJun Fujiyoshi
    • Takeshi KuriyagawaJun Fujiyoshi
    • H01L33/42
    • H01L33/42H01L27/124H01L29/4908
    • A display device in which a plurality of gate wires and a plurality of drain wires that intersect the gate wires are provided, and thin film transistors connected to the gate wires and the drain wires are formed for respective pixel regions. At least one of the gate wires, the drain wires, and lead wires drawn from the gate wires or the drain wires is formed of a light-transmitting patterned conductive film. The light-transmitting patterned conductive film is formed of at least a first light-transmitting patterned conductive film, and a second light-transmitting patterned conductive film laminated on the first light-transmitting patterned conductive film. The second light-transmitting patterned conductive film is formed of a conductive film for coating only the surface of the first light-transmitting patterned conductive film including its side wall surface.
    • 设置有与栅极布线相交的多个栅极布线和多个漏极布线的显示装置,并且为各像素区域形成与栅极布线和漏极布线连接的薄膜晶体管。 栅极线,漏极线以及从栅极线或漏极导线引出的引线中的至少一个由透光图案化的导电膜形成。 透光图案化导电膜由至少第一透光图案化导电膜和层压在第一透光图案化导电膜上的第二透光图案化导电膜形成。 第二透光图案化导电膜由仅用于涂覆包括其侧壁表面的第一透光图案化导电膜的表面的导电膜形成。
    • 10. 发明申请
    • MANUFACTURING METHOD OF DISPLAY DEVICE
    • 显示装置的制造方法
    • US20080070351A1
    • 2008-03-20
    • US11857481
    • 2007-09-19
    • Eiji OueYasukazu KimuraDaisuke SonodaToshiyuki MatsuuraTakeshi Kuriyagawa
    • Eiji OueYasukazu KimuraDaisuke SonodaToshiyuki MatsuuraTakeshi Kuriyagawa
    • H01L21/84
    • H01L27/1288H01L27/1255H01L29/78645
    • In a display device manufacturing method including a step of forming a semiconductor film above a substrate and a step of implanting an impurity to each of a first semiconductor film in a first region of the substrate, a second semiconductor film in a second region outside the first region, and a third semiconductor film in a third region outside the first and second regions, the implanting step includes: a first step of forming a first resist above the substrate so as to be thicker in the first region than in the second region, the first resist covering the first and second regions and having an opening in the third region; a second step of implanting an impurity to only the third semiconductor in the third region using the first resist as a mask; a third step of thinning the first resist so as to form a second resist that covers the first region and has an opening in each of second and third regions; a fourth step of implanting an impurity to the second and third semiconductor films in the second and third regions simultaneously using the second resist as a mask; and a fifth step of implanting an impurity to the first to third semiconductor films in the first to third regions simultaneously.
    • 在包括在衬底上形成半导体膜的步骤和在衬底的第一区域中向第一半导体膜中的每一个注入杂质的步骤的显示器件制造方法中,在第一区域之外的第二区域中的第二半导体膜 区域,以及在第一和第二区域外的第三区域中的第三半导体膜,所述注入步骤包括:第一步骤,在所述衬底上方形成第一抗蚀剂,使其在所述第一区域中比在所述第二区域中更厚, 第一抗蚀剂覆盖第一和第二区域并且在第三区域中具有开口; 使用第一抗蚀剂作为掩模将杂质注入第三区域中的第三半导体的第二步骤; 第三步骤,使第一抗蚀剂变薄以形成覆盖第一区域并在第二和第三区域中的每一个具有开口的第二抗蚀剂; 第四步骤,使用第二抗蚀剂作为掩模,将杂质注入第二和第三区域中的第二和第三半导体膜; 以及将第一至第三区域中的第一至第三半导体膜同时注入杂质的第五步骤。