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    • 1. 发明授权
    • Forming of local and global wiring for semiconductor product
    • 形成半导体产品的本地和全球接线
    • US07071099B1
    • 2006-07-04
    • US10908623
    • 2005-05-19
    • Stephen E. GrecoTheodorus E. Standaert
    • Stephen E. GrecoTheodorus E. Standaert
    • H01L21/4763
    • H01L21/76816H01L21/76807H01L21/76838H01L23/5283H01L2924/0002H01L2924/00
    • Methods of forming different back-end-of-line (BEOL) wiring for different circuits on the same semiconductor product, i.e., wafer or chip, are disclosed. In one embodiment, the method includes simultaneously generating BEOL wiring over a first circuit using a dual damascene structure in a first dielectric layer, and BEOL wiring over a second circuit using a single damascene via structure in the first dielectric layer. Then, simultaneously generating BEOL wiring over the first circuit using a dual damascene structure in a second dielectric layer, and BEOL wiring over the second circuit using a single damascene line wire structure in the second dielectric layer. The single damascene via structure has a width approximately twice that of a via portion of the dual damascene structures and the single damascene line wire structure has a width approximately twice that of a line wire portion of the dual damascene structures. A semiconductor product having different width BEOL wiring for different circuits is also disclosed.
    • 公开了在同一半导体产品即晶片或芯片上形成用于不同电路的不同后端线(BEOL)布线的方法。 在一个实施例中,该方法包括使用第一电介质层中的双镶嵌结构在第一电路上同时产生BEOL布线,以及使用第一电介质层中的单镶嵌通孔结构的第二电路上的BEOL布线。 然后,使用第二电介质层中的双镶嵌结构同时在第一电路上产生BEOL布线,并且在第二电介质层中使用单个镶嵌线线结构在第二电路上生成BEOL布线。 单个镶嵌通孔结构的宽度大约是双镶嵌结构的通孔部分的宽度的两倍,并且单镶嵌线结构的宽度大约是双镶嵌结构的线丝部分的宽度的两倍。 还公开了一种用于不同电路的具有不同宽度的BEOL布线的半导体产品。