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1. 发明申请

US20080235939A1 Manufacturing Method For Micro-SD Flash Memory Card 审中-公开
标题翻译： Micro-SD闪存卡制造方法
公开(公告)号：US20080235939A1
公开(公告)日：2008-10-02
申请号：US12033851
申请日：2008-02-19
申请人： Siew S. Hiew , Charles C. Lee , Paul Hsueh , Abraham C. Ma , Ming-Shiang Shen
发明人： Siew S. Hiew , Charles C. Lee , Paul Hsueh , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： H05K3/20 , G11C11/34
CPC分类号： H05K3/284 , H01L21/561 , H01L24/97 , H01L2224/48227 , H01L2224/97 , H01L2924/01029 , H01L2924/14 , H01L2924/1815 , H05K1/117 , H05K3/0032 , H05K3/0052 , H05K2201/09154 , H05K2201/10159 , H05K2203/0228 , H05K2203/0746 , H05K2203/1316 , Y10T29/49126 , Y10T29/49128 , Y10T29/49146 , Y10T29/49147 , Y10T29/49171 , Y10T29/49789 , Y10T29/49798 , H01L2224/85 , H01L2924/00
摘要： A method for fabricating MicroSD devices includes forming a PCB panel having multiple PCB regions arranged in parallel rows. Passive components are attached by conventional surface mount technology (SMT) techniques. IC chips, including a MicroSD controller chip and a flash memory chip, are attached to the PCB by wire bonding or other chip-on-board (COB) technique. A molded layer is then formed over the IC chips and passive components using a mold that prevents formation of plastic on the upper surface of each PCB. The panel is then singulated using one of a laser cutting method, an abrasive water jet cutting method, and a mechanical grinding method such that the resulting PCB substrate and plastic housing have the width, height and length specified by MicroSD specifications. A front edge chamfer process is then performed.
摘要翻译：一种用于制造MicroSD器件的方法包括形成具有平行排布置的多个PCB区域的PCB面板。无源元件通过常规表面贴装技术（SMT）技术连接。包括MicroSD控制器芯片和闪存芯片在内的IC芯片通过引线接合或其他芯片上的（COB）芯片技术连接到PCB。然后使用防止在每个PCB的上表面上形成塑料的模具在IC芯片和无源部件上形成模制层。然后使用激光切割方法，磨料水射流切割方法和机械研磨方法之一将面板切片，使得所得PCB基板和塑料外壳具有由MicroSD规格规定的宽度，高度和长度。然后执行前沿倒角处理。

2. 发明授权

US07830666B2 Manufacturing process for single-chip MMC/SD flash memory device with molded asymmetric circuit board 失效
标题翻译：具有模制非对称电路板的单芯片MMC / SD闪存器件的制造工艺
公开(公告)号：US07830666B2
公开(公告)日：2010-11-09
申请号：US11831888
申请日：2007-07-31
申请人： Siew S. Hiew , Jim C. Ni , Paul Hsueh , Charles C. Lee , Ming-Shiang Shen
发明人： Siew S. Hiew , Jim C. Ni , Paul Hsueh , Charles C. Lee , Ming-Shiang Shen
IPC分类号： H05K7/02 , H05K3/28
CPC分类号： H05K3/284 , H01L23/544 , H01L24/48 , H01L24/97 , H01L2223/54406 , H01L2223/54433 , H01L2223/54486 , H01L2224/32145 , H01L2224/48091 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H05K1/117 , H05K2201/09936 , H05K2201/10159 , Y10T29/49126 , H01L2224/85 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An MMC/SD core unit includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips include, for example, a controller chip and a flash memory chip, or a single-chip (combined controller/flash memory) chip. Multiple flash IC chips are optionally stacked to increase storage capacity. The IC chip(s) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. A molded housing is then formed over the IC chips and passive components such that the device has a uniform thickness. The MMC/SD core unit is then inserted or otherwise mounted in an eternal casing to provide a finished MMC/SD device.
摘要翻译： MMC / SD核心单元包括PCBA，其中所有无源组件和未封装的IC芯片附接到与金属触点相对的PCB的单侧。 IC芯片例如包括控制器芯片和闪存芯片，或单芯片（组合的控制器/闪存）芯片。可选择堆叠多个闪存IC芯片以增加存储容量。 IC芯片通过引线接合或其他芯片上（COB）芯片技术连接到PCB。无源元件通过传统的表面贴装技术（SMT）技术连接起来。然后在IC芯片和无源部件上形成模制外壳，使得该装置具有均匀的厚度。然后将MMC / SD核心单元插入或以其他方式安装在永久壳体中以提供完成的MMC / SD设备。

3. 发明授权

US07872871B2 Molding methods to manufacture single-chip chip-on-board USB device 有权
标题翻译：制造单芯片片上USB设备的成型方法
公开(公告)号：US07872871B2
公开(公告)日：2011-01-18
申请号：US11773830
申请日：2007-07-05
申请人： Siew S. Hiew , Jim C. Ni , Charles C. Lee , I-Kang Yu , Ming-Shiang Shen
发明人： Siew S. Hiew , Jim C. Ni , Charles C. Lee , I-Kang Yu , Ming-Shiang Shen
IPC分类号： H05K7/02
CPC分类号： G06F1/1632 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01074 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2924/14 , H01L2924/19041 , H05K1/117 , H05K3/0052 , H05K3/284 , H05K5/0278 , H05K2203/1316 , H01L2924/00014 , H01L2224/85
摘要： A low-profile Universal-Serial-Bus (USB) device includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips include, for example, a USB controller chip and a flash memory chip, or a single-chip (combined USB controller/flash memory) chip. Multiple flash IC chips are optionally stacked to increase storage capacity. The IC chip(s) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. A molded housing is then formed over the IC chips and passive components such that the device has a uniform thickness. The low-profile USB device is optionally used as a modular insert that is mounted onto a metal case to provide a USB assembly having a plug shell similar to a standard USB male connector.
摘要翻译：一个低调的通用串行总线（USB）设备包括一个PCBA，其中所有无源组件和未封装的IC芯片都连接到与金属触点相对的PCB的单面。 IC芯片例如包括USB控制器芯片和闪存芯片，或单芯片（组合的USB控制器/闪存）芯片。可选择堆叠多个闪存IC芯片以增加存储容量。 IC芯片通过引线接合或其他芯片上（COB）芯片技术连接到PCB。无源元件通过传统的表面贴装技术（SMT）技术连接起来。然后在IC芯片和无源部件上形成模制外壳，使得该装置具有均匀的厚度。低调USB设备可选地用作安装在金属外壳上的模块化插件，以提供具有类似于标准USB公连接器的插头外壳的USB组件。

4. 发明授权

US08108590B2 Multi-operation write aggregator using a page buffer and a scratch flash block in each of multiple channels of a large array of flash memory to reduce block wear 失效
标题翻译：多操作写入聚合器使用大量闪存存储器的多个通道中的每个通道中的页面缓冲区和划痕闪存块来减少块磨损
公开(公告)号：US08108590B2
公开(公告)日：2012-01-31
申请号：US12139842
申请日：2008-06-16
申请人： David Q. Chow , Frank Yu , Charles C. Lee , Abraham C. Ma , Ming-Shiang Shen
发明人： David Q. Chow , Frank Yu , Charles C. Lee , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F21/32 , G06F21/78 , G06F2212/1036 , G06F2212/7202 , G06F2212/7208 , G06K19/07 , G06K19/07354
摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.
摘要翻译：闪存系统具有可以并行访问的多个闪存芯片的通道。主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。发生STOP命令时，页面缓冲区被复制到AFB。每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。

5. 发明授权

US07890846B2 Electronic data flash card with Reed Solomon error detection and correction capability 失效
标题翻译：电子数据闪存卡，具有Reed Solomon错误检测和校正功能
公开(公告)号：US07890846B2
公开(公告)日：2011-02-15
申请号：US11739613
申请日：2007-04-24
申请人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
发明人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： H03M13/00
CPC分类号： H03M13/1545 , G06F11/1068 , G06F11/1076 , H03M13/153 , H03M13/1535 , H03M13/6561
摘要： One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.
摘要翻译：本发明的一个实施例包括具有Reed Solomon（RS）解码器的电子数据存储卡，该解码器具有响应于信息页的校正子计算器块，该页被组织成多个数据段，并且开销被组织成多个架空部分。综合征计算器为每个数据部分产生综合征。解码器还包括响应于所计算的校正子并用于生成至少两个根的根取景器块，响应于至少两个根并且可操作地生成至少一个错误地址的多项式计算器块，识别数据中的位置，其中，并且错误符号值计算器块耦合到根查找器和多项式计算器块，并用于产生第二错误地址，识别错误所在的数据中的第二位置。

6. 发明授权

US07702831B2 Flash memory controller for electronic data flash card 失效
标题翻译：闪存控制器，用于电子数据闪存卡
公开(公告)号：US07702831B2
公开(公告)日：2010-04-20
申请号：US11466759
申请日：2006-08-23
申请人： Abraham C. Ma , Charles C. Lee , I-Kang Yu , Edward W. Lee , Ming-Shiang Shen
发明人： Abraham C. Ma , Charles C. Lee , I-Kang Yu , Edward W. Lee , Ming-Shiang Shen
IPC分类号： G06F13/12
CPC分类号： G06F12/0246 , G06F12/1416 , G06F21/32 , G06F21/78 , G06F21/79 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087
摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.
摘要翻译：电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

7. 发明授权

US07657692B2 High-level bridge from PCIE to extended USB 失效
标题翻译：从PCIE到扩展USB的高级桥
公开(公告)号：US07657692B2
公开(公告)日：2010-02-02
申请号：US11926636
申请日：2007-10-29
申请人： Charles C. Lee , David Q. Chow , Abraham C. Ma , Frank Yu , Ming-Shiang Shen , Horng-Yee Chou
发明人： Charles C. Lee , David Q. Chow , Abraham C. Ma , Frank Yu , Ming-Shiang Shen , Horng-Yee Chou
IPC分类号： G06F13/00
CPC分类号： G06F13/28 , G06F12/1416 , G06F21/32 , G06F21/78 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087
摘要： An extended universal-serial bus (EUSB) bridge to a host computer can have peripheral component interconnect express (PCIE) protocol layers on one side of the bridge, and EUSB layers on the other side of the bridge, with a high-level bridging converter module connecting the upper layers. The PCIE physical, data-link, and transport layers may be eliminated by integrating the bridge with an I/O controller. PCIE requests and data payloads are directly sent to the bridge, rather than low-level PCIE physical signals. The PCIE data payloads are converted to EUSB data payloads by a high-level direct bridging converter module. Then the EUSB data payloads are passed down to an EUSB transaction layer, an EUSB data-link layer, and an EUSB physical layer which drives and senses physical electrical signals on both differential pairs of the EUSB bus.
摘要翻译：到主机的扩展通用串行总线（EUSB）桥可以在桥的一侧具有外围组件互连快速（PCIE）协议层，并且在桥的另一侧可以具有高级桥接转换器模块连接上层。可以通过将桥与I / O控制器集成来消除PCIE物理，数据链路和传输层。 PCIE请求和数据有效载荷直接发送到桥，而不是低级PCIE物理信号。 PCIE数据有效载荷通过高级直接桥接转换器模块转换为EUSB数据有效载荷。然后，EUSB数据有效载荷被传递到EUSB事务层，EUSB数据链路层和EUSB物理层，其在EUSB总线的两个差分对上驱动和感测物理电信号。

8. 发明申请

US20080147964A1 USING VARIOUS FLASH MEMORY CELLS TO BUILD USB DATA FLASH CARDS WITH MULTIPLE PARTITIONS AND AUTORUN FUNCTION 审中-公开
标题翻译：使用各种闪存存储器来构建具有多个分区和自动功能的USB数据闪存卡
公开(公告)号：US20080147964A1
公开(公告)日：2008-06-19
申请号：US11867610
申请日：2007-10-04
申请人： David Q. Chow , Charles C. Lee , Frank I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
发明人： David Q. Chow , Charles C. Lee , Frank I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： G06F12/00
CPC分类号： G06F21/34 , G06F3/0632 , G06F3/0644 , G06F3/0664 , G06F3/0679 , G06F21/32
摘要： An electronic data flash card includes a processor and at least one flash memory device. The flash memory is partitioned such that it includes a first partition that is formatted using a file system that supports an Autorun function (e.g., CD-ROM file system (CDFS) format, fixed-disk format or Universal Disk Format (UDF)), and a disk partition that is formatted using a typical controller-based flash device file system (e.g., 16-bit File Allocation Table (FAT16) file system, 32-bit FAT (FAT32) file system, or New Technology File System (NTFS)). The electronic data flash card is produced such that Autorun-enabled application automatically executes a predetermined application or action when the electronic data flash card is installed in a host system. In one embodiment, the Autorun application includes an advertisement displayed on the host system prior to allowing access to data stored in the disk partition.
摘要翻译：电子数据闪存卡包括处理器和至少一个闪存设备。闪存被分区，使得其包括使用支持自动运行功能的文件系统（例如，CD-ROM文件系统（CDFS）格式，固定磁盘格式或通用磁盘格式（UDF））格式化的第一分区，以及使用典型的基于控制器的闪存设备文件系统（例如，16位文件分配表（FAT16）文件系统，32位FAT（FAT32）文件系统或新技术文件系统（NTFS））格式化的磁盘分区，）。生成电子数据闪存卡，使得当电子数据闪存卡安装在主机系统中时，自动运行应用程序自动执行预定的应用或动作。在一个实施例中，自动运行应用程序在允许访问存储在磁盘分区中的数据之前包括在主机系统上显示的广告。

9. 发明申请

US20080071976A1 ELECTRONIC DATA FLASH CARD WITH VARIOUS FLASH MEMORY CELLS 审中-公开
公开(公告)号：US20080071976A1
公开(公告)日：2008-03-20
申请号：US11929825
申请日：2007-10-30
申请人： David Q. Chow , Frank I Yu , Charles C. Lee , Abraham C. Ma , Ming-Shiang Shen
发明人： David Q. Chow , Frank I Yu , Charles C. Lee , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/1416 , G06F21/32 , G06F21/78 , G06F2212/7202 , G06F2212/7208 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087
摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

10. 发明授权

US07962836B1 Electronic data flash card with bose, ray-chaudhuri, hocquenghem (BCH) error detection/correction 有权
标题翻译：电子数据闪存卡与bose，ray-chaudhuri，hocquenghem（BCH）错误检测/纠正
公开(公告)号：US07962836B1
公开(公告)日：2011-06-14
申请号：US11657243
申请日：2007-01-24
申请人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
发明人： Charles C. Lee , I-Kang Yu , Abraham C. Ma , Ming-Shiang Shen
IPC分类号： H03M13/00
CPC分类号： H03M13/1545 , G06F7/724 , H03M13/152 , H03M13/1575
摘要： A Bose, Ray-Chaudhuri, Hocquenghem (BCH) decoder is employed in non-volatile memory applications for determining the number of errors and locating the errors in a page of information. The decoder includes a syndrome calculator responsive to a sector of information. The sector includes data and overhead, with the data being organized into data sections and the overhead being organized into overhead sections. The syndrome calculator generates a syndrome for each of the data sections. A root finder is coupled to receive the calculated syndrome and to generate at least two roots. A polynomial calculator responds to the two roots and generates at least two error addresses, each identifying a location in the data wherein the error lies.
摘要翻译： Bose，Ray-Chaudhuri，Hocquenghem（BCH）解码器用于非易失性存储器应用中，用于确定错误数量并将错误定位在一页信息中。解码器包括响应于信息扇区的综合征计算器。该部门包括数据和开销，数据被组织成数据部分，开销被组织成开销部分。综合征计算器为每个数据部分产生综合征。根取景器耦合以接收所计算的综合征并产生至少两个根。多项式计算器响应于两个根，并且生成至少两个错误地址，每个错误地址标识错误所在的数据中的位置。

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