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    • 5. 发明申请
    • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    • 半导体器件及其制造方法
    • US20120003797A1
    • 2012-01-05
    • US13159804
    • 2011-06-14
    • Shinya SASAGAWAHitoshi NAKAYAMAMasashi TSUBUKUDaigo SHIMADA
    • Shinya SASAGAWAHitoshi NAKAYAMAMasashi TSUBUKUDaigo SHIMADA
    • H01L21/336
    • H01L29/7869H01L29/45H01L29/66969
    • When a transistor including a conductive layer having a three-layer structure is manufactured, three-stage etching is performed. In the first etching process, an etching method in which the etching rates for the second film and the third film are high is employed, and the first etching process is performed until the first film is at least exposed. In the second etching process, an etching method in which the etching rate for the first film is higher than that in the first etching process and the etching rate for a “layer provided below and in contact with the first film” is lower than that in the first etching process is employed. In the third etching process, an etching method in which the etching rates for the first to the third films are higher than those in the second etching process is preferably employed.
    • 当制造包括具有三层结构的导电层的晶体管时,进行三级蚀刻。 在第一蚀刻工艺中,采用其中第二膜和第三膜的蚀刻速率高的蚀刻方法,并且执行第一蚀刻处理直到第一膜至少暴露。 在第二蚀刻工艺中,第一膜的蚀刻速率高于第一蚀刻工艺中的蚀刻速率和“下面设置并与第一膜接触的”层的蚀刻速率的蚀刻方法低于 采用第一蚀刻工艺。 在第三蚀刻工艺中,优选使用其中第一至第三膜的蚀刻速率高于第二蚀刻工艺中的蚀刻速率的蚀刻方法。
    • 6. 发明申请
    • METHOD FOR MANUFACTURING SOI SUBSTRATE
    • 制造SOI衬底的方法
    • US20100047997A1
    • 2010-02-25
    • US12505020
    • 2009-07-17
    • Akihiro ISHIZUKAShinya SASAGAWAMotomu KURATAAtsushi HIKOSAKATaiga MURAOKAHitoshi NAKAYAMA
    • Akihiro ISHIZUKAShinya SASAGAWAMotomu KURATAAtsushi HIKOSAKATaiga MURAOKAHitoshi NAKAYAMA
    • H01L21/762
    • H01L21/76254
    • It is an object of the preset invention to increase adhesiveness of a semiconductor layer and a base substrate and to reduce defective bonding. An oxide film is formed on a semiconductor substrate and the semiconductor substrate is irradiated with accelerated ions through the oxide film, whereby an embrittled region is formed at a predetermined depth from a surface of the semiconductor substrate. Plasma treatment is performed on the oxide film on the semiconductor substrate and the base substrate by applying a bias voltage, the surface of the semiconductor substrate and a surface of the base substrate are disposed opposite to each other, a surface of the oxide film is bonded to the surface of the base substrate, heat treatment is performed after the surface of the oxide film is bonded to the surface of the base substrate, and separation is caused along the embrittled region, whereby a semiconductor layer is formed over the base substrate with the oxide film interposed therebetween.
    • 本发明的一个目的是增加半导体层和基底衬底的粘附性并减少不良接合。 在半导体衬底上形成氧化物膜,半导体衬底通过氧化膜照射加速离子,从而在半导体衬底的表面形成预定深度的脆化区域。 通过施加偏置电压对半导体衬底和基底衬底上的氧化物膜进行等离子体处理,半导体衬底的表面和基底衬底的表面彼此相对设置,氧化膜的表面被接合 在基底表面上进行热处理之后,在氧化膜的表面接合到基底表面之后进行热处理,沿脆化区域分离,由此在基底基板上形成半导体层 氧化膜。
    • 8. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20120319100A1
    • 2012-12-20
    • US13483078
    • 2012-05-30
    • Kyoko YOSHIOKAJunichi KOEZUKAShinji OHNOYuichi SATOShinya SASAGAWA
    • Kyoko YOSHIOKAJunichi KOEZUKAShinji OHNOYuichi SATOShinya SASAGAWA
    • H01L29/786H01L21/44
    • H01L29/7869H01L21/324H01L29/66969
    • A miniaturized semiconductor device in which an increase in power consumption is suppressed and a method for manufacturing the semiconductor device are provided. A highly reliable semiconductor device having stable electric characteristics and a method for manufacturing the semiconductor device are provided. An oxide semiconductor film is irradiated with ions accelerated by an electric field in order to reduce the average surface roughness of a surface of the oxide semiconductor film. Consequently, an increase in the leakage current and power consumption of a transistor can be suppressed. Moreover, by performing heat treatment so that the oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to the surface of the oxide semiconductor film, a change in electric characteristics of the oxide semiconductor film due to irradiation with visible light or ultraviolet light can be suppressed.
    • 提供抑制功耗增加的小型化半导体装置及其制造方法。 提供了一种具有稳定电特性的高度可靠的半导体器件及其半导体器件的制造方法。 为了降低氧化物半导体膜的表面的平均表面粗糙度,用电场加速的离子照射氧化物半导体膜。 因此,可以抑制晶体管的漏电流和功耗的增加。 此外,通过进行热处理使得氧化物半导体膜包括具有与氧化物半导体膜的表面基本垂直的c轴的晶体,由于可见光或紫外线的照射而导致的氧化物半导体膜的电特性的变化 可以抑制。
    • 10. 发明申请
    • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    • 制造半导体器件和半导体器件的方法
    • US20120193625A1
    • 2012-08-02
    • US13357902
    • 2012-01-25
    • Shinya SASAGAWAMotomu KURATA
    • Shinya SASAGAWAMotomu KURATA
    • H01L29/786H01L21/336
    • H01L29/66969H01L21/441H01L29/41733H01L29/7869
    • An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer.
    • 本发明的目的是提供一种在保持有利特性的同时减小缺陷并实现小型化的半导体器件。 形成半导体层; 在半导体层上形成第一导电层; 使用第一抗蚀剂掩模蚀刻第一导电层以形成具有凹部的第二导电层; 第一抗蚀剂掩模的尺寸减小以形成第二抗蚀剂掩模; 使用第二抗蚀剂掩模蚀刻第二导电层,以形成在周边具有锥形形状的突出部分的源极和漏极; 在源极和漏极上形成栅极绝缘层以与半导体层的一部分接触; 并且栅极电极形成在栅极绝缘层上方并与半导体层重叠的部分。