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1. 发明授权

US06653216B1 Transparent electrode forming apparatus and method of fabricating active matrix substrate 有权
标题翻译：透明电极形成装置及制造有源矩阵基板的方法
公开(公告)号：US06653216B1
公开(公告)日：2003-11-25
申请号：US09840220
申请日：2001-04-23
申请人： Shinichi Shimomaki , Makoto Miyagawa , Hiromitsu Ishii , Yayoi Nakamura , Toshiaki Higashi
发明人： Shinichi Shimomaki , Makoto Miyagawa , Hiromitsu Ishii , Yayoi Nakamura , Toshiaki Higashi
IPC分类号： H01L2144
CPC分类号： H01L31/1884 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L27/14692 , Y02E10/50
摘要： An active matrix substrate includes a line layer formed of an Al-based metal layer and a part of which is exposed through a contact hole formed in an insulating film. In the active matrix substrate, pixel electrodes are formed of an ITO film on the insulating film, and a jumper line for connecting a disconnected portion of a protect ring, a surface layer of a data line connecting pad, and a line protecting film are formed at the same time as the pixel electrodes are formed. This reduces the number of fabrication steps. The ITO film is patterned by dry etching due to reactive ion etching using a mixed gas of a hydrogen halide gas and an inert gas, with the temperatures of the center portion and peripheral portion of the substrate substantially equalized to each other.
摘要翻译：有源矩阵基板包括由Al基金属层形成的线层，其一部分通过形成在绝缘膜中的接触孔露出。在有源矩阵基板中，像素电极由绝缘膜上的ITO膜形成，并且形成用于连接保护环的断开部分，数据线连接焊盘的表面层和线保护膜的跨接线同时形成像素电极。这减少了制造步骤的数量。由于使用卤化氢气体和惰性气体的混合气体的反应离子蚀刻，基板的中心部分和周边部分的温度基本上彼此相等，因此通过干蚀刻将ITO膜图案化。

2. 发明授权

US06678017B1 Display panel and method of fabricating the same 有权
标题翻译：显示面板及其制造方法
公开(公告)号：US06678017B1
公开(公告)日：2004-01-13
申请号：US09325832
申请日：1999-06-04
申请人： Shinichi Shimomaki , Makoto Miyagawa , Hiromitsu Ishii , Yayoi Nakamura
发明人： Shinichi Shimomaki , Makoto Miyagawa , Hiromitsu Ishii , Yayoi Nakamura
IPC分类号： G02F11333
CPC分类号： G02F1/13452 , G02F1/136204 , G02F1/136227 , G02F2001/133388 , G02F2201/50 , G02F2201/501
摘要： An active matrix display panel includes a plurality of pixel electrodes formed in a matrix manner, a plurality of switching elements connected with these pixel electrodes, a plurality of scan lines for supplying a scan signal to thin film transistors, and a plurality of data lines for supplying a display data signal. Components except for the pixel electrodes are covered with an overcoat film. Since a contact hole extending through this overcoat film and a contact hole extending through the overcoat film and a gate insulating film are simultaneously formed, a jumper line for connecting a disconnected portion of a protect ring, a surface layer of a data line connecting pad, and a line protecting film are formed at the same time as the pixel electrodes are formed. This reduces the number of fabrication steps. Components such as the data line and source and drain electrodes are formed by a three-layered structure of Cr(Chromium)/Al(Aluminum)/Cr(Chromium). This reduces the contact resistance between the source electrode and the pixel electrode and also reduces the resistance of the data line. The sectional shape of, e.g., the data line made of the multilayered film is so formed as to be readily covered with the overcoat film. This improves the reliability.
摘要翻译：有源矩阵显示面板包括以矩阵形式形成的多个像素电极，与这些像素电极连接的多个开关元件，用于向薄膜晶体管提供扫描信号的多条扫描线，以及多条用于提供显示数据信号。除了像素电极之外的部件被覆盖膜覆盖。由于延伸穿过该外涂膜的接触孔和延伸穿过外涂膜的接触孔和栅极绝缘膜同时形成，用于连接保护环的断开部分的跳线，数据线连接焊盘的表面层，并且在形成像素电极的同时形成线保护膜。这减少了制造步骤的数量。诸如数据线和源电极和漏电极的部件由Cr（铬）/ Al（铝）/ Cr（铬）的三层结构形成。这降低了源电极和像素电极之间的接触电阻，并且还降低了数据线的电阻。例如由多层膜制成的数据线的截面形状形成为容易被覆盖膜覆盖。这提高了可靠性。

3. 发明授权

US5742842A Data processing apparatus for executing a vector operation under control of a master processor 失效
标题翻译：数据处理装置，用于在主处理器的控制下执行向量操作
公开(公告)号：US5742842A
公开(公告)日：1998-04-21
申请号：US601704
申请日：1996-02-15
申请人： Seiji Suetake , Hideyuki Iino , Koichi Hatta , Tatsuya Nagasawa , Koichi Kuroiwa , Hiroyuki Fujiyama , Kenji Shirasawa , Noriko Kadomaru , Shinichi Utsunomiya , Makoto Miyagawa
发明人： Seiji Suetake , Hideyuki Iino , Koichi Hatta , Tatsuya Nagasawa , Koichi Kuroiwa , Hiroyuki Fujiyama , Kenji Shirasawa , Noriko Kadomaru , Shinichi Utsunomiya , Makoto Miyagawa
IPC分类号： G06F9/38 , G06F15/78
CPC分类号： G06F9/3887 , G06F15/8053 , G06F9/30036 , G06F9/3877
摘要： A slave processor for executing for example a vector operation is connected to a master processor. A vector length for a vector operation set to the slave processor can be changed without intervention of the master processor. When the master processor activates the slave processor, the slave processor outputs a busy signal immediately (at most one cycle later). The master processor reads the value of a busy register representing a busy/ready status of the slave processor in a slave access cycle at highest speed (in two cycles at most). Regardless of whether the master processor and the slave processor was designed as series products or general purpose products, they can be effectively connected.
摘要翻译：用于执行例如向量操作的从属处理器连接到主处理器。可以在没有主处理器干预的情况下改变设置到从属处理器的向量操作的向量长度。当主处理器激活从属处理器时，从属处理器立即输出忙信号（最多一个周期）。主处理器以最高速度（最多两个周期）在从站访问周期中读取表示从属处理器的忙/就绪状态的忙寄存器的值。无论主处理器和从属处理器是设计为系列产品还是通用产品，都可以有效连接。

4. 发明授权

US5809552A Data processing system, memory access device and method including selecting the number of pipeline stages based on pipeline conditions 失效
标题翻译：数据处理系统，存储器访问装置和方法，包括基于流水线条件选择流水线级数
公开(公告)号：US5809552A
公开(公告)日：1998-09-15
申请号：US705562
申请日：1996-08-29
申请人： Koichi Kuroiwa , Hideyuki Iino , Hiroyuki Fujiyama , Kenji Shirasawa , Masaharu Kimura , Noriko Kadomaru , Shinichi Utsunomiya , Makoto Miyagawa
发明人： Koichi Kuroiwa , Hideyuki Iino , Hiroyuki Fujiyama , Kenji Shirasawa , Masaharu Kimura , Noriko Kadomaru , Shinichi Utsunomiya , Makoto Miyagawa
IPC分类号： G06F13/16 , G06F13/00
CPC分类号： G06F13/1615
摘要： A memory accessing device and method, in a data processing system which has pipelines, for correctly associating prefetched addresses from an address bus with corresponding prefetched data from a data bus, when sending data to and receiving data from an external memory. The memory accessing device has a condition determining device determining pipeline control conditions based on pipeline information and address information; a number-of-stages selecting device selecting the number of pipeline stages based on pipeline activation conditions and the pipeline control conditions; and a valid data detecting device detecting valid data positions in the prefetched data based on the number of pipeline stages selected and correctly associating the valid data positions in the prefetched data with the prefetched addresses. Additionally, a data input/output unit performs an arithmetic operation on data transferred from an external memory to a vector register, wherein the result of the arithmetic operation, upon completion, is transferred from the vector register to the external memory for storage. The data input/output unit has a data holding unit storing m-bit data units and rearranges exactly in the original order n pieces of m/n-bit data when n pieces of m/n-bit data are loaded from an external memory and then stored back into the external memory.
摘要翻译：一种具有管线的数据处理系统中的存储器访问装置和方法，用于当从外部存储器发送数据并从外部存储器接收数据时，将来自地址总线的预取地址与来自数据总线的相应预取数据正确地相关联。所述存储器访问装置具有根据流水线信息和地址信息确定流水线控制条件的条件判定装置; 阶段选择装置，其基于流水线激活条件和流水线控制条件选择流水线级数; 以及有效数据检测装置，基于所选择的流水线级数，并将预取数据中的有效数据位置与预取地址正确地相关联，来检测预取数据中的有效数据位置。此外，数据输入/输出单元对从外部存储器传送到向量寄存器的数据执行算术运算，其中算术运算的结果在完成后从矢量寄存器传送到外部存储器用于存储。数据输入/输出单元具有存储m位数据单元的数据保持单元，并且当从外部存储器加载n个m / n位数据时，以原始顺序重新排列n个m / n位数据，然后存储回外部存储器。

5. 发明授权

US07919908B2 Piezoelectric resonator device 有权
标题翻译：压电谐振器装置
公开(公告)号：US07919908B2
公开(公告)日：2011-04-05
申请号：US11992948
申请日：2007-05-25
申请人： Tatsuya Murakami , Masashi Hirai , Makoto Miyagawa , Akihiro Kanbara
发明人： Tatsuya Murakami , Masashi Hirai , Makoto Miyagawa , Akihiro Kanbara
IPC分类号： H01L41/053
CPC分类号： H03H9/1021 , H01L2924/16195
摘要： A piezoelectric resonator device includes a base holding a piezoelectric resonator element and a lid bonded to the base in order to hermetically seal the piezoelectric resonator element held on the base. In addition, the region of bonding of the base to the lid is composed of at least a nickel-cobalt layer comprising nickel and cobalt, and a metal layer laminated on the nickel-cobalt layer, with the base and lid bonded by heat-melting using a metallic braze material.
摘要翻译：一种压电谐振器装置，包括一个保持压电谐振元件的底座和一个结合到底座上的盖子，以密封保持在基座上的压电谐振元件。此外，基底与盖的接合区域由至少包含镍和钴的镍钴层和层压在镍钴层上的金属层组成，基底和盖通过热熔结合使用金属钎焊材料。

6. 发明申请

US20090224634A1 Piezoelectric Resonator Device 有权
标题翻译：压电谐振器
公开(公告)号：US20090224634A1
公开(公告)日：2009-09-10
申请号：US11992948
申请日：2007-05-25
申请人： Tatsuya Murakami , Masashi Hirai , Makoto Miyagawa , Akihiro Kanbara
发明人： Tatsuya Murakami , Masashi Hirai , Makoto Miyagawa , Akihiro Kanbara
IPC分类号： H01L41/053
CPC分类号： H03H9/1021 , H01L2924/16195
摘要： A piezoelectric resonator device includes a base holding a piezoelectric resonator element and a lid bonded to the base in order to hermetically seal the piezoelectric resonator element held on the base. In addition, the region of bonding of the base to the lid is composed of at least a nickel-cobalt layer comprising nickel and cobalt, and a metal layer laminated on the nickel-cobalt layer, with the base and lid bonded by heat-melting using a metallic braze material.
摘要翻译：一种压电谐振器装置，包括一个保持压电谐振元件的底座和一个结合到底座上的盖子，以密封保持在基座上的压电谐振元件。此外，基底与盖的接合区域由至少包含镍和钴的镍钴层和层压在镍钴层上的金属层组成，基底和盖通过热熔结合使用金属钎焊材料。

7. 发明授权

US5644748A Processor system including an index buffer circuit and a translation look-aside buffer control circuit for processor-to-processor interfacing 失效
标题翻译：处理器系统包括索引缓冲器电路和用于处理器到处理器接口的翻译后备缓冲器控制电路
公开(公告)号：US5644748A
公开(公告)日：1997-07-01
申请号：US11761
申请日：1993-02-01
申请人： Shinichi Utsunomiya , Hideyuki Iino , Noriko Kadomaru , Makoto Miyagawa
发明人： Shinichi Utsunomiya , Hideyuki Iino , Noriko Kadomaru , Makoto Miyagawa
IPC分类号： G06F9/38 , G06F12/10
CPC分类号： G06F12/1027 , G06F9/3824
摘要： An index buffer circuit and a translation look-aside buffer (TLB) are provided in an address unit of a vector processor unit. The index buffer circuit incudes a plurality of buffers, an input pointer generating unit for generating an input control signal indicating which selected buffer in a buffer portion, index data shall be stored, and an output pointer generating unit for outputting a control signal indicated from which selected buffer in the buffer portion output data is to be read. The TLB translates a logical address to a physical address upon receipt of the output from the index buffer. The TLB has a least recently used (LRU) flag register which can maintain the priority even if the entries are reset and thus the entries of the TLB can be used as buffers when the vector processor unit operates as a bus slave.
摘要翻译：在矢量处理器单元的地址单元中提供索引缓冲器电路和平移后备缓冲器（TLB）。索引缓冲器电路包括多个缓冲器，输入指针产生单元，用于产生指示缓冲器部分中的哪个选择的缓冲器，索引数据将被存储的输入控制信号;以及输出指针产生单元，用于输出指示的控制信号要读取缓冲区输出数据中的选定缓冲区。 TLB在接收到索引缓冲区的输出时将逻辑地址转换为物理地址。 TLB具有最近最少使用的（LRU）标志寄存器，其即使条目被复位也可以保持优先级，因此当矢量处理器单元作为总线从机时，TLB的条目可以用作缓冲器。

8. 发明授权

US5126002A Leaf paper bundling apparatus 失效
标题翻译：叶纸包装机
公开(公告)号：US5126002A
公开(公告)日：1992-06-30
申请号：US587835
申请日：1990-09-25
申请人： Tsutomu Iwata , Tohru Akamatsu , Osamu Itoh , Makoto Miyagawa
发明人： Tsutomu Iwata , Tohru Akamatsu , Osamu Itoh , Makoto Miyagawa
IPC分类号： B65B27/08
CPC分类号： B65B27/08
摘要： A leaf paper bundling apparatus winds a tape around the periphery of a stack of leaf papers. A stacking device stacks and aligns a predetermined number of leaf papers in an upright position in a direction parallel to the short edges of the leaf papers. Left and right holding fingers are employed to hold the stacked leaf papers and transfer the stacked leaf papers to a bundling position, maintaining the upright position of the stacked leaf papers. A tape fed by a tape supply is wound around the stacked leaf papers by a tape winding device. The tape is tightened about the stacked leaf papers, and a pair of clamping members clamp the stacked leaf papers therebetween. The clamping members each have spaced contact edges straddling the tape. The stacked leaf papers can then be tightly held together without interfering with the winding of the tape about the stacked leaf papers. Further, the contact edges of the clamping members are longer than the width of the stacked leaf papers so that the edges extend beyond the edges of the stacked leaf papers. This prevents the tape being tightened about the stacked leaf papers from bending the edges of the leaf papers. The tape is then cut by a cutting device, and the ends of the tape are bonded with a thermal bonding pad that is moved between the contact edges of one of the clamping members.

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