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1. 发明授权

US06184157B2 Stress-loaded film and method for same 失效
标题翻译：应力负荷膜及其方法
公开(公告)号：US06184157B2
公开(公告)日：2001-02-06
申请号：US09088456
申请日：1998-06-01
申请人： Sheng Teng Hsu , Hongning Yang , David R. Evans , Tue Nguyen , Yanjun Ma
发明人： Sheng Teng Hsu , Hongning Yang , David R. Evans , Tue Nguyen , Yanjun Ma
IPC分类号： B05D306
CPC分类号： C23C14/50 , C23C14/06 , C23C14/22 , C23C16/30 , C23C16/44 , C23C16/4582
摘要： A method has been provided to counteract the inherent tension in a deposited film. A wafer substrate is fixed to a wafer chuck having a curved surface. When the chuck surface is convex, a tensile stress is implanted in a deposited film. Upon release from the chuck, the deposited film develops a compressive stress. When the chuck surface is concave, a compressive stress is implanted in the deposited film. Upon release from the chuck, the deposited film develops a tensile stress. Loading a film with a compressive stress is helpful in making films having an inherently tensile stress become thermal stable. Stress loading is also used to improve adhesion between films, and to prevent warping of a film during annealing. A product-by-process using the above-described method is also provided.
摘要翻译：已经提供了一种抵消沉积膜中的固有张力的方法。将晶片基板固定到具有弯曲表面的晶片卡盘。当卡盘表面凸出时，在沉积膜中注入拉伸应力。当从卡盘释放时，沉积的膜产生压缩应力。当卡盘表面凹陷时，在沉积膜中注入压应力。当从卡盘释放时，沉积的膜产生拉伸应力。加载具有压应力的薄膜有助于使具有固有拉伸应力的薄膜变得热稳定。应力负荷也用于提高膜之间的粘附性，并且防止退火期间膜的翘曲。还提供了使用上述方法的逐个方法。

2. 发明授权

US06410462B1 Method of making low-K carbon doped silicon oxide 有权
标题翻译：制造低K碳掺杂氧化硅的方法
公开(公告)号：US06410462B1
公开(公告)日：2002-06-25
申请号：US09569861
申请日：2000-05-12
申请人： Hongning Yang , David Russell Evans , Sheng Teng Hsu
发明人： Hongning Yang , David Russell Evans , Sheng Teng Hsu
IPC分类号： H01L2131
CPC分类号： H01L21/02126 , C23C16/401 , H01L21/02211 , H01L21/02274 , H01L21/31633
摘要： A method of producing a low-k interconnect dielectric material, using PECVD processes and readily available precursors to produce carbon-doped silicon oxide (SiOC). SiOC dielectric materials are produced using conventional silane based gas precursors, of silane and nitrous oxide, along with hydrocarbon gas. The use of methane and acetylene in combination with silane based gas precursors is provided. Methane produces network terminating species, specifically methyl, which replaces oxygen in an Si—O bond within a silicon dioxide network. This increases the volume, reduces the density and the dielectric constant of the material. Acetylene acts as a possible source of carbon and as a modifier, reducing or eliminating undesirable bridging species, such as carbene, or enhancing desireable network terminating species, such as methyl. Following implantation, the material is annealed to reduce the—OH and to potentially further lower the dielectric constant.
摘要翻译：使用PECVD工艺和易于获得的前体产生碳掺杂氧化硅（SiOC）的低k互连电介质材料的制造方法。使用常规的硅烷基气体前体，硅烷和一氧化二氮以及烃类气体制备SiOC电介质材料。提供了与硅烷基气体前体组合使用甲烷和乙炔。甲烷产生网络终止物质，特别是甲基，其替代二氧化硅网络内的Si-O键中的氧。这增加了材料的体积，降低了密度和介电常数。乙炔作为碳和作为改性剂的可能来源，减少或消除不需要的桥接物质，如卡宾，或增强所需的网络终止物质如甲基。在植入之后，将材料退火以减少-OH并潜在地进一步降低介电常数。

3. 发明授权

US5900290A Method of making low-k fluorinated amorphous carbon dielectric 失效
标题翻译：制备低k氟化无定形碳电介质的方法
公开(公告)号：US5900290A
公开(公告)日：1999-05-04
申请号：US023382
申请日：1998-02-13
申请人： Hongning Yang , Tue Nguyen
发明人： Hongning Yang , Tue Nguyen
IPC分类号： H01L21/768 , C23C16/26 , H01L21/31 , H01L21/312 , H01L21/314 , H01L23/522 , B05D3/06 , C23C16/30
CPC分类号： C23C16/26 , H01L21/3127 , H01L21/3146
摘要： The invention provides a process for depositing fluorinated amorphous carbon (a-F:C) films on IC wafers to provide a low-k interconnect dielectric material. The process, carried out in a PECVD chamber, introduces silane gas (SiH.sub.4) into the mixture of C.sub.4 F.sub.8 and CH.sub.4 gases used to deposit a-F:C films. The silane helps to decrease the fluorine etchants in the deposited film, helping to improve the crosslinks in the deposited product. Film produced in accordance with the present invention has both low-k, generally below 2.4, and high thermal stability, generally above 440.degree. C., allowing for higher thermal anneal temperatures.
摘要翻译：本发明提供了一种在IC晶片上沉积氟化无定形碳（a-F：C）膜以提供低k互连电介质材料的方法。在PECVD室中进行的方法将硅烷气体（SiH 4）引入用于沉积F-C膜的C 4 F 8和CH 4气体的混合物中。硅烷有助于减少沉积膜中的氟蚀刻剂，有助于改善沉积产物中的交联。根据本发明生产的薄膜通常具有低k，通常低于2.4和高热稳定性，通常高于440℃，允许更高的热退火温度。

4. 发明授权

US06630396B2 Use of a silicon carbide adhesion promoter layer to enhance the adhesion of silicon nitride to low-k fluorinated amorphous carbon 失效
公开(公告)号：US06630396B2
公开(公告)日：2003-10-07
申请号：US10229656
申请日：2002-08-27
申请人： Hongning Yang , Tue Nguyen
发明人： Hongning Yang , Tue Nguyen
IPC分类号： H01L214763
CPC分类号： H01L21/76832 , C23C16/325 , C23C16/345 , H01L21/0212 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/3127 , H01L21/314 , H01L21/3146 , H01L21/3185 , H01L21/76801 , H01L21/76807 , H01L2221/1036
摘要： A plasma enhanced chemical vapor deposition (PECVD) process is provided for depositing one or more dielectric material layers on a substrate for use in interconnect structures of integrated circuits. The method comprises the steps of depositing a fluorinated amorphous carbon (a-F:C) layer on a substrate by providing a fluorine containing gas, preferably octafluorocyclobutane, and a carbon containing gas, preferably methane, in ratio of approximately 5.6, so as to deposit a a-F:C layer having an internal compressive stress of approximately 28 MPa. After deposition the film is annealed at approximately 400° C. for approximately two hours. An adhesion promoter layer of relatively hydrogen-free hydrogeneated silicon carbide is then deposited on the a-F:C layer using silane (SiH4) and methane (CH4) as the deposition gases. The silicon carbide layer may be deposited at a rate of approximately 180 Å per minute and typically results in deposition of a silicon carbide layer having an internal compressive stress of approximately 400 MPa. The deposited silicon carbide layer has relatively few hydrogen bonds thereby yielding a compact structure which promotes adhesion of the a-F:C layer to a silicon nitride layer and to the a-F:C layer, and which reduces diffusion of fluorine through the silicon carbide layer. A silicon nitride layer is then deposited on the adhesion promoter layer, the deposition materials preferably comprising silane (SiH4) and nitrogen (N2) in a ratio of 30:100 at 400° C. The silicon nitride layer has relatively few hydrogen bonds thereby resulting in a layer having an internal compressive stress of approximately 240 MPa. This stacked layer structure has thermal stability and resists peeling and cracking up to 450° C., and the a-F:C dielectric layer has a dielectric constant (k) as low, or lower, than 2.5.

5. 发明授权

US06440878B1 Method to enhance the adhesion of silicon nitride to low-k fluorinated amorphous carbon using a silicon carbide adhesion promoter layer 失效
公开(公告)号：US06440878B1
公开(公告)日：2002-08-27
申请号：US09541255
申请日：2000-04-03
申请人： Hongning Yang , Tue Nguyen
发明人： Hongning Yang , Tue Nguyen
IPC分类号： H01L2131
CPC分类号： H01L21/76832 , C23C16/325 , C23C16/345 , H01L21/0212 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/3127 , H01L21/314 , H01L21/3146 , H01L21/3185 , H01L21/76801 , H01L21/76807 , H01L2221/1036
摘要： A plasma enhanced chemical vapor deposition (PECVD) process is provided for depositing one or more dielectric material layers on a substrate for use in interconnect structures of integrated circuits. The method comprises the steps of depositing a fluorinated amorphous carbon (a-F:C) layer on a substrate by providing a fluorine containing gas, preferably octafluorocyclobutane, and a carbon containing gas, preferably methane, in ratio of approximately 5.6, so as to deposit a a-F:C layer having an internal compressive stress of approximately 28 MPa After deposition the film is annealed at approximately 400° C. for approximately two hours. An adhesion promoter layer of relatively hydrogen-free hydrogeneated silicon carbide is then deposited on the a-F:C layer using silane (SiH4) and methane (CH4) as the deposition gases. The silicon carbide layer may be deposited at a rate of approximately 180 Å per minute and typically results in deposition of a silicon carbide layer having an internal compressive stress of approximately 400 MPa. The deposited silicon carbide layer has relatively few hydrogen bonds thereby yielding a compact structure which promotes adhesion of the a-F:C layer to a silicon nitride layer and to the a-F:C layer, and which reduces diffusion of fluorine through the silicon carbide layer. A silicon nitride layer is then deposited on the adhesion promoter layer, the deposition materials preferably comprising silane (SiH4) and nitrogen (N2) in a ratio of 30:100 at 400° C. The silicon nitride layer formed has relatively few hydrogen bonds thereby resulting in a layer having an internal compressive stress of approximately 240 MPa This stacked layer structure has thermal stability and resists peeling and cracking up to 450° C., and the a-F:C dielectric layer has a dielectric constant (k) as low, or lower, than 2.5.

6. 发明授权

US09666671B2 Semiconductor device with composite drift region and related fabrication method 有权
公开(公告)号：US09666671B2
公开(公告)日：2017-05-30
申请号：US14279991
申请日：2014-05-16
申请人： Zhihong Zhang , Hongning Yang , Jiang-Kai Zuo
发明人： Zhihong Zhang , Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L29/10 , H01L29/78 , H01L29/66 , H01L29/36 , H01L29/06 , H01L29/08 , H01L21/265
CPC分类号： H01L29/1045 , H01L21/26513 , H01L21/2652 , H01L29/0653 , H01L29/0847 , H01L29/36 , H01L29/66659 , H01L29/66681 , H01L29/7816 , H01L29/7835
摘要： A device includes a semiconductor substrate, a body region in the semiconductor substrate having a first conductivity type and in which a channel is formed during operation, source and drain regions in the semiconductor substrate and having a second conductivity type, the source region being disposed on the body region, and a composite drift region in the semiconductor substrate, having the second conductivity type, and through which charge carriers from the source region drift to reach the drain region after passing through the channel. The composite drift region includes a first section adjacent the channel, a second section adjacent the drain region, and a third section disposed between the first and second sections. The first and second sections have a lower effective dopant concentration level than the third section.

7. 发明授权

US09496333B2 Resurf high voltage diode 有权
公开(公告)号：US09496333B2
公开(公告)日：2016-11-15
申请号：US14622068
申请日：2015-02-13
申请人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
发明人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L29/66 , H01L29/06 , H01L29/739 , H01L29/861
CPC分类号： H01L29/063 , H01L29/0649 , H01L29/0692 , H01L29/66356 , H01L29/7391 , H01L29/861
摘要： A trench-isolated RESURF diode structure (100) is provided which includes a substrate (150) in which is formed anode (130, 132) and cathode (131) contact regions separated from one another by a shallow trench isolation region (114, 115), along with a buried cathode extension region (104) formed under a RESURF anode extension region (106, 107) such that the cathode extension region (104) extends beyond the cathode contact (131) to be sandwiched between upper and lower regions (103, 106, 107) of opposite conductivity type.

8. 发明授权

US09478456B2 Semiconductor device with composite drift region 有权
标题翻译：具有复合漂移区的半导体器件
公开(公告)号：US09478456B2
公开(公告)日：2016-10-25
申请号：US13413440
申请日：2012-03-06
申请人： Hongning Yang , Jiang-Kai Zuo
发明人： Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L29/78 , H01L21/762 , H01L29/66 , H01L29/08 , H01L29/06
CPC分类号： H01L21/76224 , H01L29/0653 , H01L29/0847 , H01L29/66659 , H01L29/7835
摘要： A device includes a semiconductor substrate, a channel region in the semiconductor substrate having a first conductivity type, and a composite drift region in the semiconductor substrate, having a second conductivity type. The composite drift region includes a first drift region and a second drift region spaced from the channel region by the first drift region. The device further includes a drain region in the semiconductor substrate, spaced from the channel region by the composite drain region, and having the second conductivity type. The first drift region has a dopant concentration profile with a first concentration level where adjacent the channel region and a second concentration level where adjacent the second drift region, the first concentration level being higher than the second concentration level. In some embodiments, the first and second drift regions are stacked vertically, with the first drift region being shallower than the second drift region.
摘要翻译：一种器件包括半导体衬底，具有第一导电类型的半导体衬底中的沟道区域和具有第二导电类型的半导体衬底中的复合漂移区域。复合漂移区域包括第一漂移区域和第一漂移区域与沟道区域间隔开的第二漂移区域。该器件还包括在半导体衬底中的漏极区域，通过复合漏极区域与沟道区域间隔开并具有第二导电类型。第一漂移区域具有第一浓度水平的掺杂剂浓度分布，其中邻近通道区域的第一浓度水平和与第二漂移区域相邻的第二浓度水平，第一浓度水平高于第二浓度水平。在一些实施例中，第一漂移区域和第二漂移区域垂直堆叠，其中第一漂移区域比第二漂移区域浅。

9. 发明授权

US09385229B2 Semiconductor device with improved breakdown voltage 有权
标题翻译：具有提高击穿电压的半导体器件
公开(公告)号：US09385229B2
公开(公告)日：2016-07-05
申请号：US14495508
申请日：2014-09-24
申请人： Hongning Yang , Xin Lin , Zhihong Zhang , Jiang-Kai Zuo
发明人： Hongning Yang , Xin Lin , Zhihong Zhang , Jiang-Kai Zuo
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/7824 , H01L29/0623 , H01L29/063 , H01L29/0634 , H01L29/0653 , H01L29/1095 , H01L29/4175 , H01L29/66659 , H01L29/66681 , H01L29/7835 , H01L29/78624
摘要： Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a first region of semiconductor material having a first conductivity type and a first dopant concentration, a second region of semiconductor material having a second conductivity type overlying the first region, a drift region of semiconductor material having the first conductivity type overlying the second region, and a drain region of semiconductor material having the first conductivity type. The drift region and the drain region are electrically connected, with at least a portion of the drift region residing between the drain region and the second region, and at least a portion of the second region residing between that drift region and the first region. In one or more exemplary embodiments, the first region abuts an underlying insulating layer of dielectric material.
摘要翻译：提供半导体器件结构和相关的制造方法。示例性的半导体器件结构包括具有第一导电类型和第一掺杂剂浓度的第一半导体材料区域，具有覆盖第一区域的第二导电类型的第二半导体材料区域，具有第一导电类型的半导体材料的漂移区域覆盖第二区域，以及具有第一导电类型的半导体材料的漏极区域。漂移区域和漏极区域电连接，漂移区域的至少一部分位于漏极区域和第二区域之间，并且第二区域的至少一部分位于该漂移区域和第一区域之间。在一个或多个示例性实施例中，第一区域邻接介电材料的下层绝缘层。

10. 发明授权

US09231083B2 High breakdown voltage LDMOS device 有权
标题翻译：高击穿电压LDMOS器件
公开(公告)号：US09231083B2
公开(公告)日：2016-01-05
申请号：US13537619
申请日：2012-06-29
申请人： Hongning Yang , Daniel J. Blomberg , Jiang-Kai Zuo
发明人： Hongning Yang , Daniel J. Blomberg , Jiang-Kai Zuo
IPC分类号： H01L29/78 , H01L21/336 , H01L29/66 , H01L29/10 , H01L29/06
CPC分类号： H01L29/66689 , H01L21/76229 , H01L21/76264 , H01L29/0653 , H01L29/1083 , H01L29/66484 , H01L29/66772 , H01L29/7824
摘要： A multi-region (81, 83) lateral-diffused-metal-oxide-semiconductor (LDMOS) device (40) has a semiconductor-on-insulator (SOI) support structure (21) on or over which are formed a substantially symmetrical, laterally internal, first LDMOS region (81) and a substantially asymmetric, laterally edge-proximate, second LDMOS region (83). A deep-trench isolation (DTI) wall (60) substantially laterally terminates the laterally edge-proximate second LDMOS region (83). Electric field enhancement and lower source-drain breakdown voltages (BVDSS) exhibited by the laterally edge-proximate second LDMOS region (83) associated with the DTI wall (60) are avoided by providing a doped SC buried layer region (86) in the SOI support structure (21) proximate the DTI wall (60), underlying a portion of the laterally edge-proximate second LDMOS region (83) and of opposite conductivity type than a drain region (31) of the laterally edge-proximate second LDMOS region (83).
摘要翻译：多区域（81,83）横向扩散金属氧化物半导体（LDMOS）器件（40）具有绝缘体上半导体（SOI）支撑结构（21），其上形成有基本上对称的横向内部的第一LDMOS区域（81）和基本不对称的横向边缘邻近的第二LDMOS区域（83）。深沟槽隔离（DTI）壁（60）基本上横向地终止横向边缘邻近的第二LDMOS区域（83）。通过在SOI中提供掺杂的SC掩埋层区域（86）来避免由与DTI壁（60）相关联的横向边缘邻近的第二LDMOS区域（83）表现出的电场增强和较低的源极 - 漏极击穿电压（BVDSS）靠近DTI壁（60）的支撑结构（21），位于横向边缘邻近的第二LDMOS区域（83）的一部分下方并且具有与横向边缘邻近的第二LDMOS区域的漏极区域（31）相反的导电类型 83）。

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