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    • 3. 发明申请
    • Frame Buffer Pixel Circuit of Liquid Crystal on Silicon Display Device
    • 液晶显示装置上的液晶缓冲像素电路
    • US20130069966A1
    • 2013-03-21
    • US13701009
    • 2011-08-17
    • Bohua ZhaoRan HuangHuan DuJiajun LuoBin Lin
    • Bohua ZhaoRan HuangHuan DuJiajun LuoBin Lin
    • G09G5/00
    • G09G5/001G09G3/3648G09G2300/0819G09G2300/0842G09G2310/0251G09G2320/0233G09G2320/043G09G2360/18G11C19/184
    • The present invention discloses a frame buffer pixel circuit for a LCoS display device, wherein said circuit consists of a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), a sixth transistor (M6), a storage capacitor (C1) and a pixel capacitor (C2), wherein, the first transistor (M1) forms a pre-charge circuit, the second transistor (M2) and the third transistor (M3) form a threshold voltage generating circuit, the storage capacitor (C1) forms a sample and hold circuit, the fourth transistor (M4), the fifth transistor (M5) and the pixel capacitor (C2) form an input data voltage read-in circuit, and the sixth transistor (M6) forms a discharge circuit. The present invention has a threshold voltage added when writing the input data voltage into the storage capacitor so as to cancel out the threshold voltage lost by reading the voltage on the storage capacitor onto the pixel capacitor, thereby ensuring consistency of the output pixel voltage and improving the display effect.
    • 本发明公开了一种用于LCoS显示装置的帧缓冲像素电路,其中所述电路由第一晶体管(M1),第二晶体管(M2),第三晶体管(M3),第四晶体管(M4),第五晶体管 晶体管(M5),第六晶体管(M6),存储电容器(C1)和像素电容器(C2),其中,第一晶体管(M1)形成预充电电路,第二晶体管(M2) 晶体管(M3)形成阈值电压发生电路,存储电容器(C1)形成采样保持电路,第四晶体管(M4),第五晶体管(M5)和像素电容器(C2)形成输入数据电压读 并且第六晶体管(M6)形成放电电路。 本发明在将输入数据电压写入存储电容器时附加了阈值电压,以通过将存储电容器上的电压读入像素电容器来消除阈值电压损失,从而确保输出像素电压的一致性和改善 显示效果。
    • 5. 发明申请
    • INTERPOSER CONNECTOR ASSEMBLY
    • 插座连接器总成
    • US20110256743A1
    • 2011-10-20
    • US12763800
    • 2010-04-20
    • Bruce Allen ChampionSteven Jay MillardBin Lin
    • Bruce Allen ChampionSteven Jay MillardBin Lin
    • H01R12/00
    • H01R13/6474H01R12/7076
    • An interposer connector assembly includes a substrate, conductive pads, and contacts. The substrate has opposite first and second sides with a conductive via extending through the substrate. The conductive pads are mounted to the first and second sides of the substrate and electrically coupled with each other by the via. The contacts are electrically joined with the conductive pads on the first and second sides of the substrate. The contacts protrude from the substrate to outer ends that are configured to engage conductive members of electronic packages that mate with the first and second sides of the substrate. A differential electrical impedance characteristic of a conductive pathway extending from the outer end of one of the contacts to the outer end of another one of the contacts is at least 65 Ohms.
    • 插入器连接器组件包括衬底,导电焊盘和触点。 衬底具有相对的第一和第二侧面,导电通孔延伸穿过衬底。 导电焊盘安装到衬底的第一和第二侧,并通过通孔彼此电耦合。 触点与衬底的第一和第二侧上的导电焊盘电连接。 触头从基板突出到外端,其被配置为接合与基板的第一和第二侧配合的电子封装的导电构件。 从触点之一的外端延伸到另一个触点的外端的导电路径的差分电阻抗特性为至少65欧姆。