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1. 发明申请

US20070052001A1 Nonvolatile semiconductor memory device and method of fabricating the same 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20070052001A1
公开(公告)日：2007-03-08
申请号：US11502426
申请日：2006-08-11
申请人： Seung-eon Ahn , Jung-bin Yun , In-kyeong Yoo , Dong-chul Kim , Tae-hoon Kim
发明人： Seung-eon Ahn , Jung-bin Yun , In-kyeong Yoo , Dong-chul Kim , Tae-hoon Kim
IPC分类号： H01L29/76
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/146 , H01L45/1641
摘要： A nonvolatile semiconductor memory device and a method of fabricating the same are provided. The nonvolatile memory device may include a switching device and a storage node connected to the switching device. The storage node may comprise a lower electrode, a data storing layer, and an upper electrode. The data storing layer may include a first region where a current path is formed at a first voltage, and a second region surrounding the first region where a current path is formed at a second voltage, greater than the first voltage. The first region may be positioned to contact the upper electrode and the lower electrode.
摘要翻译：提供一种非易失性半导体存储器件及其制造方法。非易失性存储器件可以包括连接到开关器件的开关器件和存储节点。存储节点可以包括下电极，数据存储层和上电极。数据存储层可以包括在第一电压处形成电流路径的第一区域和围绕第一区域的第二区域，其中电流路径形成在大于第一电压的第二电压处。第一区域可以被定位成接触上电极和下电极。

2. 发明授权

US07936044B2 Non-volatile memory devices and methods of fabricating the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07936044B2
公开(公告)日：2011-05-03
申请号：US11403902
申请日：2006-04-14
申请人： Dong Chul Kim , In-kyeong Yoo , Myoung-jae Lee , Sun-ae Seo , In-gyu Baek , Seung-eon Ahn , Byoung-ho Park , Young-kwan Cha , Sang-jin Park
发明人： Dong Chul Kim , In-kyeong Yoo , Myoung-jae Lee , Sun-ae Seo , In-gyu Baek , Seung-eon Ahn , Byoung-ho Park , Young-kwan Cha , Sang-jin Park
IPC分类号： H01L29/00
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.
摘要翻译：存储器件可以包括与开关器件耦合的开关器件和存储节点。存储节点可以包括第一电极，第二电极，数据存储层和至少一个接触层。数据存储层可以设置在第一电极和第二电极之间，并且可以包括过渡金属氧化物或氧化铝。至少一个接触层可以设置在数据存储层的上方或下方的至少一个上，并且可以包括导电金属氧化物。

3. 发明申请

US20070120580A1 Non-volatile memory devices and methods of fabricating the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20070120580A1
公开(公告)日：2007-05-31
申请号：US11403902
申请日：2006-04-14
申请人： Dong Kim , In-kyeong Yoo , Myoung-jae Lee , Sun-ae Seo , In-gyu Baek , Seung-eon Ahn , Byoung-ho Park , Young-kwan Cha , Sang-jin Park
发明人： Dong Kim , In-kyeong Yoo , Myoung-jae Lee , Sun-ae Seo , In-gyu Baek , Seung-eon Ahn , Byoung-ho Park , Young-kwan Cha , Sang-jin Park
IPC分类号： H03K19/00
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.
摘要翻译：存储器件可以包括与开关器件耦合的开关器件和存储节点。存储节点可以包括第一电极，第二电极，数据存储层和至少一个接触层。数据存储层可以设置在第一电极和第二电极之间，并且可以包括过渡金属氧化物或氧化铝。至少一个接触层可以设置在数据存储层的上方或下方的至少一个上，并且可以包括导电金属氧化物。

4. 发明授权

US08164130B2 Nonvolatile memory device comprising one switching device and one resistant material and method of manufacturing the same 有权
公开(公告)号：US08164130B2
公开(公告)日：2012-04-24
申请号：US10852287
申请日：2004-05-25
申请人： Sun-ae Seo , In-kyeong Yoo , Myoung-jae Lee , Wan-jun Park
发明人： Sun-ae Seo , In-kyeong Yoo , Myoung-jae Lee , Wan-jun Park
IPC分类号： G11C11/34
CPC分类号： G11C13/0007 , G11C2213/32 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.

5. 发明授权

US08043926B2 Nonvolatile memory devices including oxygen-deficient metal oxide layers and methods of manufacturing the same 有权
公开(公告)号：US08043926B2
公开(公告)日：2011-10-25
申请号：US12926042
申请日：2010-10-22
申请人： Sung-Il Cho , Choong-rae Cho , Eun-hong Lee , In-kyeong Yoo
发明人： Sung-Il Cho , Choong-rae Cho , Eun-hong Lee , In-kyeong Yoo
IPC分类号： H01L21/02
CPC分类号： H01L27/115 , G11C13/0007 , G11C2213/32 , G11C2213/51 , H01L27/112 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

6. 发明授权

US07901586B2 Method of manufacturing self-ordered nanochannel-array and method of manufacturing nanodot using the nanochannel-array 失效
标题翻译：使用纳米通道阵列制造自定序纳米通道阵列的方法和制造纳米点的方法
公开(公告)号：US07901586B2
公开(公告)日：2011-03-08
申请号：US11882112
申请日：2007-07-30
申请人： In-kyeong Yoo , Soo-hwan Jeong , Sun-ae Seo , In-sook Kim
发明人： In-kyeong Yoo , Soo-hwan Jeong , Sun-ae Seo , In-sook Kim
IPC分类号： B44C1/22 , H01L21/302
CPC分类号： B82B3/00 , B29C59/022 , B29C59/026 , B29C2059/023 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L21/32139
摘要： A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
摘要翻译：提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。

7. 发明申请

US20090045450A1 Non-volatile memory device and method of fabricating the same 审中-公开
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20090045450A1
公开(公告)日：2009-02-19
申请号：US11976250
申请日：2007-10-23
申请人： June-mo Koo , Suk-pil Kim , Young-gu Jin , Won-joo Kim , In-kyeong Yoo , Yoon-dong Park
发明人： June-mo Koo , Suk-pil Kim , Young-gu Jin , Won-joo Kim , In-kyeong Yoo , Yoon-dong Park
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/66825 , H01L27/115 , H01L27/11521 , H01L29/66795 , H01L29/785 , H01L29/7881
摘要： Provided are a non-volatile memory device, which may have higher integration density, improved or optimal structure, and/or reduce or minimize interference between adjacent cells without using an SOI substrate, and a method of fabricating the non-volatile memory device. The non-volatile memory device may include: a semiconductor substrate comprising a body, and a pair of fins protruding from the body; a buried insulating layer filling between the pair of fins; a pair of floating gate electrodes on outer surfaces of the pair of fins to a height greater than that of the pair of fins; and a control gate electrode on the pair of floating gate electrodes.
摘要翻译：提供了一种非易失性存储器件，其可以具有更高的集成密度，改进的或最优的结构，和/或减少或最小化相邻单元之间的干扰而不使用SOI衬底，以及制造非易失性存储器件的方法。非易失性存储器件可以包括：半导体衬底，其包括主体和从主体突出的一对鳍; 埋在绝缘层之间的一对散热片; 一对浮栅电极，其在所述一对翅片的外表面上的高度大于所述一对鳍片的高度; 以及一对浮栅上的控制栅电极。

8. 发明授权

US07355951B2 High density data recording/reproduction method utilizing electron emission and phase change media, and data recording system adopting the same, and media for the system 失效
标题翻译：利用电子发射和相变介质的高密度数据记录/再现方法，以及采用该方法的数据记录系统以及该系统的介质
公开(公告)号：US07355951B2
公开(公告)日：2008-04-08
申请号：US10252085
申请日：2002-09-23
申请人： In-kyeong Yoo , Won-bong Choi , Hyun-jung Shin
发明人： In-kyeong Yoo , Won-bong Choi , Hyun-jung Shin
IPC分类号： G11B9/00
CPC分类号： G11B9/10 , B82Y10/00 , G11B9/14 , G11B9/1409 , G11B9/1418 , G11B9/1463 , G11B11/115
摘要： A rapid data recording/reproducing method, a data recording system adopting the same, media for the system, and a tracking method, wherein the recording/reproducing method includes preparing media having a data recording layer in which a phase change is generated through electron absorption, generating electrons using an electron generating source at a position separated from the data recording layer by a predetermined interval, forming a magnetic field on the path of the electrons and cyclotron moving the electrons, recording data through local melting and cooling due to absorption of the electrons by the data recording layer. A micro-tip does not contact the data recording layer during electron collisions therewith, hence no damage is caused by or to the micro-tip. The present invention allows the region where the electron beam reaches the data recording layer to be minimized thereby maximizing the data recording density.
摘要翻译：一种快速数据记录/再现方法，采用该记录系统的数据记录系统，用于该系统的介质和跟踪方法，其中记录/再现方法包括制备具有通过电子吸收产生相变的数据记录层的介质在与数据记录层隔开预定间隔的位置处使用电子发生源产生电子，在电子和回旋加速器的移动电子的路径上形成磁场，通过局部熔化和冷却来记录数据电子由数据记录层。在与电子碰撞期间，微尖端不接触数据记录层，因此不会对微尖端造成损伤。本发明允许电子束到达数据记录层的区域最小化，从而最大化数据记录密度。

9. 发明申请

US20060181220A1 Apparatus and method of fabricating emitter using arc 审中-公开
标题翻译：使用电弧制造发射体的装置和方法
公开(公告)号：US20060181220A1
公开(公告)日：2006-08-17
申请号：US11254793
申请日：2005-10-21
申请人： Chang-wook Moon , In-kyeong Yoo
发明人： Chang-wook Moon , In-kyeong Yoo
IPC分类号： H01L21/00 , H01J7/24
CPC分类号： H01J9/025
摘要： A method and apparatus for fabricating an emitter by colliding an arc with the surface of a wafer inside a vacuum chamber are provided. The apparatus includes: a vacuum chamber in which a wafer is inserted; a magnetic field generating unit for generating a uniform magnetic field inside the vacuum chamber; an electric field generating unit for forming an electric field parallel to the magnetic field inside the vacuum chamber; and a master emitter for emitting electrons towards the wafer. The electrons emitted from the master emitter move along the magnetic field and the electric field. The arc is generated when the electric field or the driving voltage surpasses a threshold by controlling the strength of the electric field and the driving voltage of the master emitter. Thus, the surface of the wafer is instantaneously melted and solidified by the arc, thereby forming the emitter with a sharp tip on the surface of the wafer.
摘要翻译：提供了一种用于通过使电弧与真空室内的晶片的表面碰撞来制造发射器的方法和装置。该装置包括：其中插入有晶片的真空室; 磁场产生单元，用于在真空室内产生均匀的磁场; 电场产生单元，用于形成与真空室内的磁场平行的电场; 以及用于向晶片发射电子的主发射器。从主发射器发射的电子沿着磁场和电场移动。当电场或驱动电压通过控制电场的强度和主发射极的驱动电压而超过阈值时，产生电弧。因此，晶片的表面被电弧瞬间熔化和凝固，从而在晶片的表面上形成具有尖锐尖端的发射极。

10. 发明申请

US20060086966A1 Memory device comprising single transistor having functions of RAM and ROM and methods for operating and manufacturing the same 失效
公开(公告)号：US20060086966A1
公开(公告)日：2006-04-27
申请号：US11296510
申请日：2005-12-08
申请人： In-kyeong Yoo , Byong-man Kim
发明人： In-kyeong Yoo , Byong-man Kim
IPC分类号： H01L29/76
CPC分类号： B82Y10/00 , G11C2216/08 , H01L21/28273 , H01L29/42332 , H01L29/66825 , H01L29/7881
摘要： A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

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