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1. 发明授权

US07807581B2 Plasma processing apparatus and plasma processing method 有权
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US07807581B2
公开(公告)日：2010-10-05
申请号：US11683014
申请日：2007-03-07
申请人： Susumu Tauchi , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
发明人： Susumu Tauchi , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
IPC分类号： H01L21/302
CPC分类号： C23F4/00 , G03F1/80 , H01J37/32522 , H01L21/67017 , H01L21/67109 , H01L21/6831
摘要： The present invention provides a plasma processing apparatus or a plasma processing method that can etch a multilayer film structure for constituting a gate structure with high accuracy and high efficiency. A plasma processing method of, on processing a sample on a sample stage 112 in a depressurized discharge room 117, etching a multilayer film (including a high-k and a metal gate) at 0.1 Pa or less and with the sample stage 112 temperature-regulated by using a pressure gauge 133 to be used for pressure regulation and connected to the processing room and a main pump for exhaustion 130.
摘要翻译：本发明提供等离子体处理装置或等离子体处理方法，其可以以高精度和高效率蚀刻用于构成栅极结构的多层膜结构。一种等离子体处理方法，在对减压排出室117中的样品台112上的样品进行处理时，蚀刻0.1Pa以下的多层膜（包括高k和金属栅极），并且在样品台112中，通过使用用于压力调节并连接到处理室的压力计133和用于耗尽的主泵130进行调节。

2. 发明申请

US20080217295A1 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD 有权
标题翻译：等离子体加工设备和等离子体处理方法
公开(公告)号：US20080217295A1
公开(公告)日：2008-09-11
申请号：US11683014
申请日：2007-03-07
申请人： SUSUMU TAUCHI , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
发明人： SUSUMU TAUCHI , Akitaka Makino , Seiichi Watanabe , Naoki Yasui
IPC分类号： C23F1/00
CPC分类号： C23F4/00 , G03F1/80 , H01J37/32522 , H01L21/67017 , H01L21/67109 , H01L21/6831
摘要： The present invention provides a plasma processing apparatus or a plasma processing method that can etch a multilayer film structure for constituting a gate structure with high accuracy and high efficiency. A plasma processing method of, on processing a sample on a sample stage 112 in a depressurized discharge room 117, etching a multilayer film (including a high-k and a metal gate) at 0.1 Pa or less and with the sample stage 112 temperature-regulated by using a pressure gauge 133 to be used for pressure regulation and connected to the processing room and a main pump for exhaustion 130.
摘要翻译：本发明提供等离子体处理装置或等离子体处理方法，其可以以高精度和高效率蚀刻用于构成栅极结构的多层膜结构。一种等离子体处理方法，在对减压排出室117中的样品台112上的样品进行处理时，蚀刻0.1Pa以下的多层膜（包括高k和金属栅极），并且在样品台112中，通过使用用于压力调节并连接到处理室的压力计133和用于耗尽的主泵130进行调节。

3. 发明授权

US08075733B2 Plasma processing apparatus 有权
标题翻译：等离子体处理装置
公开(公告)号：US08075733B2
公开(公告)日：2011-12-13
申请号：US12240293
申请日：2008-09-29
申请人： Seiichi Watanabe , Naoki Yasui , Susumu Tauchi , Yasuhiro Nishimori
发明人： Seiichi Watanabe , Naoki Yasui , Susumu Tauchi , Yasuhiro Nishimori
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306
CPC分类号： H01J37/32293 , H01J37/32192 , H01J37/32229 , H01J37/32449 , H01J2237/2001
摘要： A plasma processing apparatus includes: a decompression chamber of which the inside is depressed; a gas supply unit that supplies process gas into said chamber; a microwave supply unit that supplies a microwave into the chamber to generate plasma; an object-placing electrode where a processing material, is placed and which holds the processing material in the chamber; and a vacuuming unit that is connected to the chamber to discharge the gas in the chamber, in which the chamber, a part for providing gas into the chamber of the gas supply unit, a part for introducing a microwave into the chamber of the microwave supply unit, the object-placing electrode, and the vacuuming unit are disposed coaxially with the center axis of the chamber, and the part for introducing a microwave includes a microwave rotation generator that rotates a polarization plane of the input microwave and supplies the microwave to the chamber.
摘要翻译：等离子体处理装置包括：内部被压下的减压室; 气体供给单元，其将处理气体供给到所述室中; 微波供应单元，其将微波供应到所述室中以产生等离子体; 物体放置电极，其中处理材料被放置并将处理材料保持在所述室中; 以及抽吸单元，其连接到所述室以排出所述室中的气体，其中所述室，用于将气体提供到所述气体供应单元的室中的部分，用于将微波引入所述微波供应室单元，物体放置电极和抽真空单元与腔室的中心轴同轴设置，用于引入微波的部件包括微波旋转发生器，其旋转输入微波的偏振面并将微波提供给房间。

4. 发明授权

US06875366B2 Plasma processing apparatus and method with controlled biasing functions 失效
标题翻译：具有受控偏置功能的等离子体处理装置和方法
公开(公告)号：US06875366B2
公开(公告)日：2005-04-05
申请号：US09946491
申请日：2001-09-06
申请人： Masahiro Sumiya , Naoki Yasui , Seiichi Watanabe
发明人： Masahiro Sumiya , Naoki Yasui , Seiichi Watanabe
IPC分类号： C23C16/44 , C23C16/50 , C23C16/509 , H01L21/00
CPC分类号： C23C16/5096 , C23C16/4401 , H01J37/32165
摘要： Processing technique using plasma to process the surface of a sample such as semiconductor device. The phases of RF bias voltages applied to a substrate electrode and an antenna electrode opposed thereto are controlled to be opposite to each other so that either one of the electrodes is forced to always function as ground. Therefore, the current flowing to cross the magnetic field for controlling the plasma is decreased, and the potential distribution difference in the surface of the sample to be processed is reduced, so that the charging damage can be suppressed. Energy of ions incident to the sample to be processed can be controlled to perform high-precision etching. The plasma potential can also be controlled so that the strength of the ion impact to the inner wall of the chamber can be reduced, thereby reducing particles detached from the inner wall of the processing apparatus to improve the throughput.
摘要翻译：使用等离子体处理诸如半导体器件的样品表面的处理技术。施加到与其相对的基板电极和天线电极的RF偏置电压的相位被控制为彼此相反，使得电极中的任一个被强制地始终用作接地。因此，流过用于控制等离子体的磁场的电流减少，并且待处理样品的表面的电位分布差减小，从而可以抑制充电损伤。可以控制入射到待处理样品的离子的能量，以进行高精度蚀刻。也可以控制等离子体电位，使离子冲击室内壁的强度降低，从而减少从处理装置的内壁脱离的颗粒，以提高生产量。

5. 发明授权

US08497213B2 Plasma processing method 有权
标题翻译：等离子体处理方法
公开(公告)号：US08497213B2
公开(公告)日：2013-07-30
申请号：US12013537
申请日：2008-01-14
申请人： Naoki Yasui , Seiichi Watanabe
发明人： Naoki Yasui , Seiichi Watanabe
IPC分类号： H01L21/302
CPC分类号： H01L21/32139 , H01L21/0273 , H01L21/28035
摘要： The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.
摘要翻译：本发明提供了一种用于对设置在光致抗蚀剂掩模图案下方的层叠薄膜进行等离子体处理的方法，其中形成图案的侧壁上的粗糙度减小，并且LER和LWR减小。当蚀刻待处理的材料以形成包括诸如栅极绝缘膜205，导电层204，掩模层203和层叠在半导体衬底206上的抗反射膜202和设置的光刻胶掩模图案201的薄膜的栅电极时在防反射膜上，在蚀刻掩模图案201之前，从氮气或包括氮气和沉积气体的混合气体产生等离子体，以使掩模图案201进行等离子体固化处理，以减少表面上的粗糙度，掩模图案201的侧壁，然后设置在掩模图案201下方的层叠薄膜202,203和204进行等离子体蚀刻处理。

6. 发明申请

US20120145323A1 Plasma Processing Apparatus and Plasma Processing Method 审中-公开
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US20120145323A1
公开(公告)日：2012-06-14
申请号：US13399465
申请日：2012-02-17
申请人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
发明人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
IPC分类号： B05C11/00
CPC分类号： H01L21/6833 , H01J37/32706
摘要： A plasma processing apparatus for subjecting a substrate to be processed to plasma processing includes a processing chamber, a substrate electrode having an electrostatic chuck mechanism, a plasma generator, a high-frequency bias power supply which applies a high-frequency bias voltage to the substrate electrode, a voltage monitor which monitors the high-frequency bias voltage, a current monitor which monitors a high-frequency bias current, a measurement storage unit which stores a resistance component, an induction component and a capacity component of the electrostatic chuck mechanism, which have been calculated beforehand as fitting parameters of an expression V w = V esc - R esc  I esc - L esc   I esc  t - 1 C esc  ∫ I esc   t + A , ( A ) that is an approximate curve of a correlation among a voltage of the substrate, a computing unit which estimates the voltage of the substrate according to the expression, and a control unit that generates a control signal for the high-frequency bias power supply based on the voltage of the substrate.
摘要翻译：用于对待处理的基板进行等离子体处理的等离子体处理装置包括处理室，具有静电卡盘机构的基板电极，等离子体发生器，向基板施加高频偏置电压的高频偏置电源电极，监视高频偏置电压的电压监视器，监视高频偏置电流的电流监视器，存储电阻分量的测量存储单元，静电卡盘机构的感应部件和电容分量，其中预先计算出的表达式的拟合参数V w = V esc - R esc I I I - - - - - - - （ - 衬底的电压，根据表达式估计衬底的电压的计算单元和产生t的控制信号的控制单元之间的相关性的近似曲线他基于基板电压的高频偏置电源。

7. 发明申请

US20080182419A1 PLASMA PROCESSING METHOD 有权
标题翻译：等离子体处理方法
公开(公告)号：US20080182419A1
公开(公告)日：2008-07-31
申请号：US12013537
申请日：2008-01-14
申请人： Naoki Yasui , Seiichi Watanabe
发明人： Naoki Yasui , Seiichi Watanabe
IPC分类号： H01L21/3065
CPC分类号： H01L21/32139 , H01L21/0273 , H01L21/28035
摘要： The invention provides a method for subjecting laminated thin films disposed below a photoresist mask pattern to plasma processing, wherein the roughness on the side walls of the formed pattern is reduced, and the LER and LWR are reduced. When etching a material to be processed to form a gate electrode including thin films such as a gate insulating film 205, a conducting layer 204, a mask layer 203 and an antireflection film 202 laminated on a semiconductor substrate 206 and a photoresist mask pattern 201 disposed on the antireflection film, prior to etching the mask pattern 201, plasma is generated from nitrogen gas or a mixed gas including nitrogen gas and deposition gas to subject the mask pattern 201 to a plasma curing process so as to reduce the roughness on the surface and side walls of the mask pattern 201, and then the laminated thin films 202, 203 and 204 disposed below the mask pattern 201 are subjected to a plasma etching process.
摘要翻译：本发明提供了一种用于对设置在光致抗蚀剂掩模图案下方的层叠薄膜进行等离子体处理的方法，其中形成图案的侧壁上的粗糙度减小，并且LER和LWR减小。当蚀刻待处理的材料以形成包括诸如栅极绝缘膜205，导电层204，掩模层203和层叠在半导体衬底206上的抗反射膜202和设置的光刻胶掩模图案201的薄膜的栅电极时在防反射膜上，在蚀刻掩模图案201之前，从氮气或包括氮气和沉积气体的混合气体产生等离子体，以使掩模图案201进行等离子体固化处理，以减少表面上的粗糙度，掩模图案201的侧壁，然后设置在掩模图案201下方的层叠薄膜202,203和204进行等离子体蚀刻处理。

8. 发明授权

US07169255B2 Plasma processing apparatus 有权
标题翻译：等离子体处理装置
公开(公告)号：US07169255B2
公开(公告)日：2007-01-30
申请号：US10358894
申请日：2003-02-06
申请人： Naoki Yasui , Masahiro Sumiya , Hitoshi Tamura , Seiichi Watanabe
发明人： Naoki Yasui , Masahiro Sumiya , Hitoshi Tamura , Seiichi Watanabe
IPC分类号： H01L21/306 , C23C16/00
CPC分类号： H01J37/32174 , H01J37/32082
摘要： A plasma processing apparatus for providing plasma processing to an object placed inside a processing chamber includes a vacuum chamber, a process gas feeder feeding gas into the vacuum chamber, a wafer electrode disposed within the vacuum chamber for mounting the object, a wafer bias power generator supplying bias voltage to the wafer electrode, and a plasma generator for generating plasma within the vacuum chamber. The wafer bias power generator includes a clip circuit for clipping either a positive-side voltage or a negative-side voltage to a predetermined voltage.
摘要翻译：一种用于向放置在处理室内的物体提供等离子体处理的等离子体处理装置包括真空室，将真空室内的气体输送到工作气体供给装置，设置在真空室内的用于安装物体的晶片电极，晶片偏置功率发生器向晶片电极提供偏置电压，以及用于在真空室内产生等离子体的等离子体发生器。晶片偏置功率发生器包括用于将正侧电压或负侧电压截止为预定电压的钳位电路。

9. 发明申请

US20090194506A1 Plasma Processing Apparatus And Plasma Processing Method 失效
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US20090194506A1
公开(公告)日：2009-08-06
申请号：US12420370
申请日：2009-04-08
申请人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
发明人： Hitoshi Tamura , Naoki Yasui , Seiichi Watanabe
IPC分类号： B44C1/22
CPC分类号： H01L21/6833 , H01J37/32706
摘要： The invention provides a plasma processing apparatus and a plasma processing method capable of controlling the voltage of the processing substrate with high accuracy, thereby enabling a highly accurate plasma processing. According to the invention, a voltage of the processing substrate is measured using a processing substrate with a voltage probe prepared in advance, and based on a bias voltage supplied to an electrostatic chuck mechanism and a bias current flowing through the electrostatic chuck mechanism, a capacity component which is an impedance representing the electric property of the electrostatic chuck mechanism is computed numerically. Then, based on a predetermined expression, the voltage of the processing substrate is estimated using the bias voltage of the processing substrate to be measured, the bias current flowing through the electrostatic chuck mechanism and the capacity component which is the impedance acquired in advance.
摘要翻译：本发明提供一种能够高精度地控制处理基板的电压的等离子体处理装置和等离子体处理方法，能够进行高精度的等离子体处理。根据本发明，使用具有预先制备的电压探针的处理基板来测量处理基板的电压，并且基于提供给静电卡盘机构的偏置电压和流过静电卡盘机构的偏置电流，数字地计算作为表示静电卡盘机构的电特性的阻抗的分量。然后，基于预定表达式，使用待测量的处理基板的偏置电压，流过静电卡盘机构的偏置电流和预先获取的阻抗的电容分量来估计处理基板的电压。

10. 发明授权

US07029594B2 Plasma processing method 有权
标题翻译：等离子体处理方法
公开(公告)号：US07029594B2
公开(公告)日：2006-04-18
申请号：US10658398
申请日：2003-09-10
申请人： Naoki Yasui , Masahiro Sumiya , Hitoshi Tamura , Seiichi Watanabe
发明人： Naoki Yasui , Masahiro Sumiya , Hitoshi Tamura , Seiichi Watanabe
IPC分类号： G01R31/00 , H01L21/00
CPC分类号： H01J37/32174 , H01J37/32082
摘要： A plasma processing method for providing plasma processing to an object to be processed disposed within a vacuum processing chamber in which a process gas feeding device feeds process gas into the vacuum processing chamber, a wafer electrode is placed within the vacuum processing chamber for mounting the object to be processed, a wafer bias power generator applies self-bias voltage to the wafer electrode, and a plasma generator generates plasma within the vacuum processing chamber. The plasma processing method flattens either a positive side voltage or a negative side voltage of a voltage waveform of a high frequency voltage generated to the object at an arbitrary voltage.
摘要翻译：一种等离子体处理方法，用于对处理气体供给装置将处理气体进入真空处理室的真空处理室内的待处理物体进行等离子体处理，将晶片电极置于真空处理室内，以安装物体为了进行处理，晶片偏置功率发生器对晶片电极施加自偏压，等离子体发生器在真空处理室内产生等离子体。等离子体处理方法使在任意电压下对物体产生的高频电压的电压波形的正侧电压或负侧电压平坦化。

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