专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5918063A Data driven type information processing apparatus including plural data driven type processors and plural memories 失效
标题翻译：数据驱动型信息处理装置，包括多个数据驱动型处理器和多个存储器
公开(公告)号：US5918063A
公开(公告)日：1999-06-29
申请号：US699878
申请日：1996-08-20
申请人： Ryuji Miyama , Shinichi Yoshida , Tsuyoshi Muramatsu , Souichi Miyata
发明人： Ryuji Miyama , Shinichi Yoshida , Tsuyoshi Muramatsu , Souichi Miyata
IPC分类号： G06F9/44 , G06F15/82 , G06F13/00
CPC分类号： G06F9/4436 , G06F15/82
摘要： A data flow information processing apparatus includes one or a plurality of data driven type processors for processing data packets based on a data flow program, one or a plurality of memories accessed by these processors, and a router receiving data packets processed by these data processors for selecting a path for selectively applying the data packet to any of the one or the plurality of memories. More preferably, a first router includes an address calculating unit for calculating the address based on the content of the data packet, and a branching unit for branching the path of the data packet based on the calculated address. The data packet includes a generation number allotted in accordance with the order of input time and data. The address calculating unit includes a unit for calculating a modified address by modifying the generation number based on the data. The address modifying unit may include a circuit for modifying the generation number with a prescribed global offset, and a circuit for calculating a locally offset address by further modifying the generation number with the data included in the applied data packet.
摘要翻译：数据流信息处理装置包括一个或多个数据驱动型处理器，用于基于数据流程序处理数据包，由这些处理器访问的一个或多个存储器，以及接收由这些数据处理器处理的数据包的路由器，用于选择用于选择性地将数据分组应用于一个或多个存储器中的任何一个的路径。更优选地，第一路由器包括：地址计算单元，用于基于数据分组的内容计算地址;以及分支单元，用于基于所计算的地址来分支数据分组的路径。数据包包括根据输入时间和数据的顺序分配的生成号码。地址计算单元包括通过基于该数据修改生成号码来计算修改地址的单元。地址修改单元可以包括用于以规定的全局偏移量修改发电数的电路，以及用于通过使用包含在所应用的数据包中的数据进一步修改发电数来计算本地偏移地址的电路。

2. 发明授权

US5586281A Data driven type information processing apparatus 失效
标题翻译：数据驱动型信息处理装置
公开(公告)号：US5586281A
公开(公告)日：1996-12-17
申请号：US141207
申请日：1993-10-26
申请人： Ryuji Miyama , Shinichi Yoshida , Tsuyoshi Muramatsu , Souichi Miyata
发明人： Ryuji Miyama , Shinichi Yoshida , Tsuyoshi Muramatsu , Souichi Miyata
IPC分类号： G06F9/44 , G06F15/82 , G06F12/00
CPC分类号： G06F9/4436 , G06F15/82
摘要： A data flow information processing apparatus includes one or a plurality of data driven type processors for processing data packets based on a data flow program, one or a plurality of memories accessed by these processors, and a router receiving data packets processed by these data processors for selecting a path for selectively applying the data packet to any of the one or the plurality of memories. More preferably, a first router includes an address calculating unit for calculating the address based on the content of the data packet, and a branching unit for branching the path of the data packet based on the calculated address. The data packet includes a generation number allotted in accordance with the order of input time and data. The address calculating unit includes a unit for calculating a modified address by modifying the generation number based on the data. The address modifying unit may include a circuit for modifying the generation number with a prescribed global offset, and a circuit for calculating a locally offset address by further modifying the generation number with the data included in the applied data packet.
摘要翻译：数据流信息处理装置包括一个或多个数据驱动型处理器，用于基于数据流程序处理数据包，由这些处理器访问的一个或多个存储器，以及接收由这些数据处理器处理的数据包的路由器，用于选择用于选择性地将数据分组应用于一个或多个存储器中的任何一个的路径。更优选地，第一路由器包括：地址计算单元，用于基于数据分组的内容计算地址;以及分支单元，用于基于所计算的地址来分支数据分组的路径。数据包包括根据输入时间和数据的顺序分配的生成号码。地址计算单元包括通过基于该数据修改生成号码来计算修改地址的单元。地址修改单元可以包括用于以规定的全局偏移量修改发电数的电路，以及用于通过使用包含在所应用的数据包中的数据进一步修改发电数来计算本地偏移地址的电路。

3. 发明授权

US5577256A Data driven type information processor including a combined program memory and memory for queuing operand data 失效
标题翻译：数据驱动型信息处理器，包括组合程序存储器和用于排队操作数数据的存储器
公开(公告)号：US5577256A
公开(公告)日：1996-11-19
申请号：US53442
申请日：1993-04-28
申请人： Tsuyoshi Muramatsu , Shinichi Yoshida , Souichi Miyata
发明人： Tsuyoshi Muramatsu , Shinichi Yoshida , Souichi Miyata
IPC分类号： G06F9/44 , G06F15/82
CPC分类号： G06F9/4436
摘要： A data driven type information processor includes a control unit having a function of storing a data flow program and accessing it, and a function of producing an operand data pair, the control unit further including one memory shared by both functions. When a program is executed, program data per 1 accessing to the memory and operand data related to the program data are read out simultaneously and applied to an operation unit. Accordingly, a program memory and a memory for queuing operand data, which, were separately provided in a conventional technique, are combined into a single mechanism. Thereby, the number of stages of processing in program execution in the information processor is reduced and increase in program execution speed is permitted.
摘要翻译：数据驱动型信息处理器包括具有存储数据流程序并访问它的功能的控制单元以及产生操作数数据对的功能，所述控制单元还包括由两个功能共享的一个存储器。当执行程序时，每次访问存储器的程序数据和与程序数据相关的操作数数据被同时读出并应用于操作单元。因此，将常规技术分开提供的程序存储器和用于排队操作数数据的存储器组合成单个机构。由此，信息处理器中的程序执行中的处理的次数减少，并且允许程序执行速度的增加。

4. 发明授权

US5526502A Memory interface 失效
标题翻译：内存界面
公开(公告)号：US5526502A
公开(公告)日：1996-06-11
申请号：US39760
申请日：1993-03-30
申请人： Shinichi Yoshida , Souichi Miyata , Tsuyoshi Muramatsu
发明人： Shinichi Yoshida , Souichi Miyata , Tsuyoshi Muramatsu
IPC分类号： G06F12/00 , G06F15/82 , G09G5/36 , G09G5/39 , G06F12/10 , G06F3/023
CPC分类号： G09G5/39 , G09G5/36
摘要： A memory interface device capable of memory accessing suitable for video image signal processing and memory accessing designating an arbitrary address. The interface includes an input scrambler for rewriting the generation number of an input data packet utilizing first data and/or second data when the instruction code of the input data packet is a table conversion instruction, and otherwise outputting the input data packet as it is, and a memory accessing circuit accessing an image memory using the generation number of the applied input data packet as an address and outputting the result of accessing. The device produces and outputs an output data packet from the result of accessing output from the memory accessing circuit and the input data packet.
摘要翻译：一种存储器接口设备，能够进行存储器访问，适用于指定任意地址的视频图像信号处理和存储器访问。接口包括输入扰码器，用于当输入数据分组的指令代码是表格转换指令时，利用第一数据和/或第二数据重写输入数据分组的生成数，否则直接输出输入数据分组，以及存储器访问电路，使用所施加的输入数据包的生成号作为地址访问图像存储器，并输出访问结果。该装置根据从存储器访问电路和输入数据包的输出访问结果产生输出数据包。

5. 发明授权

US5696920A Stand-alone data driven type information processor 失效
标题翻译：独立数据驱动型信息处理器
公开(公告)号：US5696920A
公开(公告)日：1997-12-09
申请号：US789691
申请日：1997-01-27
申请人： Souichi Miyata , Shinichi Yoshida , Tsuyoshi Muramatsu
发明人： Souichi Miyata , Shinichi Yoshida , Tsuyoshi Muramatsu
IPC分类号： G06F9/44 , G06F9/445 , G06F15/82
CPC分类号： G06F9/4436 , G06F9/445
摘要： A data driven type information processor includes a data driven type information processing unit, and a download unit. The information processing unit includes a program storing unit and an input/output control unit of a data packet for storing information stored in a data packet including a load instruction into the program storing unit and for carrying out a data driven type process on data packets including other instructions according to information stored in the program storing unit. The download unit downloads program data to the information processing unit by applying a data packet including the load instruction and program data to be stored in the program storing unit. The download unit includes a memory for storing program data, a readout circuit for reading out a set of program data stored in the memory, and a packet generation circuit for generating a data packet including the load instruction and readout program data to provide the same to the input/output control unit of the information processing unit. The memory may store a plurality of sets of program data.
摘要翻译：数据驱动型信息处理器包括数据驱动型信息处理单元和下载单元。信息处理单元包括程序存储单元和数据分组的输入/输出控制单元，用于存储存储在包括程序存储单元的加载指令的数据分组中的信息，并且对数据分组执行数据驱动类型处理，包括根据存储在程序存储单元中的信息的其他指令。下载单元通过应用包含要存储在程序存储单元中的加载指令和程序数据的数据分组将程序数据下载到信息处理单元。下载单元包括用于存储程序数据的存储器，用于读出存储在存储器中的一组程序数据的读出电路，以及用于产生包括加载指令和读出程序数据的数据分组的分组生成电路，以将其提供给信息处理单元的输入/输出控制单元。存储器可以存储多组节目数据。

6. 发明授权

US5630151A Data driven information processor generating multidimensional generation number identifying generation and additional attributes of data in data packet 失效
标题翻译：数据驱动信息处理器生成识别数据包中数据的生成和附加属性的多维生成数
公开(公告)号：US5630151A
公开(公告)日：1997-05-13
申请号：US299098
申请日：1994-09-02
申请人： Tsuyoshi Muramatsu , Ryuji Miyama
发明人： Tsuyoshi Muramatsu , Ryuji Miyama
IPC分类号： G06F15/82 , G06F9/44 , G06F15/00
CPC分类号： G06F9/4436
摘要： A method and device for configuring data packets for a data driven processor, the data driven information processor having a data packet producing device that produces the data packets, and a data flow ring architecture for operating (according to data flow computational protocol) upon data packets received from the data packet producing device. The data packet producing device configures each data packet to include a multidimensional generation number. The multidimensional generation number has at least two components, enabling it to identify at least two things to the data flow ring architecture. The first component identifies a generation to which data contained in the data packet belongs. The second component identifies an additional attribute of the data contained in the data packet. Where the data driven information processor is doing image processing: the first component of the multidimensional generation number is the field/image number; and the second component of the multidimensional generation number is the location of a pixel in the field/image, thus the pixel location is the additional attribute. The second component can be represented in two parts, the first part being the line of the image in which the pixel is located and the second part being the column in which the pixel is located.
摘要翻译：一种用于配置数据驱动处理器的数据分组的方法和装置，具有产生数据分组的数据分组产生装置的数据驱动信息处理器和用于根据数据分组（根据数据流计算协议）操作的数据流环结构从数据包生成装置接收。数据分组产生装置将每个数据分组配置为包括多维生成数。多维代数具有至少两个组件，使其能够识别数据流环结构中的至少两件事情。第一个组件识别包含在数据包中的数据所属的一代。第二个组件识别数据包中包含的数据的附加属性。数据驱动信息处理器正在进行图像处理的地方：多维代数的第一个分量是场/图像数; 并且多维代数的第二分量是场/图像中的像素的位置，因此像素位置是附加属性。第二部分可以分成两部分表示，第一部分是像素所位于的图像的行，第二部分是像素所在的列。

7. 发明授权

US5812806A Data driven information processor configuring each data packet with a multi-attribute tag having at least two components 失效
标题翻译：数据驱动信息处理器使用具有至少两个分量的多属性标签来配置每个数据分组
公开(公告)号：US5812806A
公开(公告)日：1998-09-22
申请号：US784769
申请日：1997-01-16
申请人： Tsuyoshi Muramatsu , Ryuji Miyama
发明人： Tsuyoshi Muramatsu , Ryuji Miyama
IPC分类号： G06F15/82 , G06F9/44 , G06F15/00
CPC分类号： G06F9/4436
摘要： A method and device for configuring data packets for a data driven processor, the data driven information processor having a data packet generator that generates the data packets, and a data flow ring architecture for operating (according to data flow computational protocol) upon data packets received from the data packet generator. The data packet generator configures each data packet to include a multi-attribute tag. The multi-attribute tag has a first component and a second component. The first component identifies one of a plurality of data sets to which data contained in the data packet belongs. The second component uniquely identifies the data within the particular data set identified by the first component contained in the data packet. Where the data driven information processor is doing image processing: the first component of the multi-attribute tag is the field/image number; and the second component of the multi-attribute tag is the location of a pixel in the field/image. The second component can be represented in two parts, the first part being the line of the image in which the pixel is located and the second part being the column in which the pixel is located.
摘要翻译：一种用于配置数据驱动处理器的数据分组的方法和装置，具有生成数据分组的数据分组生成器的数据驱动信息处理器和用于根据数据分组接收的数据分组（根据数据流计算协议）操作的数据流环结构从数据包生成器。数据包生成器将每个数据包配置为包括多属性标签。多属性标签具有第一组件和第二组件。第一组件识别包含在数据分组中的数据所属的多个数据集之一。第二组件唯一地标识由包含在数据分组中的第一组件标识的特定数据集内的数据。数据驱动信息处理器正在进行图像处理的地方：多属性标签的第一个组件是字段/图像编号; 多属性标签的第二个分量是字段/图像中像素的位置。第二部分可以分成两部分表示，第一部分是像素所位于的图像的行，第二部分是像素所在的列。

8. 发明授权

US5323352A Refresh control circuit for memory 失效
标题翻译：刷新内存控制电路
公开(公告)号：US5323352A
公开(公告)日：1994-06-21
申请号：US754764
申请日：1991-09-04
申请人： Souichi Miyata , Kouichi Hatakekyama , Tsuyoshi Muramatsu
发明人： Souichi Miyata , Kouichi Hatakekyama , Tsuyoshi Muramatsu
IPC分类号： G11C11/406 , G11C7/00
CPC分类号： G11C11/406
摘要： A refresh control circuit includes a refresh request generating circuit, a multiplexer, a memory access control circuit and an elimination control circuit. The refresh request generating circuit periodically outputs a transfer pulse and a refresh packet for refreshing. The merging control circuit receives a transfer pulse for normal access and a transfer pulse for refreshing. The merging control circuit, when the transfer pulse for refreshing and the transfer pulse for normal access contend with each other, applies first the transfer pulse to the memory access control circuit, makes the other stand by and generates an identification signal for identifying normal access and refreshing. The multiplexer receives a refresh packet and a data packet and applies one of the packets to the memory access control circuit in response to the identification signal. The memory access control circuit selectively controls a normal access operation based on the data packet or a refresh operation based on the refresh packet in response to the identification signal to output a transfer pulse. When an identification signal indicates a refresh operation, the elimination control circuit eliminates a transfer pulse output from the memory access control circuit.
摘要翻译：刷新控制电路包括刷新请求生成电路，复用器，存储器访问控制电路和消除控制电路。刷新请求生成电路周期性地输出用于刷新的传送脉冲和刷新包。合并控制电路接收用于正常访问的传送脉冲和用于刷新的传送脉冲。合并控制电路，当用于刷新的传送脉冲和用于正常访问的传送脉冲相互抵触时，首先将传送脉冲施加到存储器访问控制电路，使另一个备用并产生用于识别正常访问的识别信号，清爽复用器接收刷新分组和数据分组，并响应于识别信号将一个分组应用于存储器访问控制电路。存储器访问控制电路响应于识别信号，选择性地基于数据包或基于刷新包的刷新操作来控制正常访问操作，以输出传送脉冲。当识别信号指示刷新操作时，消除控制电路消除从存储器访问控制电路输出的传送脉冲。

9. 发明授权

US5452464A Data driven type information processing apparatus capable of processing untagged data having no tag information 失效
标题翻译：能够处理没有标签信息的未标记数据的数据驱动型信息处理装置
公开(公告)号：US5452464A
公开(公告)日：1995-09-19
申请号：US134691
申请日：1993-10-12
申请人： Shingo Nomura , Tsuyoshi Muramatsu , Souichi Miyata , Tatsuyuki Kuwabara , Masaharu Tomita , Kiyotaka Nagamura , Takao Nakamura
发明人： Shingo Nomura , Tsuyoshi Muramatsu , Souichi Miyata , Tatsuyuki Kuwabara , Masaharu Tomita , Kiyotaka Nagamura , Takao Nakamura
IPC分类号： G06F15/82 , G06F13/38
CPC分类号： G06F15/82
摘要： A data driven type information processing apparatus includes an information processing unit for carrying out an operation process according to a data flow program based on a data packet with a tag attached thereto, and a tag attaching unit provided in an input stage of the information processing unit. The tag attaching unit attaches a prescribed tag to data without a tag, which is applied externally or from another information processing apparatus connected on-line to generate a tagged data packet, and applies the tagged packet to the information processing unit. An information processing apparatus which is connected on-line to the present information processing apparatus and mutually exchanges the processed data mutually is not limited to either von Neumann type or non Neumann type (data driven type). Accordingly, the data driven type information processing apparatus of the present invention can be used together with various types of information processing apparatus, and a system capable of processing both tagged and untagged data can be constructed.
摘要翻译：数据驱动型信息处理装置包括：信息处理单元，用于根据具有附加标签的数据包执行根据数据流程序的操作处理;以及标签附着单元，设置在信息处理单元的输入级中。标签附着单元将规定的标签附加到没有标签的数据，该标签在外部应用，或者从在线连接的另一信息处理设备应用，以生成标记数据分组，并将标记的分组应用于信息处理单元。在线连接到本信息处理装置并相互交换处理的数据的信息处理装置不限于冯诺依曼型或非诺依曼型（数据驱动型）。因此，本发明的数据驱动型信息处理装置可以与各种类型的信息处理装置一起使用，并且可以构建能够处理标记和未标记数据的系统。

10. 发明授权

US5511215A Debugging system for the loading and execution of data flow programs 失效
标题翻译：用于加载和执行数据流程序的调试系统
公开(公告)号：US5511215A
公开(公告)日：1996-04-23
申请号：US141210
申请日：1993-10-26
申请人： Toshiaki Terasaka , Tsuyoshi Muramatsu , Souichi Miyata , Tatsuyuki Kuwabara , Masaharu Tomita , Kiyotaka Nagamura , Takao Nakamura
发明人： Toshiaki Terasaka , Tsuyoshi Muramatsu , Souichi Miyata , Tatsuyuki Kuwabara , Masaharu Tomita , Kiyotaka Nagamura , Takao Nakamura
IPC分类号： G06F9/44 , G06F11/34 , G06F11/36 , G06F15/82 , G06F9/00
CPC分类号： G06F11/3652 , G06F11/3476 , G06F11/3495 , G06F11/3636 , G06F15/825 , G06F9/4436
摘要： A data processing system includes a data driven processor for carrying out a plurality of different information processing in parallel using respective plurality of provided data packets, a router, and a plurality of von Neumann processors. When a von Neumann processor provides program data packets to the data driven processor via the router to carry out program loading in the data driven processor, another von Neumann processor provides to the data driven processor a data packet storing dumping information via the router. The data driven processor dumps and provides a loaded program data according to the dumping instruction of the provided packet. Therefore, a plurality of von Neumann processors can be connected on-line to at least one data driven processor to carry out in parallel a plurality of different types of data transfer between the data driven processor and each von Neumann processor. These transfers include: (1) dumping a loaded program data packet to a von Neumann processor during loading of other program data packets for on-line verification of proper loading; and (2) outputting an operation result, of an operation process performed by the data driven processor, to the von Neumann processor for verification of proper operation processing during the continued operation processing of the data driven processor.
摘要翻译：数据处理系统包括数据驱动处理器，用于使用相应的多个提供的数据分组，路由器和多个冯诺依曼处理器并行地执行多个不同的信息处理。当冯·诺依曼处理器通过路由器向数据驱动处理器提供程序数据分组以在数据驱动处理器中执行程序加载时，另一个冯·诺依曼处理器通过路由器向数据驱动的处理器提供存储转储信息的数据分组。数据驱动处理器根据提供的数据包的转储指令转储并提供加载的程序数据。因此，多个冯诺依曼处理器可以在线连接到至少一个数据驱动处理器，以并行地在数据驱动处理器和每个冯诺依曼处理器之间并行执行多种不同类型的数据传输。这些转移包括：（1）在加载其他程序数据包以便正确加载的在线验证时，将加载的程序数据包转储给冯·诺依曼处理器; 以及（2）将由数据驱动处理器执行的操作处理的操作结果输出到冯诺依曼处理器，以在数据驱动处理器的连续操作处理期间验证正确的操作处理。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式