会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND
    • 用于夹紧或接近半导体区域的方法
    • US20090121770A1
    • 2009-05-14
    • US12033600
    • 2008-02-19
    • Samuel Patrick RankinRobert C. Dobkin
    • Samuel Patrick RankinRobert C. Dobkin
    • H03K5/08
    • G05F3/265H01L27/0248
    • A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio.
    • 钳位电路钳位由n型半导体区域接收的电压,而不使用肖特基晶体管。 钳位电路包括电流镜以及第一和第二双极晶体管。 电流镜接收第一电流并提供响应的第二电流。 第一电流由第一双极晶体管接收,第二电流由第二双极晶体管接收。 第一和第二双极晶体管的基极 - 发射极结电压之间的差异部分地限定了n型区域被钳位的电压。 为了正确启动电路,从设置在电流反射镜中的晶体管的基极/栅极端子取出电流。 该电路可选地包括一对交叉耦合的晶体管,以减少输出阻抗并提高电源抑制比。
    • 6. 发明授权
    • Electrostatic discharge clamp using vertical NPN transistor
    • 使用垂直NPN晶体管的静电放电钳
    • US5212618A
    • 1993-05-18
    • US518151
    • 1990-05-03
    • Dennis P. O'NeillWilliam C. RempferRobert C. Dobkin
    • Dennis P. O'NeillWilliam C. RempferRobert C. Dobkin
    • H01L27/02
    • H01L27/0248
    • An electrostatic discharge protection clamp particularly useful for with bipolar and biCMOS integrated circuits include an NPN transistor formed in an isolated tub in an epitaxial layer grown on a substrate. The collector of the NPN transistor is connected to the input terminal, and the emitter of the NPN transistor is connected to the substrate. A resistor interconnects the base and the emitter. Advantageously, the P-doped base can abut the P-doped isolation region forming the tub, and the P-doped isolation region can interconnect the emitter to the substrate. Below BV.sub.CES the clamp will look like an open circuit, and above BV.sub.CES the transistor will start conducting current. The transistor will break down collector to base. Conduction of the transistor causes a voltage drop across the base-emitter junction, and when this voltage drop exceeds the base-emitter forward voltage the transistor will turn on. Once the transistor is turned on and current starts flowing in the emitter, avalanche effects will cause the breakdown voltage to snap back to BV.sub.CEO and remain there until the emitter current drops below some low level, which will be at the end of the electrostatic discharge pulse. In the negative direction the tub to substrate diode provides an effective clamp which will clamp the voltage to a low value and limit the power dissipation in the junction. Alternatively, a bidirectional clamp can be provided in which a second NPN transistor is fabricated in the tub with the emitter of the second transistor connected to the input terminal and the collectors of the two transistors being interconnected by the N-doped epitaxial layer of the tub. The dopant conductivities can be reversed.
    • 特别适用于双极和biCMOS集成电路的静电放电保护钳包括形成在衬底上生长的外延层中的隔离桶中的NPN晶体管。 NPN晶体管的集电极连接到输入端子,NPN晶体管的发射极连接到基板。 电阻器将基极和发射极互连。 有利地,P掺杂的基极可以邻接形成桶的P掺杂隔离区,并且P掺杂隔离区可以将发射极与衬底互连。 在BVCES下方,钳位将看起来像一个开路,而在BVCES之上,晶体管将开始导通电流。 晶体管会将集电极分解为基极。 晶体管的导通导致基极 - 发射极结两端的电压降,当该电压降超过基极 - 发射极正向电压时,晶体管将导通。 一旦晶体管导通并且电流开始在发射极中流动,雪崩效应将导致击穿电压反弹至BVCEO,并保持在那里,直到发射极电流下降到一些低电平,这将在静电放电脉冲结束时 。 在负向方向上,桶至衬底二极管提供有效钳位,其将电压钳位到低值并限制结中的功率耗散。 或者,可以提供双向钳位,其中第二NPN晶体管制造在桶中,其中第二晶体管的发射极连接到输入端,并且两个晶体管的集电极通过盆的N掺杂外延层互连 。 掺杂剂的电导率可以颠倒。
    • 9. 发明授权
    • Infrared detector system
    • 红外探测器系统
    • US4318089A
    • 1982-03-02
    • US133353
    • 1980-03-24
    • Denes E. FrankelRobert C. DobkinBarry G. Broome
    • Denes E. FrankelRobert C. DobkinBarry G. Broome
    • G08B13/19G08B13/193G01J5/08G08B13/18
    • G08B13/19G08B13/193Y10S250/01
    • An improved infrared detector system includes a pair of thin film thermopile sensing elements that receives reflected energy from aspheric reflectors that are designed to provide optimum energy resolution. An absorbing coating can be placed above the sensors and extending beyond the periphery to improve the signal to noise ratio. A high gain low noise D.C. amplifier is coupled to the output of the infrared sensing elements while a high pass amplifier and low pass amplifier are designed to pass an amplified signal in the frequency range from approximately 0.2 Hz to 15 Hz. Finally, a combined peak detector and time dependent integrator summing amplifier circuit provides an enabling predetermined threshhold detection gate that requires either a predetermined large signal level or a multiple of small electrical signals within a preselected interval to produce an alarm enabling signal.
    • 改进的红外检测器系统包括一对薄膜热电堆感测元件,其接收来自非球面反射器的反射能量,其被设计为提供最佳能量分辨率。 吸收涂层可以放置在传感器上方并延伸超过外围,以提高信噪比。 高增益低噪声直流放大器耦合到红外线感测元件的输出,而高通放大器和低通放大器被设计成使从大约0.2Hz到15Hz的频率范围内的放大信号通过。 最后,组合峰值检测器和时间相关积分器求和放大器电路提供使能的预定阈值检测门,其需要预定的大信号电平或预选间隔内的小电信号的倍数来产生报警使能信号。
    • 10. 发明授权
    • Voltage regulator and current regulator
    • 电压调节器和电流调节器
    • US4176308A
    • 1979-11-27
    • US835243
    • 1977-09-21
    • Robert C. DobkinRobert A. Pease
    • Robert C. DobkinRobert A. Pease
    • G05F1/567G05F3/30H01L27/02G05F1/58G05F1/60
    • G05F3/30G05F1/567H01L27/0211
    • A voltage regulator including a current regulator for maintaining predetermined currents in the voltage regulator is disclosed. The voltage regulator includes an output terminal for providing an output voltage; an adjustment terminal; and a control circuit connected to the output terminal at a level that differs from the voltage at the adjustment terminal by a predetermined voltage difference. The control circuit of the voltage regulator includes a resistive divider coupled between the output terminal and the adjustment terminal; a pair of transistors having their collectors connected in common and their bases respectively coupled to the resistive divider to provide a portion of the voltage difference between the output terminal and the adjustment terminal across their bases. The two transistors are adapted for operating at different current densities for providing a predetermined ratio in current flow through the pair of transistors when the voltage difference between the output terminal and the adjustment terminal is the predetermined voltage difference. The control circuit further includes a high-gain amplifier circuit connected to the emitters of the pair of transistors and to the output terminal for driving the output terminal to a maintained voltage level at which the current flow through the pair of transistors is at the predetermined current ratio and the voltage difference between the output terminal and the adjustment terminal is the predetermined voltage difference. The disclosed voltage regulator is useful as a negative voltage regulator.
    • 公开了一种包括用于维持电压调节器中的预定电流的电流调节器的电压调节器。 电压调节器包括用于提供输出电压的输出端子; 调整终端; 以及控制电路,其以与调整端子处的电压不同的电平连接到输出端子预定的电压差。 电压调节器的控制电路包括耦合在输出端子和调节端子之间的电阻分压器; 一对晶体管具有共同连接的集电极和它们的基极分别耦合到电阻分压器,以在其基极之间提供输出端子和调节端子之间的电压差的一部分。 两个晶体管适于在不同的电流密度下操作,以便当输出端子和调整端子之间的电压差为预定电压差时,提供通过该对晶体管的电流的预定比率。 控制电路还包括连接到该对晶体管的发射极的高增益放大器电路和用于将输出端驱动到维持的电压电平的输出端,在该电压电平下,流过该对晶体管的电流处于预定电流 输出端子和调整端子之间的电压差是预定的电压差。 所公开的电压调节器可用作负电压调节器。