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1. 发明申请

US20080027664A1 Architectural Level Throughput Based Power Modeling Methodology and Apparatus for Pervasively Clock-Gated Processor Cores 有权
标题翻译：基于建筑级吞吐量的电力建模方法和设备，用于普适时钟门控处理器内核
公开(公告)号：US20080027664A1
公开(公告)日：2008-01-31
申请号：US11780712
申请日：2007-07-20
申请人： Pradip Bose , Tejas Karkhanis , Srinivasan Ramani , Malcolm Ware , Ken Vu
发明人： Pradip Bose , Tejas Karkhanis , Srinivasan Ramani , Malcolm Ware , Ken Vu
IPC分类号： G01R21/00
CPC分类号： G06F17/5022 , G06F2217/78
摘要： A method for estimating power dissipated by a processor core processing a workload-includes analyzing a reference test case to generate a reference workload characteristic, analyzing an actual workload to generate an actual workload characteristic, performing a power analysis for the reference test case to establish a reference power dissipation value and estimating an actual workload power dissipation value responsive to the actual and reference workload characteristics and the reference power dissipation value.
摘要翻译：一种用于估计由处理器核心处理工作负载的功率消耗的方法 - 包括分析参考测试用例以生成参考工作负载特征，分析实际工作负载以产生实际工作负载特性，对参考测试用例执行功率分析以建立参考功耗值，并根据实际和参考工作负载特性和参考功耗值估计实际工作负载功耗值。

2. 发明申请

US20060080625A1 Architectural level throughput based power modeling methodology and apparatus for pervasively clock-gated processor cores 有权
标题翻译：基于建筑级吞吐量的功率建模方法和设备，用于普及时钟门控处理器内核
公开(公告)号：US20060080625A1
公开(公告)日：2006-04-13
申请号：US10960730
申请日：2004-10-07
申请人： Pradip Bose , Tejas Karkhanis , Srinivasan Ramani , Malcolm Ware , Ken Vu
发明人： Pradip Bose , Tejas Karkhanis , Srinivasan Ramani , Malcolm Ware , Ken Vu
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： A method, system, and apparatus for estimating the power dissipated by a processor core processing a workload, where the method includes analyzing a reference test case to generate a reference workload characteristic. Analyzing an actual workload to generate an actual workload characteristic. Performing a power analysis for the reference test case to establish a reference power dissipation value. Estimating an actual workload power dissipation value responsive to the actual and reference workload characteristics and the reference power dissipation value
摘要翻译：一种用于估计由处理器核心处理工作负载消耗的功率的方法，系统和装置，其中所述方法包括分析参考测试用例以生成参考工作负载特性。分析实际工作负载以生成实际工作负载特性。对参考测试用例进行功率分析，建立参考功耗值。根据实际和参考工作负载特性以及参考功耗值估算实际工作负载功耗值

3. 发明申请

US20080069194A1 SYSTEM AND METHOD FOR CONTROLLING LINE DRIVER POWER IN DIGITAL SUBSCRIBER LINE MODEMS 有权
标题翻译：用于控制数字用户线路模式的线路驱动器功率的系统和方法
公开(公告)号：US20080069194A1
公开(公告)日：2008-03-20
申请号：US11945213
申请日：2007-11-26
申请人： Gordon DAVIS , Jeffrey Derby , Evangelos Eleftheriou , Sedat Oelcer , Malcolm Ware
发明人： Gordon DAVIS , Jeffrey Derby , Evangelos Eleftheriou , Sedat Oelcer , Malcolm Ware
IPC分类号： H04B1/38
CPC分类号： H04L25/028 , H04L27/2626 , H04M11/062 , Y02D50/44
摘要： A method for operating plurality of DSL modem transmitters integrated within a circuit card. The method includes each DSL modem transmitter: generating a full power physical frame when the DSL modem transmitter is provided with data to transmit; generating a low power physical frame having a control channel signal component and no data; and selecting between the full power physical frame and the low power physical frame for transmission from the DSL modem transmitter, wherein selection of the low power physical frame for transmission from the DSL modem transmitter is based only on the DSL modem transmitter having no data to transmit. The method further includes limiting aggregate flow of data to the plurality of DSL modem transmitters such that a total power required by the plurality of DSL modem transmitters is held below a predefined target power level.
摘要翻译：一种用于操作集成在电路卡内的多个DSL调制解调器发射机的方法。该方法包括每个DSL调制解调器发射机：当DSL调制解调器发射机被提供有要传输的数据时，产生全功率物理帧; 生成具有控制信道信号分量且不存在数据的低功率物理帧; 并且在全功率物理帧和低功率物理帧之间选择用于从DSL调制解调器发射机发射，其中，用于从DSL调制解调器发射机传输的低功率物理帧的选择仅基于没有数据传输的DSL调制解调器发射机。该方法还包括限制数据到多个DSL调制解调器发射机的汇总流量，使得多个DSL调制解调器发射机所需的总功率保持在预定义的目标功率电平以下。

4. 发明申请

US20070124094A1 Histogram difference method and system for power/performance measurement and management 有权
标题翻译：直方图差分法和功率/性能测量与管理系统
公开(公告)号：US20070124094A1
公开(公告)日：2007-05-31
申请号：US11289249
申请日：2005-11-29
申请人： Thomas Brey , Charles Lefurgy , Mark Rinaldi , Malcolm Ware
发明人： Thomas Brey , Charles Lefurgy , Mark Rinaldi , Malcolm Ware
IPC分类号： G01R21/06
CPC分类号： G06F1/3203 , G06F11/3452 , G06F2201/88 , Y02D10/34
摘要： A histogram difference method and system for power/performance measurement and management has low data storage requirements while supporting multiple monitoring applications having different update rates. Histogram data for power usage and/or performance mode is collected at a predetermined rate and the histogram data is read out at periodic intervals by the monitoring applications. The monitoring applications subtract the histogram data from previously read histogram data set to determine a interval difference histogram. The minimum and maximum values for the interval are the lowest-valued and highest-valued bin in the interval difference histogram that have a count greater than zero. The average value for the interval is the mean of the interval difference histogram. A conservative bound of the maximum and minimum values for a system can be determined by adding the values of the maximum and minimum values determined for each subsystem in the system.
摘要翻译：用于功率/性能测量和管理的直方图差分法和系统具有低数据存储要求，同时支持具有不同更新速率的多个监视应用。以预定速率收集功率使用和/或性能模式的直方图数据，并且监视应用以周期性的间隔读出直方图数据。监测应用从先前读取的直方图数据集中减去直方图数据，以确定间隔差直方图。间隔的最小值和最大值是计数大于零的间隔差异直方图中的最低值和最高值bin。间隔的平均值是间隔差直方图的平均值。系统的最大值和最小值的保守界限可以通过添加为系统中每个子系统确定的最大值和最小值的值来确定。

5. 发明申请

US20080097656A1 METHOD, SYSTEM AND CALIBRATION TECHNIQUE FOR POWER MEASUREMENT AND MANAGEMENT OVER MULTIPLE TIME FRAMES 有权
标题翻译：用于功率测量和多个时间框架上的管理的方法，系统和校准技术
公开(公告)号：US20080097656A1
公开(公告)日：2008-04-24
申请号：US11962381
申请日：2007-12-21
申请人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
发明人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
IPC分类号： G06F19/00
CPC分类号： G01V3/08 , G06F1/28 , G06F1/3203
摘要： A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.
摘要翻译：用于多个时间帧功率测量和管理的方法和系统和校准技术提供响应功率控制，同时满足全球系统功耗和功耗限制。一个或多个系统电源的功率输出被测量和处理以在多个不同的时间帧上产生功率值。来自不同时间帧的测量用于确定是否应该调整系统功率消耗，然后响应于确定对一个或多个设备进行功率管理。该确定可以根据不同的时间帧将一组最大和/或最小阈值与每个测量结果进行比较。校准技术使用精密参考电阻和参考电压源电流源，从电源检测电阻的输入侧引入压降，在电源输出的共模电压下进行校准。

6. 发明申请

US20060209898A1 Network congestion detection and automatic fallback: methods, systems & program products 失效
标题翻译：网络拥塞检测和自动回退：方法，系统和程序产品
公开(公告)号：US20060209898A1
公开(公告)日：2006-09-21
申请号：US11348417
申请日：2006-02-07
申请人： Youssef Abdelilah , Gordon Davis , Jeffrey Derby , Dongming Hwang , Clark Jeffries , Malcolm Ware , Hua Ye
发明人： Youssef Abdelilah , Gordon Davis , Jeffrey Derby , Dongming Hwang , Clark Jeffries , Malcolm Ware , Hua Ye
IPC分类号： H04J3/18
CPC分类号： H04L47/10 , H04L12/6418 , H04L29/06027 , H04L47/12 , H04L47/2425 , H04L47/263 , H04L47/70 , H04L47/745 , H04L47/748 , H04L47/762 , H04L65/1009 , H04L65/607 , H04L65/80 , H04L2012/6481 , H04L2012/6497
摘要： A codec detects congestion in a packet network and responds via a session control protocol to re-negotiate codec-type and/or parameters with the receiving codec to reduce bit rate for supporting a session. Once the connection and session are established, encoded packets start flowing between the two codecs. A control entity sends and receives network congestion control packets periodically in the session. The congestion control packets provide a “heartbeat” signal to the receiving codec. When the network is not congested, all “heartbeat” packets will be passed through the network. As network congestion increases, routers within the network discard excess packets to prevent network failure. The codecs respond to the missing packets by slowing down the bit rate or proceeding to renegotiate a lower bit rate via the session control protocol. If there are no missing packets, the codecs detect if the session is operating at the highest bit rate, and if not, re-negotiate a higher bit rate.
摘要翻译：编解码器检测分组网络中的拥塞，并通过会话控制协议进行响应，以使用接收编解码器重新协商编解码器类型和/或参数，以减少支持会话的比特率。一旦建立了连接和会话，编码的数据包将在两个编解码器之间开始流动。控制实体在会话中定期发送和接收网络拥塞控制报文。拥塞控制分组向接收编解码器提供“心跳”信号。当网络不拥塞时，所有“心跳”数据包将通过网络传递。随着网络拥塞的增加，网络内的路由器丢弃多余的数据包，防止网络故障。编解码器通过减慢比特率或通过会话控制协议进行重新协商较低的比特率来响应丢失的分组。如果没有丢失数据包，则编解码器检测会话是否以最高比特率运行，如果不是，则重新协商更高的比特率。

7. 发明申请

US20080072005A1 Facilitating Inter-DSP Data Communications 失效
标题翻译：促进DSP间数据通信
公开(公告)号：US20080072005A1
公开(公告)日：2008-03-20
申请号：US11944028
申请日：2007-11-21
申请人： Youseff Abdelilah , Bartholomew Blaner , Gordon Davis , Jeffrey Derby , Joseph Garvey , Malcolm Ware , Hua Ye
发明人： Youseff Abdelilah , Bartholomew Blaner , Gordon Davis , Jeffrey Derby , Joseph Garvey , Malcolm Ware , Hua Ye
IPC分类号： G06F12/02
CPC分类号： G06F13/28
摘要： A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.
摘要翻译：一种用于促进数字间数字信号处理（DSP）数据通信的方法，计算机程序产品和系统。直接存储器访问（DMA）控制器可以被配置为便于在耦合到DMA控制器的第一和第二DSP处理器核之间传输数据。 DMA控制器可以读取被称为“缓冲器描述符块”的数据结构来执行数据传送。缓冲器描述符块可以存储指示要检索和存储数据的源地址和目的地址。缓冲器描述符块还可以存储指示要传送的数据的大小的值，例如字节数。然后，DMA控制器可以将位于第一DSP处理器核心中的源地址处的数据以从缓冲器描述符块指示的大小（例如，字节数）传送到第二DSP处理器核心中的目的地地址。

8. 发明申请

US20070294558A1 CALIBRATION TECHNIQUE FOR POWER MEASUREMENT AND MANAGEMENT OVER MULTIPLE TIME FRAMES 失效
标题翻译：用于多个时间帧功率测量和管理的校准技术
公开(公告)号：US20070294558A1
公开(公告)日：2007-12-20
申请号：US11843104
申请日：2007-08-22
申请人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
发明人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
IPC分类号： G06F1/00
CPC分类号： G01V3/08 , G06F1/28 , G06F1/3203
摘要： A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.
摘要翻译：用于多个时间帧功率测量和管理的方法和系统和校准技术提供响应功率控制，同时满足全球系统功耗和功耗限制。一个或多个系统电源的功率输出被测量和处理以在多个不同的时间帧上产生功率值。来自不同时间帧的测量用于确定是否应该调整系统功率消耗，然后响应于确定对一个或多个设备进行功率管理。该确定可以根据不同的时间帧将一组最大和/或最小阈值与每个测量结果进行比较。校准技术使用精密参考电阻和参考电压源电流源，从电源检测电阻的输入侧引入压降，在电源输出的共模电压下进行校准。

9. 发明申请

US20060156042A1 Method, system and calibration technique for power measurement and management over multiple time frames 有权
标题翻译：多个时间范围内功率测量和管理的方法，系统和校准技术
公开(公告)号：US20060156042A1
公开(公告)日：2006-07-13
申请号：US11032877
申请日：2005-01-11
申请人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
发明人： Dhruv Desai , Nickolas Gruendler , Carl Morrell , Gary Shippy , Michael Scollard , Michael Steinmetz , Malcolm Ware , Christopher Wood
IPC分类号： G06F1/26
CPC分类号： G01V3/08 , G06F1/28 , G06F1/3203
摘要： A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.
摘要翻译：用于多个时间帧功率测量和管理的方法和系统和校准技术提供响应功率控制，同时满足全球系统功耗和功耗限制。一个或多个系统电源的功率输出被测量和处理以在多个不同的时间帧上产生功率值。来自不同时间帧的测量用于确定是否应该调整系统功率消耗，然后响应于确定对一个或多个设备进行功率管理。该确定可以根据不同的时间帧将一组最大和/或最小阈值与每个测量结果进行比较。校准技术使用精密参考电阻和参考电压源电流源，从电源检测电阻的输入侧引入压降，在电源输出的共模电压下进行校准。

10. 发明申请

US20060155415A1 Attributing energy consumption to individual code threads in a data processing system 有权
标题翻译：将能量消耗归因于数据处理系统中的各个代码线程
公开(公告)号：US20060155415A1
公开(公告)日：2006-07-13
申请号：US11034558
申请日：2005-01-13
申请人： Charles Lefurgy , Malcolm Ware
发明人： Charles Lefurgy , Malcolm Ware
IPC分类号： G06F19/00
CPC分类号： G06F1/3228 , G06F9/4893 , Y02D10/24
摘要： A data processing system attributes energy consumption to individual program segments or threads includes a processor that executes a first thread during a first portion of a measurement interval and a second thread during a second portion of the interval. An energy monitor measures the total energy during the interval. Energy attribution code attributes a first amount of the total energy to the first thread and a second amount to the second thread based in part on the execution times of the threads. The code may define a range of possible energy values by determining maximum and minimum energy constraints for the threads. The invention may also be extended to a multiprocessor environment and to a simultaneous multithreading (SMT) processor. In addition, the process may be expanded to determine energy consumed by various peripheral units such as hard disk controllers and the like.
摘要翻译：数据处理系统将能量消耗归因于各个程序段或线程包括处理器，其在测量间隔的第一部分期间执行第一线程，并且在间隔的第二部分期间执行第二线程。能量监测器测量间隔期间的总能量。能量归属代码部分地基于线程的执行时间，将第一线程的总能量的第一数量归因于第一线程，第二数量归属于第二线程。代码可以通过确定线程的最大和最小能量约束来定义可能的能量值的范围。本发明还可以扩展到多处理器环境和同时多线程（SMT）处理器。此外，可以扩展该过程以确定诸如硬盘控制器等的各种外围单元所消耗的能量。

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