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1. 发明授权

US08021935B2 Thin film device fabrication process using 3D template 有权
标题翻译：使用3D模板的薄膜器件制造工艺
公开(公告)号：US08021935B2
公开(公告)日：2011-09-20
申请号：US12243073
申请日：2008-10-01
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

2. 发明申请

US20100078640A1 Thin Film Transistor Backplane 有权
标题翻译：薄膜晶体管背板
公开(公告)号：US20100078640A1
公开(公告)日：2010-04-01
申请号：US12243073
申请日：2008-10-01
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L27/105 , B29D11/00
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

3. 发明申请

US20110309365A1 THIN FILM TRANSISTOR BACKPLANE 审中-公开
标题翻译：薄膜晶体管背板
公开(公告)号：US20110309365A1
公开(公告)日：2011-12-22
申请号：US13219571
申请日：2011-08-26
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L33/08
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

4. 发明申请

US20080229950A1 SEAMLESS IMPRINT ROLLER AND METHOD OF MAKING 审中-公开
标题翻译：无缝印花滚筒及其制作方法
公开(公告)号：US20080229950A1
公开(公告)日：2008-09-25
申请号：US11688086
申请日：2007-03-19
申请人： Ping Mei , Carl P. Taussig , Angeles Marcia Almanza-Workman , Albert H. Jeans
发明人： Ping Mei , Carl P. Taussig , Angeles Marcia Almanza-Workman , Albert H. Jeans
IPC分类号： B41N3/00
CPC分类号： B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： This invention provides a structure and method of forming a seamless imprint roller. The method includes providing a translucent cylindrical core. At least one uniform seamless layer of material is deposited about the cylindrical core. This uniform seamless layer of material is then processed to define a translucent three dimensional imprint pattern seamlessly disposed about the core. The pattern includes at least one structure extending from the core and having one or more elevations. The pattern and more specifically the structures are inherently aligned to one another and the cylindrical core.
摘要翻译：本发明提供一种形成无缝压印辊的结构和方法。该方法包括提供半透明的圆柱形芯。至少一个均匀的无缝层材料沉积在圆柱形芯上。然后处理这种均匀的无缝材料层以限定围绕芯部无缝地设置的半透明的三维压印图案。该图案包括从芯部延伸并且具有一个或多个高度的至少一个结构。该图案，更具体地说，结构彼此固定地对准和圆柱形芯。

5. 发明授权

US07795062B2 Method of forming a pressure switch thin film device 有权
标题翻译：形成压力开关薄膜装置的方法
公开(公告)号：US07795062B2
公开(公告)日：2010-09-14
申请号：US11696079
申请日：2007-04-03
申请人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
发明人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
IPC分类号： H01L21/00
CPC分类号： H01L27/14683 , G06K9/0002 , H01L27/14678 , H01L29/84
摘要： This invention provides a method of forming at least one pressure switch thin film device. The method includes providing a substrate and depositing a plurality of thin film device layers as a stack upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film device layers and the 3D template structure are then etched and at least one thin film device layer is undercut to provide a plurality of aligned electrical contact pairs and adjacent spacer posts. A flexible membrane providing a plurality of separate electrical contacts is deposited upon the spacer posts, the separate electrical contacts overlapping the contact pairs. The spacer posts provide a gap between the electrical contacts and the contact pairs.
摘要翻译：本发明提供一种形成至少一个压力开关薄膜器件的方法。该方法包括提供衬底并将多个薄膜器件层作为堆叠沉积在衬底上。在多个薄膜器件层上提供印模的3D模板结构。然后蚀刻多个薄膜器件层和3D模板结构，并且至少一个薄膜器件层被切削以提供多个对准的电接触对和相邻的间隔柱。提供多个单独的电触点的柔性膜沉积在间隔柱上，分开的电触点与触点对重叠。间隔柱在电触点和触点对之间提供间隙。

6. 发明申请

US20080248605A1 METHOD OF FORMING A PRESSURE SWITCH THIN FILM DEVICE 有权
标题翻译：形成压力开关薄膜装置的方法
公开(公告)号：US20080248605A1
公开(公告)日：2008-10-09
申请号：US11696079
申请日：2007-04-03
申请人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
发明人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
IPC分类号： H01L21/00 , H01L29/84
CPC分类号： H01L27/14683 , G06K9/0002 , H01L27/14678 , H01L29/84
摘要： This invention provides a method of forming at least one pressure switch thin film device. The method includes providing a substrate and depositing a plurality of thin film device layers as a stack upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film device layers and the 3D template structure are then etched and at least one thin film device layer is undercut to provide a plurality of aligned electrical contact pairs and adjacent spacer posts. A flexible membrane providing a plurality of separate electrical contacts is deposited upon the spacer posts, the separate electrical contacts overlapping the contact pairs. The spacer posts provide a gap between the electrical contacts and the contact pairs.
摘要翻译：本发明提供一种形成至少一个压力开关薄膜器件的方法。该方法包括提供衬底并将多个薄膜器件层作为堆叠沉积在衬底上。在多个薄膜器件层上提供印模的3D模板结构。然后蚀刻多个薄膜器件层和3D模板结构，并且至少一个薄膜器件层被切削以提供多个对准的电接触对和相邻的间隔柱。提供多个单独的电触点的柔性膜沉积在间隔柱上，分开的电触点与触点对重叠。间隔柱在电触点和触点对之间提供间隙。

7. 发明授权

US08877531B2 Electronic apparatus 有权
标题翻译：电子仪器
公开(公告)号：US08877531B2
公开(公告)日：2014-11-04
申请号：US13074259
申请日：2011-03-29
申请人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
发明人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
IPC分类号： H01L21/00 , H01L27/15 , H01L51/00
CPC分类号： H01L51/0024 , H01L27/156
摘要： An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.
摘要翻译：提供一种电子设备，其包括第一基板上的多个第一部件和第二基板上的多个第二部件。包括导电材料的层压材料被放置在第一部件和第二部件之间。任何一个第一组件可以耦合到第二组件的不同子集。

8. 发明申请

US20120074433A1 ELECTRONIC APPARATUS 有权
标题翻译：电子设备
公开(公告)号：US20120074433A1
公开(公告)日：2012-03-29
申请号：US13074259
申请日：2011-03-29
申请人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
发明人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
IPC分类号： H01L51/50 , H01L33/48
CPC分类号： H01L51/0024 , H01L27/156
摘要： An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.
摘要翻译：提供一种电子设备，其包括第一基板上的多个第一部件和第二基板上的多个第二部件。包括导电材料的层压材料被放置在第一部件和第二部件之间。任何一个第一组件可以耦合到第二组件的不同子集。

9. 发明授权

US07541227B2 Thin film devices and methods for forming the same 有权
标题翻译：薄膜器件及其形成方法
公开(公告)号：US07541227B2
公开(公告)日：2009-06-02
申请号：US11589580
申请日：2006-10-30
申请人： Ping Mei , Craig M. Perlov , Albert Hua Jeans , Carl Philip Taussig
发明人： Ping Mei , Craig M. Perlov , Albert Hua Jeans , Carl Philip Taussig
IPC分类号： H01L21/84
CPC分类号： H01L29/42384 , H01L29/6675 , H01L29/78645 , H01L29/7869
摘要： Thin film devices and methods for forming the same are disclosed herein. A method for forming a thin film device includes forming a first at least semi-conductive strip located at a first height relative to a surface of a substrate, and forming a second at least semi-conductive strip adjacent to the first at least semi-conductive strip. The second strip is located at a second height relative to the substrate surface, and the second height is different than the first height. A nano-gap is formed between the first and second at least semi-conductive strips.
摘要翻译：本文公开了薄膜器件及其形成方法。一种用于形成薄膜器件的方法包括形成位于相对于衬底表面的第一高度处的第一至少半导电条，以及形成与第一至少半导体相邻的第二至少半导电条跳闸。第二条带相对于基板表面位于第二高度，第二高度不同于第一高度。在第一和第二至少半导电条之间形成纳米间隙。

10. 发明授权

US08013633B2 Thin film transistor logic 失效
标题翻译：薄膜晶体管逻辑
公开(公告)号：US08013633B2
公开(公告)日：2011-09-06
申请号：US11821068
申请日：2007-06-20
申请人： Hao Luo , Ping Mei , Carl P. Taussig
发明人： Hao Luo , Ping Mei , Carl P. Taussig
IPC分类号： H03K19/0175
CPC分类号： H03K19/09441
摘要： A thin-film logic circuit, which can be fabricated entirely of TFTs of the same conductivity type, includes a logic stage connected to a supply voltage and a level shifter connected to a wider voltage range provided by the supply voltage and ground. The logic circuit produces output signals with full rail-to-rail signal range from ground to the supply voltage and can implement or include a basic logic component such as an inverter, a NAND gate, or a NOR gate or more complicated circuits in which many basic logic components are cascaded together. Such logic circuits can be fabricated directly on flexible structures or large areas such as in flat panel displays.
摘要翻译：可以完全由相同导电类型的TFT制造的薄膜逻辑电路包括连接到电源电压的逻辑级和连接到由电源电压和接地提供的较宽电压范围的电平转换器。逻辑电路产生具有从地到电源电压的完整轨到轨信号范围的输出信号，并且可以实现或包括诸如逆变器，NAND门或NOR门的基本逻辑组件或更复杂的电路，其中许多基本逻辑元件级联在一起。这样的逻辑电路可以直接在柔性结构或大面积上制造，例如在平板显示器中。

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