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1. 发明授权

US08877531B2 Electronic apparatus 有权
标题翻译：电子仪器
公开(公告)号：US08877531B2
公开(公告)日：2014-11-04
申请号：US13074259
申请日：2011-03-29
申请人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
发明人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
IPC分类号： H01L21/00 , H01L27/15 , H01L51/00
CPC分类号： H01L51/0024 , H01L27/156
摘要： An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.
摘要翻译：提供一种电子设备，其包括第一基板上的多个第一部件和第二基板上的多个第二部件。包括导电材料的层压材料被放置在第一部件和第二部件之间。任何一个第一组件可以耦合到第二组件的不同子集。

2. 发明申请

US20120074433A1 ELECTRONIC APPARATUS 有权
标题翻译：电子设备
公开(公告)号：US20120074433A1
公开(公告)日：2012-03-29
申请号：US13074259
申请日：2011-03-29
申请人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
发明人： Lihua Zhao , Hao Luo , Carl P. Taussig , James A. Brug , Richard E. Elder , Warren Jackson , Ping Mei
IPC分类号： H01L51/50 , H01L33/48
CPC分类号： H01L51/0024 , H01L27/156
摘要： An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.
摘要翻译：提供一种电子设备，其包括第一基板上的多个第一部件和第二基板上的多个第二部件。包括导电材料的层压材料被放置在第一部件和第二部件之间。任何一个第一组件可以耦合到第二组件的不同子集。

3. 发明申请

US20120113087A1 CURRENT-DRIVEN-PIXEL CIRCUITS AND RELATED METHODS 审中-公开
标题翻译：电流驱动像素电路及相关方法
公开(公告)号：US20120113087A1
公开(公告)日：2012-05-10
申请号：US13377804
申请日：2009-06-18
申请人： Carl P. Taussig , Richard E. Elder , Warren Jackson , Hao Luo
发明人： Carl P. Taussig , Richard E. Elder , Warren Jackson , Hao Luo
IPC分类号： G09G3/32 , G09G5/00 , H01L21/02
CPC分类号： G09G3/3233 , G09G2300/0852 , G09G2300/0876 , G09G2310/0254 , G09G2320/043 , H01L27/1255
摘要： Pixel circuits (100, 300) and related methods are provided. In this regard, a representative pixel circuit includes: a data line (104, 304) operative to carry a data signal; a select line (106, 306) operative to carry a select signal; a first thin film transistor (TFT) (T1, T1A) conductively coupled to the data line and to the select line; and a second TFT (T2, T2A) capacitively coupled to the first TFT, the second TFT being operative to drive an emissive load responsive to the data signal and the select signal; wherein the data signal is provided to the second TFT through capacitive coupling.
摘要翻译：提供像素电路（100,300）和相关方法。在这方面，代表像素电路包括：数据线（104,304），用于承载数据信号; 操作用于携带选择信号的选择线（106,306）; 与数据线和选择线导电耦合的第一薄膜晶体管（TFT）（T1，T1A）; 以及电容耦合到所述第一TFT的第二TFT（T2，T2A），所述第二TFT可操作以响应于所述数据信号和所述选择信号来驱动发射负载; 其中通过电容耦合将数据信号提供给第二TFT。

4. 发明申请

US20100078640A1 Thin Film Transistor Backplane 有权
标题翻译：薄膜晶体管背板
公开(公告)号：US20100078640A1
公开(公告)日：2010-04-01
申请号：US12243073
申请日：2008-10-01
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L27/105 , B29D11/00
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

5. 发明申请

US20080248605A1 METHOD OF FORMING A PRESSURE SWITCH THIN FILM DEVICE 有权
标题翻译：形成压力开关薄膜装置的方法
公开(公告)号：US20080248605A1
公开(公告)日：2008-10-09
申请号：US11696079
申请日：2007-04-03
申请人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
发明人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
IPC分类号： H01L21/00 , H01L29/84
CPC分类号： H01L27/14683 , G06K9/0002 , H01L27/14678 , H01L29/84
摘要： This invention provides a method of forming at least one pressure switch thin film device. The method includes providing a substrate and depositing a plurality of thin film device layers as a stack upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film device layers and the 3D template structure are then etched and at least one thin film device layer is undercut to provide a plurality of aligned electrical contact pairs and adjacent spacer posts. A flexible membrane providing a plurality of separate electrical contacts is deposited upon the spacer posts, the separate electrical contacts overlapping the contact pairs. The spacer posts provide a gap between the electrical contacts and the contact pairs.
摘要翻译：本发明提供一种形成至少一个压力开关薄膜器件的方法。该方法包括提供衬底并将多个薄膜器件层作为堆叠沉积在衬底上。在多个薄膜器件层上提供印模的3D模板结构。然后蚀刻多个薄膜器件层和3D模板结构，并且至少一个薄膜器件层被切削以提供多个对准的电接触对和相邻的间隔柱。提供多个单独的电触点的柔性膜沉积在间隔柱上，分开的电触点与触点对重叠。间隔柱在电触点和触点对之间提供间隙。

6. 发明授权

US08021935B2 Thin film device fabrication process using 3D template 有权
标题翻译：使用3D模板的薄膜器件制造工艺
公开(公告)号：US08021935B2
公开(公告)日：2011-09-20
申请号：US12243073
申请日：2008-10-01
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

7. 发明授权

US07795062B2 Method of forming a pressure switch thin film device 有权
标题翻译：形成压力开关薄膜装置的方法
公开(公告)号：US07795062B2
公开(公告)日：2010-09-14
申请号：US11696079
申请日：2007-04-03
申请人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
发明人： Carl P. Taussig , Ping Mei , Hao Luo , Warren Jackson
IPC分类号： H01L21/00
CPC分类号： H01L27/14683 , G06K9/0002 , H01L27/14678 , H01L29/84
摘要： This invention provides a method of forming at least one pressure switch thin film device. The method includes providing a substrate and depositing a plurality of thin film device layers as a stack upon the substrate. An imprinted 3D template structure is provided upon the plurality of thin film device layers. The plurality of thin film device layers and the 3D template structure are then etched and at least one thin film device layer is undercut to provide a plurality of aligned electrical contact pairs and adjacent spacer posts. A flexible membrane providing a plurality of separate electrical contacts is deposited upon the spacer posts, the separate electrical contacts overlapping the contact pairs. The spacer posts provide a gap between the electrical contacts and the contact pairs.
摘要翻译：本发明提供一种形成至少一个压力开关薄膜器件的方法。该方法包括提供衬底并将多个薄膜器件层作为堆叠沉积在衬底上。在多个薄膜器件层上提供印模的3D模板结构。然后蚀刻多个薄膜器件层和3D模板结构，并且至少一个薄膜器件层被切削以提供多个对准的电接触对和相邻的间隔柱。提供多个单独的电触点的柔性膜沉积在间隔柱上，分开的电触点与触点对重叠。间隔柱在电触点和触点对之间提供间隙。

8. 发明申请

US20110309365A1 THIN FILM TRANSISTOR BACKPLANE 审中-公开
标题翻译：薄膜晶体管背板
公开(公告)号：US20110309365A1
公开(公告)日：2011-12-22
申请号：US13219571
申请日：2011-08-26
申请人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
发明人： Ping Mei , Hao Luo , Albert Hua Jeans , Angeles Marcia Almanza-Workman , Robert A. Garcia , Warren Jackson , Carl P. Taussig , Craig M. Perlov
IPC分类号： H01L33/08
CPC分类号： H01L27/1288 , H01L27/1214 , Y10S438/942
摘要： A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.
摘要翻译：用于平板显示器的背板的装置的制造方法包括在衬底上沉积薄膜层，形成覆盖薄膜层的3D模板，以及蚀刻3D模板和薄膜层以形成栅线和晶体管从薄膜层。然后可以在栅极线和晶体管上沉积绝缘或钝化层，使得可以在绝缘层上形成列或数据线。

9. 发明申请

US20140268384A1 Method of Fabricating A Color Filter Array Using a Multilevel Structure 有权
标题翻译：使用多层结构制造滤色器阵列的方法
公开(公告)号：US20140268384A1
公开(公告)日：2014-09-18
申请号：US14355507
申请日：2011-10-31
申请人： Carl P. Taussig , Edward Robert Holland , Ping Mei , Richard E. Elder
发明人： Carl P. Taussig , Edward Robert Holland , Ping Mei , Richard E. Elder
IPC分类号： G03C7/12 , G02B5/20
CPC分类号： G03F7/0007 , B29D11/00634 , B29D11/0073 , G02B5/201 , G02B5/208 , G02B5/223 , G02F1/1303 , G02F1/133509 , G02F1/133516 , G03C7/12 , G03F7/0002 , H01L27/14621 , H01L27/14685
摘要： A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.
摘要翻译：一种制造滤色器阵列的方法，包括提供衬底，形成附着于衬底的多层结构，蚀刻多层结构以露出多层结构中的第一阱，至少用第一颜色填充多层结构中的第一阱固化第一颜色分量，蚀刻多层结构以暴露多层结构中的第二孔，至少用第二颜色分量填充多层结构中的第二孔，并固化第二颜色分量。

10. 发明授权

US09535315B2 Method of fabricating a color filter array using a multilevel structure 有权
标题翻译：使用多层结构制造滤色器阵列的方法
公开(公告)号：US09535315B2
公开(公告)日：2017-01-03
申请号：US14355507
申请日：2011-10-31
申请人： Carl P. Taussig , Edward Robert Holland , Ping Mei , Richard E. Elder
发明人： Carl P. Taussig , Edward Robert Holland , Ping Mei , Richard E. Elder
IPC分类号： G03C7/12 , G02B5/22 , G02F1/1335 , G03F7/00 , H01L27/146 , B29D11/00 , G02B5/20 , G02F1/13
CPC分类号： G03F7/0007 , B29D11/00634 , B29D11/0073 , G02B5/201 , G02B5/208 , G02B5/223 , G02F1/1303 , G02F1/133509 , G02F1/133516 , G03C7/12 , G03F7/0002 , H01L27/14621 , H01L27/14685
摘要： A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.
摘要翻译：一种制造滤色器阵列的方法，包括提供衬底，形成附着于衬底的多层结构，蚀刻多层结构以露出多层结构中的第一阱，至少用第一颜色填充多层结构中的第一阱固化第一颜色分量，蚀刻多层结构以暴露多层结构中的第二孔，至少用第二颜色分量填充多层结构中的第二孔，并固化第二颜色分量。

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