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1. 发明授权

US5629237A Taper etching without re-entrance profile 失效
标题翻译：锥形蚀刻无需重新进入型材
公开(公告)号：US5629237A
公开(公告)日：1997-05-13
申请号：US545380
申请日：1995-10-19
申请人： Pei-Jan Wang , Kuei-Lung Chou , Jiunn-Jyi Lin , Hsien-Wen Chang
发明人： Pei-Jan Wang , Kuei-Lung Chou , Jiunn-Jyi Lin , Hsien-Wen Chang
IPC分类号： H01L21/768 , H01L21/311
CPC分类号： H01L21/76804 , Y10S438/978
摘要： A method is described for forming tapered contact via holes in large scale integrated circuit structures which avoids the formation of a re-entrance profile. The re-entrance profile can form at the entrance to the contact via hole when a dry etch is used as a first etching step by redepositing material removed during the dry etch at the entrance of the contact via hole. This re-entrance profile makes the angle of entrance into the contact via hole greater than 90.degree. and the step coverage of metal filling the hole poor. This invention uses wet etching with a greater lateral etch rate than vertical etch rate as a first etching step in the formation of the contact via hole and avoids the formation of the re-entrance profile. The edges of the resulting contact via hole are smooth and the entrance angle into the contact via hole is substantially less than 90.degree.. The step coverage of metal later filling the contact via hole is substantially improved.
摘要翻译：描述了一种用于在大规模集成电路结构中形成锥形接触通孔的方法，其避免形成再入口轮廓。当使用干蚀刻作为第一蚀刻步骤时，通过在干蚀刻中去除的材料在接触通孔的入口处重新沉积材料，可以在接触孔的入口处形成再入口轮廓。这种再入口轮廓使接触孔的入口角大于90°，填充孔的金属台阶覆盖差。本发明使用具有比垂直蚀刻速率更大的横向蚀刻速率的湿蚀刻作为形成接触通孔的第一蚀刻步骤，并避免形成再入口轮廓。所得接触通孔的边缘是光滑的，并且接触通孔中的入射角基本上小于90°。稍后填充接触通孔的金属的台阶覆盖率显着提高。

2. 发明授权

US5770515A Method of in-situ wafer cooling for a sequential WSI/alpha -Si sputtering process 失效
标题翻译：用于顺序WSI /α-Si溅射工艺的原位晶片冷却方法
公开(公告)号：US5770515A
公开(公告)日：1998-06-23
申请号：US764335
申请日：1996-12-12
申请人： Hsien-Liang Meng , Elvis Huang , Pei-Jan Wang , Yeong Rvey Shiue
发明人： Hsien-Liang Meng , Elvis Huang , Pei-Jan Wang , Yeong Rvey Shiue
IPC分类号： H01L21/00 , H01L21/28 , H01L21/285
CPC分类号： H01L21/67167 , H01L21/28061 , H01L21/28123 , H01L21/2855 , H01L21/67207 , Y10S438/908 , Y10S438/952
摘要： The present invention relates to a method of a sequencial WSi/.alpha.-Si sputtering process, more particularly to a method of in-situ wafer cooling for a sequencial WSi/.alpha.-Si sputtering process. A sputtering process of WSi and a sputtering process of .alpha.-Si are finished in a multi-chamber sputtering apparatus according to the invention; meanwhile, a wafer is cooled down by bolwing of inert gas before a process of sputtering .alpha.-Si starts. Thus, compared to traditional art of finishing WSi/.alpha.-Si sputtering in two apparatus, partial time of vacuuming and venting required in a sputtering process is saved according to the invention, thereby, shortening the production cycle time, reducing the possibility of wafer contamination, and suppressing the fabricating cost.
摘要翻译：本发明涉及一种顺序WSi /α-Si溅射工艺的方法，更具体地说，涉及用于顺势WSi /α-Si溅射工艺的原位晶片冷却方法。 WSi的溅射工艺和α-Si的溅射工艺在根据本发明的多室溅射装置中完成; 同时，在溅射α-Si开始的过程之前，通过惰性气体的抽吸来冷却晶片。因此，与传统的两台设备中的WSi /α-Si溅射技术相比，根据本发明节省了溅射过程中所需的部分抽真空时间，从而缩短了生产周期时间，降低了晶片污染的可能性，并抑制制造成本。

3. 发明授权

US5776833A Method for forming metal plug 失效
标题翻译：金属插头成型方法
公开(公告)号：US5776833A
公开(公告)日：1998-07-07
申请号：US707758
申请日：1996-09-04
申请人： Hsi-Chieh Chen , Champion Yi , Pei-Jan Wang , Yeong-Ruey Shiue
发明人： Hsi-Chieh Chen , Champion Yi , Pei-Jan Wang , Yeong-Ruey Shiue
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76877 , H01L21/7684 , H01L21/76885
摘要： A method for forming a metal plug is provided. The method includes: a) forming a metal contact window in a substrate having an oxide layer; b) forming a barrier layer over a top surface of the oxide layer and a wall defining the metal contact window; c) forming a metal layer covering the barrier layer and filling up the metal contact window; d) removing a portion of the metal layer located above the barrier layer covering the top surface of the oxide layer by a chemical mechanical polishing method; and e) removing the barrier layer covering the top surface of the oxide layer by an etching method.
摘要翻译：提供一种用于形成金属插头的方法。该方法包括：a）在具有氧化物层的衬底中形成金属接触窗; b）在氧化物层的顶表面上形成阻挡层和限定金属接触窗的壁; c）形成覆盖阻挡层并填充金属接触窗的金属层; d）通过化学机械抛光方法去除位于覆盖氧化物层顶表面的阻挡层上方的金属层的一部分; 以及e）通过蚀刻方法除去覆盖氧化物层的顶表面的阻挡层。

4. 发明授权

US5670016A Method for cleaning substrate prior to tungsten deposition 失效
标题翻译：在钨沉积之前清洁基板的方法
公开(公告)号：US5670016A
公开(公告)日：1997-09-23
申请号：US558099
申请日：1995-11-15
申请人： Mao-Chieh Chen , Wen-Kuan Yeh , Pei-Jan Wang , Lu-Min Liu
发明人： Mao-Chieh Chen , Wen-Kuan Yeh , Pei-Jan Wang , Lu-Min Liu
IPC分类号： H01L21/768 , H01L21/00
CPC分类号： H01L21/76879
摘要： A method for cleaning a substrate prior to tungsten deposition is disclosed, said substrate having via holes and trenches lines thereon. The method includes steps of providing a solution of hydroxylamine sulfate; dipping said substrate in said solution; and agitating said solution by an agitating device.
摘要翻译：公开了一种在钨沉积之前清洁基板的方法，所述基板上具有通孔和沟槽线。该方法包括提供硫酸羟胺溶液的步骤; 将所述衬底浸入所述溶液中; 并用搅拌装置搅拌所述溶液。

5. 发明授权

US5963830A Method of forming a TiN/W barrier layer for a hot Al plug 失效
标题翻译：形成用于热铝塞的TiN / W阻挡层的方法
公开(公告)号：US5963830A
公开(公告)日：1999-10-05
申请号：US960108
申请日：1997-10-27
申请人： Pei-Jan Wang , Yeong-Ruey Shiue , Yung-Tsun Lo , Hsien-Liang Meng
发明人： Pei-Jan Wang , Yeong-Ruey Shiue , Yung-Tsun Lo , Hsien-Liang Meng
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76868 , H01L21/76882
摘要： The present invention relates to a method of forming a barrier metal layer for a hot Al plug and its structure and more particularly to remarkably ameliorate the performance of a barrier metal layer preventing Al metal used as an interconnection layer from diffusing into a silicon substrate. A barrier metal layer according to the present invention is a stacked structure comprising a top layer of Tungsten (W) formed by a Chemical Vapor Deposition (CVD) method and a bottom layer of TiN. Then, a Al interconnection layer deposited at high temperature fills a plug and finishes a plug structure having advantages of low manufacturing cost and full prevention of Al diffusion.
摘要翻译：本发明涉及一种形成用于热铝塞及其结构的阻挡金属层的方法，更具体地，显着地改善了防止用作互连层的Al金属扩散到硅衬底中的阻挡金属层的性能。根据本发明的阻挡金属层是包括通过化学气相沉积（CVD）法形成的钨（W）的顶层和TiN的底层的层叠结构。然后，在高温下沉积的Al互连层填充塞子并完成具有低制造成本和完全防止Al扩散的优点的插塞结构。

6. 发明授权

US5180689A Tapered opening sidewall with multi-step etching process 失效
标题翻译：锥形开口侧壁采用多步蚀刻工艺
公开(公告)号：US5180689A
公开(公告)日：1993-01-19
申请号：US757135
申请日：1991-09-10
申请人： Hsien-Tsung Liu , Jin-Yuan Lee , Jiann-Kwang Wang , Chue-San Yoo , Pei-Jan Wang
发明人： Hsien-Tsung Liu , Jin-Yuan Lee , Jiann-Kwang Wang , Chue-San Yoo , Pei-Jan Wang
IPC分类号： H01L21/768
CPC分类号： H01L21/76804
摘要： A method is described for making a tapered opening for an integrated circuit having a feature size of about one micrometer or less which will in due course be filled with a metallurgy conductor. An integrated circuit structure is provided having device elements within a semiconductor substrate and multilayer insulating layers thereover. A resist masking layer is formed over the said multilayer insulating layer having openings therein in the areas where the said openings are desired. The multilayer insulating layer is anisotropically etched through a first thickness to form a first opening using the resist masking layer as a mask. A second thickness portion of the multilayer insulating layer is isotropically etched to substantially uniformly enlarge and taper the first opening while using the unchanged resist layer. The remaining thickness of the multilayer insulating layer is anisotropically etched through to the semiconductor substrate to form the desirable tapered opening with a metal step coverage improvement over the state of the art between about 20 to 60%. Metal step coverage is defined as the ratio of thickness of the thinnest metal in the contact hole to the metal thickness on the horizontal area. The resist layer mask is removed.
摘要翻译：描述了一种用于制造具有约1微米或更小的特征尺寸的集成电路的锥形开口的方法，其将在适当的时候被冶金导体填充。提供了一种集成电路结构，其具有半导体衬底内的器件元件及其上的多层绝缘层。在需要所述开口的区域中，在其上具有开口的所述多层绝缘层上形成抗蚀剂掩模层。多层绝缘层通过第一厚度进行各向异性蚀刻，以形成使用抗蚀剂掩模层作为掩模的第一开口。多层绝缘层的第二厚度部分被各向同性地蚀刻，以在使用未改变的抗蚀剂层的同时大致均匀地放大和渐缩第一开口。将多层绝缘层的剩余厚度各向异性地蚀刻到半导体衬底上以形成期望的锥形开口，其中的现有技术的金属级覆盖改善在约20％至60％之间。金属台阶覆盖率定义为接触孔中最薄金属的厚度与水平面上的金属厚度之比。去除抗蚀剂层掩模。

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