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1. 发明授权

US5940683A LED display packaging with substrate removal and method of fabrication 失效
标题翻译： LED显示包装与基板去除及其制造方法
公开(公告)号：US5940683A
公开(公告)日：1999-08-17
申请号：US588470
申请日：1996-01-18
申请人： Paige M. Holm , Chan-Long Shieh , Curtis D. Moyer
发明人： Paige M. Holm , Chan-Long Shieh , Curtis D. Moyer
IPC分类号： H01L21/60 , G09F9/33 , H01L25/16 , H01L27/15 , H01L33/00 , H01L21/00
CPC分类号： H01L25/167 , G09F9/3026 , H01L25/162 , H01L27/156 , H01L2924/0002 , H01L33/0079
摘要： A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a LED array display chip, fabricated of an array of LEDs, formed on a substrate, having connection pads positioned about the perimeter of the LED array display chip, a separate silicon driver chip having connection pads routed to an uppermost surface, positioned to cooperatively engage those of the display chip when properly registered and interconnected using wafer level processing technology. The display chip being flip chip mounted to the driver chip and having a layer of interchip bonding dielectric positioned between the space defined by the display chip and the driver chip. The LED display and driver chip package subsequently having selectively removed the substrate onto which the LED array was initially formed, thereby exposing the connection pads of the display chip and a remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer. The light emitted from the LED display chip, being emitted through the remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer of the display chip.
摘要翻译：一种制造发光二极管（LED）显示封装的发光二极管显示封装和方法，所述发光二极管（LED）显示封装包括形成在基板上的由阵列LED制成的LED阵列显示芯片，所述LED阵列显示芯片具有围绕所述LED阵列显示器周边定位的连接焊盘芯片，具有连接到最上表面的连接焊盘的单独的硅驱动器芯片，定位成当使用晶片级处理技术正确地注册和互连时协作地接合显示芯片的那些。显示芯片被倒装芯片安装到驱动器芯片上，并且具有位于由显示芯片和驱动器芯片限定的空间之间的芯片间接合电介质层。 LED显示器和驱动器芯片封装随后选择性地去除了最初形成LED阵列的衬底，从而暴露显示芯片的连接焊盘和剩余的铟 - 镓 - 铝 - 磷化物（InGaAlP）外延层。从LED显示芯片发出的光通过显示芯片的剩余的铟镓铝磷化物（InGaAlP）外延层发射。

2. 发明授权

US5780321A LED display packaging with substrate removal and method of fabrication 失效
标题翻译： LED显示包装与基板去除及其制造方法
公开(公告)号：US5780321A
公开(公告)日：1998-07-14
申请号：US699263
申请日：1996-08-19
申请人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
发明人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
IPC分类号： H01L21/60 , G09F9/33 , H01L25/16 , H01L27/15 , H01L33/00 , H01L21/00
CPC分类号： H01L27/156 , H01L25/162 , H01L25/167 , H01L2924/0002
摘要： A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a light emitting diode array on a substrate, having row and column connection pads routed to display connection pads positioned on an uppermost surface of the LED array device, a separate silicon driver device having connection pads routed to an uppermost surface, positioned to cooperatively meet those of the LED device when properly registered, the LED device flip chip bump bonded to the driver device using standard C5 DCA, an underfill layer positioned between the space defined by the LED device and the driver device. The LED display and driver device package subsequently having selectively removed the substrate onto which the LED array was initially formed. The light emitted from the LED display device, being emitted through the remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer of the LED device.
摘要翻译：一种发光二极管显示器封装以及制造在衬底上包括发光二极管阵列的发光二极管（LED）显示器封装的方法，所述发光二极管阵列具有布置成显示位于所述LED阵列器件的最上表面上的连接焊盘的行和列连接焊盘，具有连接到最上表面的连接焊盘的单独的硅驱动器装置，其被定位成在正确地注册时协同地与LED器件的那些耦合，使用标准C5 DCA将LED装置倒装芯片凸块结合到驱动器装置，底部填充层位于 LED设备和驱动器设备定义的空间。 LED显示器和驱动器件封装件随后选择性地去除了最初形成LED阵列的衬底。从LED显示装置发射的光通过LED装置的剩余的铟 - 镓 - 铝 - 磷化物（InGaAlP）外延层发射。

3. 发明授权

US5621225A Light emitting diode display package 失效
标题翻译：发光二极管显示封装
公开(公告)号：US5621225A
公开(公告)日：1997-04-15
申请号：US599434
申请日：1996-01-18
申请人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
发明人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
IPC分类号： H01L21/60 , G09F9/33 , H01L25/16 , H01L27/15 , H01L33/00 , H01L23/48
CPC分类号： H01L27/156 , H01L25/162 , H01L25/167 , H01L2924/0002
摘要： A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a light emitting diode array on a substrate, having row and column connection pads routed to display connection pads positioned on an uppermost surface of the LED array device, a separate silicon driver device having connection pads routed to an uppermost surface, positioned to cooperatively meet those of the LED device when properly registered, the LED device flip chip bump bonded to the driver device using standard C5 DCA, an underfill layer positioned between the space defined by the LED device and the driver device. The LED display and driver device package subsequently having selectively removed the substrate onto which the LED array was initially formed. The light emitted from the LED display device, being emitted through the remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer of the LED device.
摘要翻译：一种发光二极管显示器封装以及制造在衬底上包括发光二极管阵列的发光二极管（LED）显示器封装的方法，所述发光二极管阵列具有布置成显示位于所述LED阵列器件的最上表面上的连接焊盘的行和列连接焊盘，具有连接到最上表面的连接焊盘的单独的硅驱动器器件，其被定位成在正确地注册时协同地与LED器件的LED器件匹配，使用标准C5 DCA将LED器件倒装芯片凸块结合到驱动器器件，底部填充层位于 LED设备和驱动器设备定义的空间。 LED显示器和驱动器件封装件随后选择性地去除了最初形成LED阵列的衬底。从LED显示装置发射的光通过LED装置的剩余的铟 - 镓 - 铝 - 磷化物（InGaAlP）外延层发射。

4. 发明授权

US5827753A Monolithic integration of driver circuits with LED array and methods of manufacture 失效
标题翻译：驱动电路与LED阵列的整体集成和制造方法
公开(公告)号：US5827753A
公开(公告)日：1998-10-27
申请号：US820850
申请日：1997-03-20
申请人： Rong-Ting Huang , Phil Wright , Chan-Long Shieh , Paige M. Holm
发明人： Rong-Ting Huang , Phil Wright , Chan-Long Shieh , Paige M. Holm
IPC分类号： H01L27/15 , H01L21/338
CPC分类号： H01L27/156
摘要： A method of fabricating a monolithically integrated LED array and driving circuitry includes sequentially forming overlying layers of material on the surface of a semiconductor substrate, the layers cooperating to emit light when activated. An insulating layer is formed on the layers and the layers are isolated into an array area and driver circuitry areas with row and column dividers dividing the array area into an array of LEDs arranged in rows and columns. Row and column driver circuits are formed on the insulating layer in the driver circuitry areas and row and column buses individually couple each LED in the array to row and column driver circuits.
摘要翻译：制造单片集成LED阵列和驱动电路的方法包括在半导体衬底的表面上依次形成覆盖层的材料，该层在激活时协同发光。在层上形成绝缘层，并且将层隔离成阵列区域，并且具有行和列分隔线的驱动器电路区域将阵列区域划分为以行和列布置的LED阵列。行和列驱动电路形成在驱动器电路区域中的绝缘层上，行和列总线将阵列中的每个LED单独耦合到行和列驱动器电路。

5. 发明授权

US09911857B2 Thin film transistor with low trap-density material abutting a metal oxide active layer and the gate dielectric 有权
公开(公告)号：US09911857B2
公开(公告)日：2018-03-06
申请号：US12915712
申请日：2010-10-29
申请人： Chan-Long Shieh , Fatt Foong , Gang Yu
发明人： Chan-Long Shieh , Fatt Foong , Gang Yu
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/78696
摘要： A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.

6. 发明授权

US09773824B2 Active matrix light emitting diode array and projector display comprising it 有权
公开(公告)号：US09773824B2
公开(公告)日：2017-09-26
申请号：US15087716
申请日：2016-03-31
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L27/146 , H01L27/12 , H01L33/00 , H01L33/44 , H01L33/46 , H01L33/62 , H01L33/64 , H01L27/15
CPC分类号： H01L27/14609 , H01L27/1225 , H01L27/1248 , H01L27/1262 , H01L27/14603 , H01L27/1463 , H01L27/14663 , H01L27/14692 , H01L27/156 , H01L33/0075 , H01L33/44 , H01L33/46 , H01L33/62 , H01L33/642 , H01L2933/0025 , H01L2933/0033 , H01L2933/0066 , H01L2933/0075
摘要： A method of fabricating a pixelated imager and structure including a substrate with a bottom contact layer and active element blanket layers deposited on the bottom contact layer. The blanket layers are separated into an array of active elements with trenches isolating adjacent active elements in the array. A dielectric passivation/planarization layer is positioned over the array of active elements. An array of active element readout circuits overlies the passivation/planarization layer above the trenches with one active element readout circuit coupled to each active element of the array of active elements. Each active element and coupled active element readout circuit defines a pixel and the array of active elements and the coupled array of active element readout circuits defines a pixelated imager, and the readout circuit coupled to each active element includes at least one TFT with an active channel comprising a metal-oxide semiconductor material.

7. 发明授权

US09614102B2 Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption 有权
公开(公告)号：US09614102B2
公开(公告)日：2017-04-04
申请号：US15080231
申请日：2016-03-24
申请人： Chan-Long Shieh , Gang Yu , Fatt Foong
发明人： Chan-Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L29/786 , H01L27/12 , H01L29/66 , H01L21/70 , H01L21/02
CPC分类号： H01L29/78696 , H01L21/02554 , H01L21/02565 , H01L21/707 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A method of fabricating MO TFTs includes positioning opaque gate metal on a transparent substrate to define a gate area. Depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Depositing etch stop material on the semiconductor material. Positioning photoresist defining an isolation area in the semiconductor material, the etch stop material and the photoresist being selectively removable. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

8. 发明申请

US20160293769A1 HIGH MOBILITY STABILE METAL OXIDE TFT 审中-公开
标题翻译：高移动性稳定的金属氧化物薄膜
公开(公告)号：US20160293769A1
公开(公告)日：2016-10-06
申请号：US15186628
申请日：2016-06-20
申请人： Chan-Long Shieh , Gang Yu , Fatt Foong , Tian Xiao , Juergen Musolf
发明人： Chan-Long Shieh , Gang Yu , Fatt Foong , Tian Xiao , Juergen Musolf
IPC分类号： H01L29/786 , H01L23/535 , H01L21/467 , H01L29/66 , H01L21/4763 , H01L29/417 , H01L29/06
CPC分类号： H01L29/7869 , H01L21/467 , H01L21/4763 , H01L23/535 , H01L29/0649 , H01L29/41733 , H01L29/66969 , H01L29/78696
摘要： A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.
摘要翻译：一种制造稳定的高迁移率金属氧化物薄膜晶体管的方法包括以下步骤：提供衬底，将栅极定位在衬底上，以及在栅极上沉积栅极电介质层，并且将衬底部分未被栅极覆盖。包括金属氧化物半导体膜和金属氧化物钝化膜的多层膜活性层沉积在栅极电介质上，钝化膜位于与半导体膜的重叠关系中。蚀刻停止层位于钝化膜的表面上并限定有源层中的沟道区。在蚀刻停止层的相对侧上的多个膜有源层的一部分被修改以形成欧姆接触，并且金属源极/漏极触点位于多个膜有源层的修改部分上。

9. 发明授权

US09362413B2 MOTFT with un-patterned etch-stop 有权
标题翻译：具有未图案化蚀刻停止的MOTFT
公开(公告)号：US09362413B2
公开(公告)日：2016-06-07
申请号：US14081130
申请日：2013-11-15
申请人： Gang Yu , Chan-Long Shieh , Juergen Musolf , Fatt Foong , Tian Xiao
发明人： Gang Yu , Chan-Long Shieh , Juergen Musolf , Fatt Foong , Tian Xiao
IPC分类号： H01L29/786 , H01L29/24 , H01L21/02 , H01L29/66
CPC分类号： H01L27/1203 , H01L21/02565 , H01L21/02664 , H01L29/24 , H01L29/66969 , H01L29/7869
摘要： A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
摘要翻译：一种制造高迁移率半导体金属氧化物薄膜晶体管的方法，包括以下步骤：沉积半导体金属氧化物材料层，在MO材料层上沉积蚀刻停止材料的覆盖层，以及图案化源/漏层包括将源极/漏极金属层蚀刻成定位成限定半导体金属氧化物层中的沟道区域的源极/漏极端子的蚀刻停止材料的覆盖层上的金属。蚀刻停止材料至少在源极/漏极端子之下在垂直于覆盖层的平面的方向上导电，以在源极/漏极端子和半导体金属氧化物材料层之间提供电接触。蚀刻停止材料也是化学稳固的，以在蚀刻工艺期间保护半导体金属氧化物沟道材料层。

10. 发明授权

US09318614B2 Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption 有权
标题翻译：自对准金属氧化物TFT，具有减少数量的掩模并降低功耗
公开(公告)号：US09318614B2
公开(公告)日：2016-04-19
申请号：US14071644
申请日：2013-11-05
申请人： Chan-Long Shieh , Gang Yu , Fatt Foong
发明人： Chan-Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L21/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L21/70 , H01L21/02
CPC分类号： H01L29/78696 , H01L21/02554 , H01L21/02565 , H01L21/707 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.
摘要翻译：制造MOTFT的方法包括将不透明栅极金属定位在透明基板上，沉积覆盖栅极金属的栅介质材料和周围区域，以及在其上沉积金属氧化物半导体材料。蚀刻停止材料沉积在半导体材料上。光致抗蚀剂界定半导体材料中的隔离区。从基板的后表面露出光致抗蚀剂，除去暴露的部分以使蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。蚀刻半导体材料的未覆盖部分以隔离TFT。使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。沉积和图案化导电材料以形成源区和漏区。

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