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1. 发明授权

US4464420A Ceramic multilayer circuit board and a process for manufacturing the same 失效
标题翻译：陶瓷多层电路板及其制造方法
公开(公告)号：US4464420A
公开(公告)日：1984-08-07
申请号：US421833
申请日：1982-09-23
申请人： Noriyuki Taguchi , Tsuyoshi Fuzita , Gyozo Toda , Syoosaku Ishihara , Takashi Kuroki , Tatsuhiro Suzuki
发明人： Noriyuki Taguchi , Tsuyoshi Fuzita , Gyozo Toda , Syoosaku Ishihara , Takashi Kuroki , Tatsuhiro Suzuki
IPC分类号： H05K3/46 , H01L21/70 , H05K1/03 , H05K1/09 , H05K1/16 , H05K3/24 , B05D5/12
CPC分类号： H05K3/246 , H01L21/705 , H05K1/167 , H05K1/0306 , H05K1/092 , H05K2201/0347 , H05K2201/035 , H05K2203/072 , H05K2203/1453 , H05K3/4667
摘要： A ceramic multilayer circuit board is provided by sintering a multilayer wiring substrate containing alumina as a main component, which was prepared by the green sheet process, nickel plating and gold plating in this order on the superficial wiring conductor layer, printing a thick film conductor paste on the gold plating layer, firing the printed substrate and finally printing a thick film resistor paste on at least part of the thick film conductor layer and firing to form a thick film resistor layer.
摘要翻译：提供一种陶瓷多层电路板，其通过在表面布线导体层上依次烧结以氧化铝为主要成分的多层布线基板，其通过生片工艺，镀镍和镀金制备，印刷厚膜导体膏在镀金层上烧制印刷基板，最后在厚膜导体层的至少一部分上印刷厚膜电阻浆料并进行焙烧以形成厚膜电阻层。

2. 发明授权

US4465727A Ceramic wiring boards 失效
标题翻译：陶瓷接线板
公开(公告)号：US4465727A
公开(公告)日：1984-08-14
申请号：US374874
申请日：1982-05-04
申请人： Tsuyoshi Fujita , Noriyuki Taguchi , Gyozo Toda , Takashi Kuroki , Shoosaku Ishihara
发明人： Tsuyoshi Fujita , Noriyuki Taguchi , Gyozo Toda , Takashi Kuroki , Shoosaku Ishihara
IPC分类号： H05K3/46 , B32B9/00 , B32B15/04 , B32B18/00 , H01L23/498 , H01L23/538 , H05K1/03 , H05K1/09 , H05K3/00 , B32B3/24 , H05K1/04
CPC分类号： H05K1/092 , H01L23/49883 , H01L23/49894 , H01L23/5384 , H05K1/0306 , H01L2924/0002 , H05K3/4611 , H05K3/4629 , Y10S428/901 , Y10T29/49163 , Y10T428/24331
摘要： A ceramic wiring board which comprises ceramic part in which through-holes are made, sintered wiring pattern part provided on the surface of said ceramic part and sintered conductor part filled in said through-holes shows much decrease in cracks at the through-hole part caused by sintering and remarkable reduction in moisture absorbency when the ceramic part comprises ceramic containing a sintering assistant and the sintered conductor part comprises a metal containing the same sintering assistant as that present in said ceramic part.
摘要翻译：一种陶瓷布线板，其包括形成有通孔的陶瓷部件，设置在所述陶瓷部件的表面上的烧结布线图形部分和填充在所述通孔中的烧结导体部分，导致通孔部分的裂纹大大减少，导致当陶瓷部件包含含有烧结助剂的陶瓷时，通过烧结和显着降低吸湿性，并且烧结导体部分包含含有与所述陶瓷部件中存在的相同的烧结助剂的金属。

3. 发明授权

US07239261B2 Electromagnetic wave absorption material and an associated device 有权
标题翻译：电磁波吸收材料及相关装置
公开(公告)号：US07239261B2
公开(公告)日：2007-07-03
申请号：US10913494
申请日：2004-08-09
申请人： Tadashi Fujieda , Kishio Hidaka , Shinzou Ikeda , Mitsuo Hayashibara , Noriyuki Taguchi
发明人： Tadashi Fujieda , Kishio Hidaka , Shinzou Ikeda , Mitsuo Hayashibara , Noriyuki Taguchi
IPC分类号： H01Q17/00 , H05K9/00
CPC分类号： H05K9/0083 , B82Y10/00 , B82Y30/00 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/01012 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/1423 , H01L2924/16152 , H01L2924/3011 , H01L2924/3025 , H01Q17/004 , H05K3/284 , H05K9/0024 , Y10S977/932 , H01L2924/00014 , H01L2924/00
摘要： The purpose of the present invention is to provide an easy-to-manufacture electromagnetic wave absorption material usable from submillimeter wave region to millimeter wave region with an excellent radio wave absorbing performance and a variety of usage thereof.The present invention is characterized by an electromagnetic wave absorption material comprised of a dispersions of at least one of the materials: a multi-layer hollow globule of carbon, a schungite carbon, and the schungite ore; mixed into a matter having a high electrical resistivity. The invention is further characterized by an electronic device, an optical transmission module, an optical reception module, a high frequency telecommunication equipment, and a stop-free automated tollgate system, wherein at least a part of their board, electronic element, and circuit wiring are covered with said electromagnetic wave absorption material.
摘要翻译：本发明的目的是提供一种易于制造的电磁波吸收材料，其可从亚毫米波区域到毫米波区域使用，具有优异的无线电波吸收性能和各种用途。本发明的特征在于电磁波吸收材料由至少一种材料的分散体构成：碳酸多层中空球，schiteite碳和schiteite矿石; 混合成具有高电阻率的物质。本发明的特征还在于电子设备，光传输模块，光接收模块，高频电信设备和无停止自动收费系统，其中至少一部分电路板，电子元件和电路布线被所述电磁波吸收材料覆盖。

4. 发明授权

US5166824A Rear projection screen and manufacturing method therefor as well as molding die for shaping rear projection screen, overhead projector and projection television set 失效
标题翻译：背投屏幕及其制造方法以及用于成形背投屏幕，高架投影仪和投影电视机的成型模具
公开(公告)号：US5166824A
公开(公告)日：1992-11-24
申请号：US782588
申请日：1991-10-25
申请人： Takashi Nishiguchi , Masami Masuda , Noriyuki Taguchi
发明人： Takashi Nishiguchi , Masami Masuda , Noriyuki Taguchi
IPC分类号： G03B21/132 , G03B21/62 , H04N5/74
CPC分类号： G03B21/625
摘要： In a rear projection screen, a plurality of convex lenses of the prescribed configuration are made of photoresist and formed and arranged on a surface or surfaces of a substrate in the prescribed pattern. In case that the convex lenses are formed in the shapes of ellipsoid, the longer radial direction of the ellipsoid is made to coincide with the horizontal direction and shapes of the lenses are changed gradually from the center of the screen to the extremity thereof. Bottom surfaces of non-lens boundary grooves between adjacent convex lenses are made rougher than the convex lens surfaces. A screen manufacturing method comprises the steps of applying photoresist onto a surface or surfaces of a substrate, exposing a patttern of boundary grooves onto the photoresist by photolithography, forming the boundary grooves by etching, and heating and melting the photoresist which is formed with the boundary grooves so as to form a plurality of convex lenses having the prescribed configuration. Further, it is possible to form a plurality of convex lenses of the prescribed configuration by rotating the substrate about the center thereof in the horizontal plane following the heating and melting step. In addition, it is possible, in forming the boundary grooves, to change the setting conditions of etching so that the bottom surfaces of the boundary grooves are made rougher than the convex lens surfaces.
摘要翻译：在背投屏幕中，规定构造的多个凸透镜由光致抗蚀剂制成并且以规定图案形成并布置在基板的表面上。在凸透镜形成为椭圆形的情况下，使椭圆体的较长径向与水平方向一致，并且透镜的形状从屏幕的中心到其末端逐渐变化。相邻凸透镜之间的非透镜边界槽的底面比凸透镜表面更粗糙。屏幕制造方法包括以下步骤：将光致抗蚀剂施加到基板的表面或表面上，通过光刻将边界槽的凹槽暴露在光致抗蚀剂上，通过蚀刻形成边界槽，并加热和熔化形成有边界的光致抗蚀剂以形成具有规定构造的多个凸透镜。此外，可以通过在加热和熔融步骤之后在水平面中围绕其中心旋转基板来形成规定构造的多个凸透镜。此外，在形成边界槽时，可以改变蚀刻的设置条件，使得边界槽的底表面比凸透镜表面更粗糙。

5. 发明申请

US20050016456A1 Plasma processing device and plasma processing method 审中-公开
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US20050016456A1
公开(公告)日：2005-01-27
申请号：US10490293
申请日：2003-02-20
申请人： Noriyuki Taguchi , Yasushi Sawada , Kohichi Matsunaga
发明人： Noriyuki Taguchi , Yasushi Sawada , Kohichi Matsunaga
IPC分类号： H05H1/24 , C23C16/00
CPC分类号： H05H1/2406 , H05H2001/2412 , H05H2001/2462 , H05H2245/123
摘要： A plasma treatment apparatus and method are provided, which have the capability of maintaining a stable discharge, achieving a sufficient plasma treatment, and reducing plasma temperature. In this apparatus, electrodes are arranged to define a discharge space therebetween, and a dielectric material is disposed at a discharge-space side of at least one of the electrodes. A voltage is applied between the electrodes, while a plasma generation gas being supplied into the discharge space, to develop the discharge in the discharge space under a pressure substantially equal to atmospheric pressure, and provide the plasma generated by the discharge from the discharge space. A waveform of the voltage applied between the electrodes is an alternating voltage waveform without rest period. At least one of rising and falling times of the alternating voltage waveform is 100 μsec or less. A repetition frequency is in a range of 0.5 to 1000 kHz. An electric-field intensity applied between the electrodes is in a range of 0.5 to 200 kV/cm.
摘要翻译：提供了具有保持稳定放电，实现足够的等离子体处理和降低等离子体温度的能力的等离子体处理装置和方法。在该装置中，电极被布置为在其间限定放电空间，并且电介质材料设置在至少一个电极的放电空间侧。在电极之间施加电压，同时将等离子体产生气体供应到放电空间中，以在基本上等于大气压的压力下在放电空间中产生放电，并且提供通过从放电空间的放电产生的等离子体。施加在电极之间的电压的波形是没有休止期的交流电压波形。交流电压波形的上升和下降时间中至少有一个是100个或更少。重复频率在0.5至1000kHz的范围内。施加在电极之间的电场强度在0.5至200kV / cm的范围内。

6. 发明授权

US06746897B2 Fabrication process of semiconductor package and semiconductor package 失效
公开(公告)号：US06746897B2
公开(公告)日：2004-06-08
申请号：US10008616
申请日：2001-10-23
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

7. 发明授权

US06641792B2 Hollow carbon fiber and production method 失效
公开(公告)号：US06641792B2
公开(公告)日：2003-11-04
申请号：US10270452
申请日：2002-10-15
申请人： Shinji Takeda , Noriyuki Taguchi , Kazumi Kokaji , Osamu Hirai
发明人： Shinji Takeda , Noriyuki Taguchi , Kazumi Kokaji , Osamu Hirai
IPC分类号： D01F912
CPC分类号： B82Y30/00 , D01D5/24 , D01F9/12 , Y10S977/776 , Y10S977/788 , Y10S977/842 , Y10S977/846 , Y10T428/249953 , Y10T428/249971 , Y10T428/2913 , Y10T428/2918 , Y10T428/30
摘要： Production of hollow carbon fibers and hollow carbon particles includes baking and carbonization of polymer particles having a specified volume after deformation. A metal-deposited carbon fiber with metal deposited inside and/or outside the hollow carbon fiber is applicable to electron discharge devices. The thickness and crystallinity of the graphite layer can be freely controlled. Since almost no by-product is generated, separation and refining using a solvent is not required. A hollow carbon particle of desired shape can be produced at a high yield rate. The hollow carbon fiber represented by a carbon nano-tube can be controlled in such a way that a low resistance and uniform shape are provided so that there is an increase in the amount of electrons discharged from the hollow carbon fiber. Use of this hollow carbon fiber as an electron discharge source provides an excellent electron discharge device characterized by stable pixels.

8. 发明申请

US20050035896A1 Electromagnetic wave absorption material and an associated device 有权
标题翻译：电磁波吸收材料及相关装置
公开(公告)号：US20050035896A1
公开(公告)日：2005-02-17
申请号：US10913494
申请日：2004-08-09
申请人： Tadashi Fujieda , Kishio Hidaka , Shinzou Ikeda , Mitsuo Hayashibara , Noriyuki Taguchi
发明人： Tadashi Fujieda , Kishio Hidaka , Shinzou Ikeda , Mitsuo Hayashibara , Noriyuki Taguchi
IPC分类号： H05K1/02 , H05K3/28 , H05K9/00 , H01Q17/00
CPC分类号： H05K9/0083 , B82Y10/00 , B82Y30/00 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/01012 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/1423 , H01L2924/16152 , H01L2924/3011 , H01L2924/3025 , H01Q17/004 , H05K3/284 , H05K9/0024 , Y10S977/932 , H01L2924/00014 , H01L2924/00
摘要： The purpose of the present invention is to provide an easy-to-manufacture electromagnetic wave absorption material usable from submillimeter wave region to millimeter wave region with an excellent radio wave absorbing performance and a variety of usage thereof. The present invention is characterized by an electromagnetic wave absorption material comprised of a dispersions of at least one of the materials: a multi-layer hollow globule of carbon, a schungite carbon, and the schungite ore; mixed into a matter having a high electrical resistivity. The invention is further characterized by an electronic device, an optical transmission module, an optical reception module, a high frequency telecommunication equipment, and a stop-free automated tollgate system, wherein at least a part of their board, electronic element, and circuit wiring are covered with said electromagnetic wave absorption material.
摘要翻译：本发明的目的是提供一种易于制造的电磁波吸收材料，其可从亚毫米波区域到毫米波区域使用，具有优异的无线电波吸收性能和各种用途。本发明的特征在于电磁波吸收材料由至少一种材料的分散体构成：碳酸多层中空球，schiteite碳和schiteite矿石; 混合成具有高电阻率的物质。本发明的特征还在于电子设备，光传输模块，光接收模块，高频电信设备和无停止自动收费系统，其中至少一部分电路板，电子元件和电路布线被所述电磁波吸收材料覆盖。

9. 发明授权

US06365432B1 Fabrication process of semiconductor package and semiconductor package 失效
公开(公告)号：US06365432B1
公开(公告)日：2002-04-02
申请号：US09487682
申请日：2000-01-19
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

10. 发明授权

US5976912A Fabrication process of semiconductor package and semiconductor package 失效
标题翻译：半导体封装和半导体封装的制造工艺
公开(公告)号：US5976912A
公开(公告)日：1999-11-02
申请号：US716362
申请日：1996-09-18
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L21/48 , H01L21/56 , H01L21/58 , H01L21/68 , H01L23/31 , H01L23/498 , H05K3/20 , H01L23/28
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
摘要翻译： PCT No.PCT / JP95 / 00492 Sec。 371日期1996年9月18日 102（e）1996年9月18日PCT PCT 1995年3月17日PCT公布。公开号WO95 / 26047 日期1995年9月28日提供了半导体封装基板，可以满足半导体高集成化的趋势。将镍层电镀在电镀铜箔上以形成布线图案。将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。只有铜箔用碱蚀刻剂溶解掉才能暴露镍。对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。将焊球放置在布线图案的露出部分，然后熔合。布线图案通过焊球与外部印刷电路板连接。

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