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1. 发明申请

US20130049182A1 SEMICONDUCTOR DEVICE PACKAGING HAVING PRE-ENCAPSULATION THROUGH VIA FORMATION USING LEAD FRAMES WITH ATTACHED SIGNAL CONDUITS 有权
标题翻译：通过具有连接信号导线的引线框架形成的具有预封装的半导体器件封装
公开(公告)号：US20130049182A1
公开(公告)日：2013-02-28
申请号：US13222148
申请日：2011-08-31
申请人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
发明人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
IPC分类号： H01L23/495 , H01L21/60 , H01L21/70 , H01L21/50
CPC分类号： H01L21/486 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/97 , H01L2924/01012 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H01L2224/19 , H01L2924/00
摘要： A semiconductor device package having pre-formed and placed through vias and a process for making such a package is provided. One or more signal conduits are coupled to a lead frame that is subsequently embedded in an encapsulated semiconductor device package. The free end of signal conduits is exposed while the other end remains coupled to a lead frame. The signal conduits are then used as through package vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package and the leads.
摘要翻译：提供了一种通过通孔预先形成和放置的半导体器件封装以及用于制造这种封装的工艺。一个或多个信号管道耦合到引线框架，引线框架随后嵌入在封装的半导体器件封装中。信号管道的自由端被暴露，而另一端保持联接到引线框架。然后，信号导管用作通过封装通孔，在封装的底部和顶部与引线之间的互连或接触之间提供信号承载通路。

2. 发明授权

US5135391A Semiconductor processing gas diffuser plate 失效
标题翻译：半导体加工气体扩散板
公开(公告)号：US5135391A
公开(公告)日：1992-08-04
申请号：US513554
申请日：1990-04-24
申请人： Navjot Chhabra
发明人： Navjot Chhabra
IPC分类号： C23C16/44 , C23C16/455 , C30B25/14
CPC分类号： C23C16/45506 , C23C16/455 , C23C16/45591 , C30B25/14
摘要： Disclosed is a baffle apparatus for insertion into a semiconductor wafer processing furnace to diffuse processing gases that are injected into the furnace by an injector nozzle. The baffle apparatus comprises: a diffuser plate assembly having an upper end and a lower end, the diffuser plate assembly having at least one diffuser plate against which injected gases are to be forced; and the lower end of the diffuser plate assembly being sized and shaped to engage with and be supported by an elongated wafer paddle.
摘要翻译：公开了一种用于插入到半导体晶片加工炉中以将通过喷射器喷嘴注入炉中的处理气体扩散的挡板装置。所述挡板装置包括：具有上端和下端的扩散板组件，所述扩散板组件具有至少一个扩散板，待喷射的气体将被迫使其抵靠; 并且扩散板组件的下端的尺寸和形状设计成与细长的晶片桨接合并由细长的晶片桨支撑。

3. 发明申请

US20130049218A1 SEMICONDUCTOR DEVICE PACKAGING HAVING PRE-ENCAPSULATION THROUGH VIA FORMATION 审中-公开
标题翻译：具有通过形成的预封装的半导体器件封装
公开(公告)号：US20130049218A1
公开(公告)日：2013-02-28
申请号：US13222150
申请日：2011-08-31
申请人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
发明人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
IPC分类号： H01L21/77 , H01L21/56 , H01L23/48
CPC分类号： H01L24/19 , H01L21/568 , H01L23/3128 , H01L24/96 , H01L2224/12105 , H01L2924/01012 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H05K1/185 , H05K3/4602 , H05K2203/0733 , H01L2924/00
摘要： A method for forming signal conduits before encapsulation for incorporation as through vias in a semiconductor device package is provided. One or more signal conduits are formed through photolithography and metal deposition on a metal film or substrate. After removing photoresistive material, the semiconductor device package is built by encapsulating the signal conduits along with any semiconductor die and other parts of the package. The ends of the signal conduits are exposed and the signal conduits can then be used as through vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package, and electrical contacts of the semiconductor die. Using this method, signal conduits can be provided in a variety of geometric placings in the semiconductor device package. A semiconductor device package including the signal conduits made from the above method is also provided.
摘要翻译：提供了一种用于在封装之前形成信号导管以在半导体器件封装中通过通孔并入的方法。通过光刻和金属沉积在金属膜或衬底上形成一个或多个信号导管。在除去光致抗蚀材料之后，通过封装信号导管以及任何半导体管芯和封装的其它部分来构建半导体器件封装。信号管道的端部被暴露，然后可以将信号导管用作通孔，在封装的底部和顶部上的互连或触点之间提供信号承载通路，以及半导体管芯的电触头。使用该方法，信号导管可以以半导体器件封装中的各种几何布置提供。还提供了包括由上述方法制成的信号导管的半导体器件封装。

4. 发明授权

US5182232A Metal silicide texturizing technique 失效
标题翻译：金属硅化物纹理化技术
公开(公告)号：US5182232A
公开(公告)日：1993-01-26
申请号：US793031
申请日：1991-11-15
申请人： Navjot Chhabra , Gurtej S. Sandhu
发明人： Navjot Chhabra , Gurtej S. Sandhu
IPC分类号： H01L21/02 , H01L27/108
CPC分类号： H01L28/84 , H01L27/10808 , Y10S148/138 , Y10S438/964
摘要： In the present invention, a stable and uniform texturized surface of a conductive structure is developed by annealing, oxidizing and etching a layer of metal silicide that has been deposited over a semiconductive material. Using this process during fabrication of memory cell in a DRAM will increase storage node capacitance by creating texturized capacitor cell plates that will retain their textured surfaces throughout implementation of conventional DRAM fabrication processes.
摘要翻译：在本发明中，通过退火，氧化和蚀刻已经沉积在半导体材料上的金属硅化物层来形成导电结构的稳定且均匀的纹理化表面。在DRAM制造存储器单元期间使用这个过程将通过创建纹理化的电容器单元板来增加存储节点电容，该电容器单元板将在传统DRAM制造工艺的实现过程中保持其纹理表面。

5. 发明授权

US5022853A Semiconductor processing furnace tube and alignment jig 失效
标题翻译：半导体加工炉管和对准夹具
公开(公告)号：US5022853A
公开(公告)日：1991-06-11
申请号：US513555
申请日：1990-04-24
申请人： Eric Powell , Navjot Chhabra
发明人： Eric Powell , Navjot Chhabra
IPC分类号： C30B31/16
CPC分类号： C30B31/16
摘要： Disclosed is a quartz tube for a furnace for processing semiconductor wafers. The furnace comprises:an elongated hollow body having opposed first and second ends and a longitudinal axis;an injector opening being formed in the first end, the injector opening including sidewalls which are spaced to slidably receive an elongated gas injector assembly through the opening; andan alignment jig received within the hollow body inwardly adjacent the first end and injector opening, the alignment jig including support means for engaging and aligning a gas injector with the injector opening to support a gas injector to emit gas substantially along the longitudinal tube body axis.
摘要翻译：公开了一种用于处理半导体晶片的炉的石英管。该炉包括：细长的中空体，其具有相对的第一和第二端以及纵向轴线; 喷射器开口形成在所述第一端中，所述喷射器开口包括侧壁，所述侧壁间隔开以通过所述开口可滑动地容纳细长气体喷射器组件; 以及对准夹具，其在中空体内容纳在第一端和喷射器开口内部，该对准夹具包括用于使气体注射器与喷射器开口接合和对准的支撑装置，以支撑气体喷射器，以基本沿着纵管体轴线。

6. 发明申请

US20130127030A1 SEMICONDUCTOR DEVICE PACKAGING HAVING SUBSTRATE WITH PRE-ENCAPSULATION THROUGH VIA FORMATION 有权
标题翻译：具有通过形成的具有预封装的衬底的半导体器件封装
公开(公告)号：US20130127030A1
公开(公告)日：2013-05-23
申请号：US13299564
申请日：2011-11-18
申请人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
发明人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
IPC分类号： H01L23/495 , H01L21/56
CPC分类号： H01L21/4853 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L24/73 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2924/15192 , H01L2924/15311 , H01L2924/00012 , H01L2924/00
摘要： A method for forming through vias in a semiconductor device package prior to package encapsulation is provided. One or more signal conduits are formed through photolithography and metal deposition on a printed circuit substrate having interconnect pads. After removing photoresistive material, the semiconductor device package is built by encapsulating the signal conduits along with any semiconductor die, wire bonding, and other parts of the package. Free ends of each signal conduit are exposed and the signal conduits are used as through vias to provide signal-bearing pathways between connections from a top-mounted package to a printed circuit substrate interconnect and electrical contacts of the semiconductor die or package contacts. Using this method, signal conduits can be provided in a variety of geometric placings on the printed circuit substrate for inclusion in a semiconductor device package. A semiconductor device package incorporating the pre-fabricated through vias is also provided.
摘要翻译：提供了一种在封装封装之前在半导体器件封装中形成通孔的方法。通过在具有互连焊盘的印刷电路基板上的光刻和金属沉积形成一个或多个信号导管。在去除光致抗蚀材料之后，通过封装信号导管以及任何半导体管芯，引线接合以及封装的其它部分来构建半导体器件封装。每个信号管道的自由端被暴露，并且信号管道用作通孔，以在从顶部安装的封装到印刷电路衬底互连件的连接和半导体管芯或封装触头的电触点之间提供信号承载路径。使用该方法，信号导管可以以印刷电路基板上的各种几何布置提供，以包含在半导体器件封装中。还提供了结合预制通孔的半导体器件封装。

7. 发明申请

US20130049217A1 SEMICONDUCTOR DEVICE PACKAGING HAVING PRE-ENCAPSULATION THROUGH VIA FORMATION USING DROP-IN SIGNAL CONDUITS 有权
标题翻译：半导体器件封装通过使用DROP-IN信号导线形成的预封装
公开(公告)号：US20130049217A1
公开(公告)日：2013-02-28
申请号：US13222143
申请日：2011-08-31
申请人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes , Douglas G. Mitchell , Jason R. Wright
发明人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes , Douglas G. Mitchell , Jason R. Wright
IPC分类号： H01L21/768 , H01L23/538
CPC分类号： H01L23/49827 , H01L21/568 , H01L23/49822 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/00
摘要： A semiconductor device package having pre-formed and placed through vias and a process for making such a package is provided. One or more signal conduits are placed in a holder that is subsequently embedded in an encapsulated semiconductor device package. The ends of the signal conduits are exposed and the signal conduits are then used as through package vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package. Holders can be provided in a variety of geometries and materials, depending upon the nature of the application. Further, multiple holders with signal conduits can be provided in a single package to provide for more complex interconnect configuration demands in, for example, system-in-a-package applications.
摘要翻译：提供了一种通过通孔预先形成和放置的半导体器件封装以及用于制造这种封装的工艺。将一个或多个信号导管放置在随后嵌入封装的半导体器件封装中的保持器中。信号管道的端部暴露，然后将信号导管用作通过封装通孔，在封装的底部和顶部上的互连或触点之间提供信号承载通路。取决于应用的性质，可以提供各种几何形状和材料的支架。此外，具有信号导管的多个保持器可以提供在单个封装中，以在例如系统级封装应用中提供更复杂的互连配置要求。

8. 发明授权

US08916421B2 Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits 有权
标题翻译：半导体器件封装具有通过形成的预封装，使用具有附接信号管道的引线框架
公开(公告)号：US08916421B2
公开(公告)日：2014-12-23
申请号：US13222148
申请日：2011-08-31
申请人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
发明人： Zhiwei Gong , Navjot Chhabra , Glenn G. Daves , Scott M. Hayes
IPC分类号： H01L21/70 , H01L21/48 , H01L23/538 , H01L23/00 , H01L21/56
CPC分类号： H01L21/486 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/97 , H01L2924/01012 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H01L2224/19 , H01L2924/00
摘要： A semiconductor device package having pre-formed and placed through vias and a process for making such a package is provided. One or more signal conduits are coupled to a lead frame that is subsequently embedded in an encapsulated semiconductor device package. The free end of signal conduits is exposed while the other end remains coupled to a lead frame. The signal conduits are then used as through package vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package and the leads.
摘要翻译：提供了一种通过通孔预先形成和放置的半导体器件封装以及用于制造这种封装的工艺。一个或多个信号管道耦合到引线框架，引线框架随后嵌入在封装的半导体器件封装中。信号管道的自由端被暴露，而另一端保持联接到引线框架。然后，信号导管用作通过封装通孔，在封装的底部和顶部与引线之间的互连或接触之间提供信号承载通路。

9. 发明授权

US5304506A On chip decoupling capacitor 失效
标题翻译：片上去耦电容
公开(公告)号：US5304506A
公开(公告)日：1994-04-19
申请号：US29088
申请日：1993-03-10
申请人： Stephen R. Porter , Navjot Chhabra
发明人： Stephen R. Porter , Navjot Chhabra
IPC分类号： H01L21/02 , H01L21/70
CPC分类号： H01L28/40
摘要： The present invention discloses an on chip decoupling capacitor structure having a first decoupling capacitor with one electrode formed in the conductively doped silicon substrate and a second electrode made of conductively doped polysilicon. The second electrode is a common electrode to a second decoupling capacitor overlying and thereby coupled in parallel to said first decoupling capacitor. The second capacitor's first electrode is the common electrode and its second electrode is made of conductively doped polysilicon. The electrodes made of the conductively doped polysilicon may be further enhanced by forming a silicided material, such as tungsten silicide, thereon. The decoupling capacitors' dielectric can be formed from high dielectric constant materials, such as TEOS, oxide, nitride or any combination thereof. The second decoupling capacitor could be fabricated over field oxide and used as a single capacitor having a first and second conductively doped polysilicon electrodes (either silicided or non-silicided) with a capacitor dielectric sandwiched in between.
摘要翻译：本发明公开了一种片上去耦电容器结构，其具有在导电掺杂硅衬底中形成的一个电极的第一去耦电容器和由导电掺杂多晶硅制成的第二电极。第二电极是与第一去耦电容器并联并由此并联到第一去耦电容器的第二去耦电容器的公共电极。第二电容器的第一电极是公共电极，其第二电极由导电掺杂的多晶硅制成。由导电掺杂多晶硅制成的电极可以通过在其上形成诸如硅化钨的硅化物材料进一步增强。去耦电容器的电介质可以由高介电常数材料形成，例如TEOS，氧化物，氮化物或其任何组合。第二去耦电容器可以在场氧化物上制造，并且用作具有第一和第二导电掺杂多晶硅电极（硅化或非硅化）的单个电容器，其间夹有电容器电介质。

10. 发明授权

US5213497A Semiconductor processing gas diffuser plate 失效
标题翻译：半导体加工气体扩散板
公开(公告)号：US5213497A
公开(公告)日：1993-05-25
申请号：US852327
申请日：1992-03-17
申请人： Navjot Chhabra
发明人： Navjot Chhabra
IPC分类号： C23C16/44 , C23C16/455 , C30B25/14
CPC分类号： C23C16/45506 , C23C16/455 , C23C16/45591 , C30B25/14
摘要： Disclosed is a baffle apparatus for insertion into a semiconductor wafer processing furnace to diffuse processing gases that are injected into the furnace by an injector nozzle. The baffle apparatus comprises:a diffuser plate assembly having an upper end and a lower end, the diffuser plate assembly having at least one diffuser plate against which injected gases are to be forced; andthe lower end of the diffuser plate assembly being sized and shaped to engage with and be supported by an elongated wafer paddle.
摘要翻译：公开了一种用于插入到半导体晶片加工炉中以将通过喷射器喷嘴注入炉中的处理气体扩散的挡板装置。所述挡板装置包括：具有上端和下端的扩散板组件，所述扩散板组件具有至少一个扩散板，待喷射的气体将被迫使其抵靠; 并且扩散板组件的下端的尺寸和形状设计成与细长的晶片桨接合并由细长的晶片桨支撑。

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