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1. 发明授权

US6072164A Heat-treating method and radiant heating device 失效
标题翻译：热处理方法和辐射加热装置
公开(公告)号：US6072164A
公开(公告)日：2000-06-06
申请号：US142646
申请日：1998-09-11
申请人： Naoto Tate , Tomoyuki Sakai , Naohisa Toda , Hitoshi Habuka
发明人： Naoto Tate , Tomoyuki Sakai , Naohisa Toda , Hitoshi Habuka
IPC分类号： G01K13/00 , C30B29/06 , C30B31/18 , G01J5/00 , G01J5/02 , H01L21/00 , H01L21/205 , H01L21/22 , H01L21/26 , H01L21/265 , H01L21/324 , H01L21/66 , H05B1/02
CPC分类号： H01L21/67248 , C30B31/18 , H01L21/324 , H01L21/67115 , H01L22/26
摘要： There is provided a heat-treating method and a radiant heating device by which an object to be heat-treated can be heat-treated at an actually desired temperature regardless of the dopant concentration or resistivity of the object at the time of heat-treating the object with a radiant heating device using a radiation thermometer as a temperature detector. In the method, the object is heat-treated at an actually desired temperature by correcting the temperature of the object in accordance with the dopant concentration or resistivity of the object. In the apparatus, the dopant concentration or resistivity of the object is inputted in advance to a temperature controller and the controller calculates an actual temperature of the object by correcting and computing the temperature of the object detected with the radiation thermometer in accordance with the dopant concentration or resistivity of the object and controls the temperature of the object based on the calculated temperature value.
摘要翻译： PCT No.PCT / JP97 / 00734 Sec。 371日期：1998年9月11日 102（e）1998年9月11日PCT PCT 1997年3月10日PCT公布。第WO97 / 34318号公报日期1997年9月18日提供了一种热处理方法和辐射加热装置，通过该装置，可以在实际期望的温度下对待热处理的物体进行热处理，而不管当时物体的掺杂剂浓度或电阻率如何使用辐射温度计作为温度检测器的辐射加热装置对物体进行热处理。在该方法中，通过根据物体的掺杂剂浓度或电阻率校正物体的温度，在实际所需温度下对物体进行热处理。在该装置中，物体的掺杂剂浓度或电阻率预先输入到温度控制器，并且控制器通过根据掺杂剂浓度校正和计算用辐射温度计检测的物体的温度来计算物体的实际温度或电阻率，并根据计算出的温度值控制物体的温度。

2. 发明申请

US20070269338A1 Silicon Epitaxial Wafer and Manufacturing Method Thereof 审中-公开
标题翻译：硅外延晶圆及其制造方法
公开(公告)号：US20070269338A1
公开(公告)日：2007-11-22
申请号：US11632720
申请日：2005-06-27
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： C30B15/00 , C22C29/00 , C30B15/14
CPC分类号： H01L21/3225 , C30B25/20 , C30B29/06 , C30B33/02 , H01L21/02381 , H01L21/02532
摘要： A silicon epitaxial wafer 100 is formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by means of a CZ method, and doped with boron so that a resistivity thereof is less than 0.018 Ω·cm. The silicon single crystal substrate 1 has a density of bulk stacking faults 13 in the silicon single crystal substrate 1 in the range of 1×108 cm−3 or higher and 3×109 cm−3 or lower. Thereby, provided is a silicon epitaxial wafer having a boron doped p+ CZ substrate with a resistivity of 0.018Ω·cm or lower, and a state of formation of oxygen precipitates can be adjusted adequately so as to secure a sufficient IG effect and to suppress a problem of bow and deformation of a substrate, despite that sizes of oxygen precipitates is so small to be observed accurately.
摘要翻译：通过在Si单晶衬底1上生长硅外延层2，通过CZ法生长并掺杂硼，使其电阻率小于0.018Ω·cm，形成硅外延晶片100。硅单晶衬底1在硅单晶衬底1中的体积堆垛层错密度为1×10 -3 -3以上且3×10 6 > 9 -3 或更低。因此，提供具有电阻率为0.018Omega.cm以下的具有硼掺杂的P + CZ基板的硅外延晶片，并且可以适当地调节氧沉淀物的形成状态，以便确保足够的IG效应并且抑制基板的弯曲和变形的问题，尽管氧沉淀物的尺寸如此小以被准确地观察。

3. 发明申请

US20080038526A1 Silicon Epitaxial Wafer And Manufacturing Method Thereof 审中-公开
标题翻译：硅外延晶圆及其制造方法
公开(公告)号：US20080038526A1
公开(公告)日：2008-02-14
申请号：US11632719
申请日：2005-07-05
申请人： Fumitaka Kume , Tomosuke Yushida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yushida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： B32B7/02 , C30B15/00
CPC分类号： H01L21/3225 , C30B25/20 , C30B29/06 , C30B33/02 , Y10T428/24992
摘要： A silicon epitaxial wafer 100 formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by a CZ method, and doped with boron so that a resistivity thereof is in the range of 0.009 Ω·cm or higher and 0.012 Ω·cm or lower. The silicon single crystal substrate 1 has a density of the oxygen precipitation nuclei of 1×1010 cm−3 or higher. A width of a no-oxygen-precipitation-nucleus-forming-region 15, formed between the silicon epitaxial layer 2 and the silicon single substrate 1, is in the range of more than 0 μm and less than 10 μm. Thereby, provided is a silicon epitaxial wafer using a boron doped p+ CZ substrate, wherein a formed width of no-oxygen-precipitation-nucleus-forming-region is reduced sufficiently, and oxygen precipitates can be formed having a density sufficient enough to exert an IG effect.
摘要翻译：通过在硅单晶衬底1上生长硅外延层2而形成的硅外延晶片100，其通过CZ方法制造并掺杂硼，使其电阻率在0.009Ω.cm以上且0.012Ω .cm或更低。硅单晶衬底1的氧沉淀核的密度为1×10 10 -3 -3以上。在硅外延层2和硅单基板1之间形成的无氧析出核形成区域15的宽度在大于0μm且小于10μm的范围内。由此，提供了使用硼掺杂的P + CZ衬底的硅外延晶片，其中形成的无氧沉淀 - 核形成区域的宽度被充分降低，并且可以形成氧沉淀具有足以施加IG效应的密度。

4. 发明授权

US07713851B2 Method of manufacturing silicon epitaxial wafer 有权
标题翻译：制造硅外延片的方法
公开(公告)号：US07713851B2
公开(公告)日：2010-05-11
申请号：US11660764
申请日：2005-08-03
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： H01L21/20
CPC分类号： H01L21/02052 , H01L21/3225
摘要： A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译：在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2，并用硼掺杂以将电阻率调节至0.02＆OHgr·cm或更低，氧沉淀核11形成在硅单晶衬底1，通过在氧化气氛中在450℃至750℃进行退火，持续时间允许在硅上形成仅2nm或更小的氧化硅膜作为退火的结果的外延层2，使用清洗液，将低温退火后的第一次清洗作为第一清洗来蚀刻所形成的氧化硅膜3。通过该方法，氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平，而不依赖于氢氟酸清洗。

5. 发明申请

US20090038540A1 Method for Manufacturing Epitaxial Wafer and Epitaxial Wafer Manufactured by this Method 审中-公开
标题翻译：通过该方法制造外延晶片和外延晶片的方法
公开(公告)号：US20090038540A1
公开(公告)日：2009-02-12
申请号：US11991736
申请日：2006-08-21
申请人： Tomosuke Yoshida , Naohisa Toda
发明人： Tomosuke Yoshida , Naohisa Toda
IPC分类号： C30B23/00
CPC分类号： C23C16/4401 , C23C16/24 , C30B25/16
摘要： In a vapor phase growth apparatus, epitaxial growth is performed with respect to a wafer having a CVD film formed on a back surface thereof as a wafer for monitoring that is used to guarantee a resistance and/or measure a thickness of an epitaxial layer, then epitaxial growth is performed with respect to a wafer as a dummy or a vapor phase growth apparatus is activated under conditions for performing epitaxial growth without using a wafer, and subsequently epitaxial growth is carried out with respect to a wafer as a product, thereby manufacturing an epitaxial wafer. As a result, when using a wafer having no CVD film to manufacture an epitaxial wafer that is used to fabricate an imaging device, e.g., a CCD or a CMOS image sensor, a method capable of effectively avoiding heavy-metal contamination and manufacturing a high-quality epitaxial layer is provided.
摘要翻译：在气相生长装置中，相对于在其背面形成有CVD膜的晶片作为用于保证电阻和/或测量外延层的厚度的用于监测的晶片，进行外延生长，然后在不使用晶片的情况下进行外延生长的条件下，作为虚拟或气相生长装置的晶片进行外延生长，随后以相对于作为产品的晶片进行外延生长，由此制造外延片结果，当使用没有CVD膜的晶片来制造用于制造诸如CCD或CMOS图像传感器的成像装置的外延晶片时，能够有效地避免重金属污染并制造高的方法提供了质量外延层。

6. 发明申请

US20070243699A1 Method of manufacturing silicon epitaxial wafer 有权
标题翻译：制造硅外延片的方法
公开(公告)号：US20070243699A1
公开(公告)日：2007-10-18
申请号：US11660764
申请日：2005-08-03
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： H01L21/20
CPC分类号： H01L21/02052 , H01L21/3225
摘要： A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译：在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2，并掺杂硼以将电阻率调节至0.02Ω·cm以下，在硅中形成氧沉淀核11 单晶衬底1，通过在氧化气氛中在450℃至750℃下进行退火，持续时间允许在硅外延上形成仅2nm或更小的氧化硅膜层2作为退火的结果，并且使用清洁溶液，在低温退火之后，将由此形成的氧化硅膜3作为第一清洗进行蚀刻。通过该方法，氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平，而不依赖于氢氟酸清洗。

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