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1. 发明申请

US20050110142A1 Diffusion barriers formed by low temperature deposition 审中-公开
标题翻译：通过低温沉积形成的扩散壁垒
公开(公告)号：US20050110142A1
公开(公告)日：2005-05-26
申请号：US10722934
申请日：2003-11-26
申请人： Michael Lane , Christian Lavoie , Sandra Malhotra , Fenton McFeely , John Yurkas
发明人： Michael Lane , Christian Lavoie , Sandra Malhotra , Fenton McFeely , John Yurkas
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/532 , H01L29/40
CPC分类号： H01L21/76843 , H01L21/28556 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： A solid state device includes a first material and a second material. A barrier layer is formed between the first material and the second material to prevent diffusion between the first material and the second material. The barrier layer includes a metal form of at least one of Ru and Re. The barrier layer is preferably formed using a low temperature deposition process, where the substrate is less than 400 degrees C.
摘要翻译：固体装置包括第一材料和第二材料。在第一材料和第二材料之间形成阻挡层以防止第一材料和第二材料之间的扩散。阻挡层包括Ru和Re中的至少一种的金属形式。阻挡层优选使用低温沉积工艺形成，其中衬底小于400℃。

2. 发明申请

US20050199502A1 Method for electroplating on resistive substrates 审中-公开
标题翻译：电阻基板电镀方法
公开(公告)号：US20050199502A1
公开(公告)日：2005-09-15
申请号：US11123117
申请日：2005-05-06
申请人： Panayotis Andricacos , Hariklia Deligianni , Wilma Horkans , Keith Kwietniak , Michael Lane , Sandra Malhotra , Fenton McFeely , Conal Murray , Kenneth Rodbell , Philippe Vereecken
发明人： Panayotis Andricacos , Hariklia Deligianni , Wilma Horkans , Keith Kwietniak , Michael Lane , Sandra Malhotra , Fenton McFeely , Conal Murray , Kenneth Rodbell , Philippe Vereecken
IPC分类号： C25D5/18 , C25D7/12 , C25D5/02
CPC分类号： C25D5/18 , C25D7/12 , Y10S428/926 , Y10T428/12493 , Y10T428/12528 , Y10T428/12771 , Y10T428/12778 , Y10T428/12903
摘要： A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.
摘要翻译：导电材料电镀在可镀敷的电阻金属阻挡层上，该层使用任选地包含超填充添加剂和抑制剂的电镀槽，并且通过改变作为电镀金属面积的函数的电流或电压。还提供了一种结构，其包括衬底，位于衬底上的可镀金属阻挡层和位于可镀电阻金属阻挡层上的导电材料的相对连续的均匀电镀层。

3. 发明申请

US20080066468A1 Splash plate dome assembly for a turbine engine 有权
标题翻译：用于涡轮发动机的飞溅板式圆顶组件
公开(公告)号：US20080066468A1
公开(公告)日：2008-03-20
申请号：US11898679
申请日：2007-09-14
申请人： Les Faulder , Mario Abreu , Ram Srinivasan , Michael Lane
发明人： Les Faulder , Mario Abreu , Ram Srinivasan , Michael Lane
IPC分类号： F02C1/00
CPC分类号： F23R3/002 , F23R3/10 , F23R3/283 , F23R2900/03044
摘要： A splash plate dome assembly for a combustion liner of a turbine engine is disclosed. The splash plate may include an outer periphery having a plurality of corners and an inner periphery defining an aperture and an annular flange. The splash plate may include a plurality of first flow guides extending from the outer periphery to the inner periphery. The splash plate may further include a plurality of second flow guides extending from the outer periphery to a location intermediate the inner periphery and the outer periphery. The splash plate, annular flange, first flow guides, and second flow guides may be integrally formed by casting. The splash plate may be mounted to a combustion dome having a plurality of distributed through holes for forming impingement jets on an upstream face of the splash plate.
摘要翻译：公开了一种用于涡轮发动机的燃烧衬套的飞溅板圆顶组件。溅溅板可以包括具有多个拐角的外周边和限定孔的内周边和环形凸缘。溅溅板可以包括从外周延伸到内周的多个第一流动引导件。溅溅板还可以包括多个第二流动引导件，该第二流动引导件从外周边延伸到内周边和外周边之间的位置。溅溅板，环形凸缘，第一流动引导件和第二流动引导件可以通过铸造一体地形成。飞溅板可以安装到具有多个分布通孔的燃烧穹顶上，用于在飞溅板的上游面上形成冲击射流。

4. 发明申请

US20060264036A1 Line level air gaps 审中-公开
标题翻译：线路气隙
公开(公告)号：US20060264036A1
公开(公告)日：2006-11-23
申请号：US11491816
申请日：2006-07-24
申请人： Shyng-Tsong Chen , Stefanie Chiras , Matthew Colburn , Tomothy Dalton , Jeffrey Hedrick , Elbert Huang , Kaushik Kumar , Michael Lane , Kelly Malone , Chandrasekhar Narayan , Satyanarayana Nitta , Sampath Purushothaman , Robert Rosenberg , Christy Tyberg , Roy Yu
发明人： Shyng-Tsong Chen , Stefanie Chiras , Matthew Colburn , Tomothy Dalton , Jeffrey Hedrick , Elbert Huang , Kaushik Kumar , Michael Lane , Kelly Malone , Chandrasekhar Narayan , Satyanarayana Nitta , Sampath Purushothaman , Robert Rosenberg , Christy Tyberg , Roy Yu
IPC分类号： H01L21/4763
CPC分类号： H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： In a multilevel microelectronic integrated circuit, air comprises permanent line level dielectric and ultra low-K materials are via level dielectric. The air is supplied to line level subsequent to removal of sacrificial material by clean thermal decomposition and assisted diffusion of byproducts through porosities in the IC structure. Optionally, air is also included within porosities in the via level dielectric. By incorporating air to the extent produced in the invention, intralevel and interlevel dielectric values are minimized.
摘要翻译：在多电平微电子集成电路中，空气包括永久线路电介质，超低K材料通过电介质。在通过清洁热分解除去牺牲材料并通过IC结构中的孔隙率辅助副产物扩散后，将空气供应到线路电平。任选地，空气也包括在通孔级电介质中的孔隙中。通过将空气结合到本发明产生的程度，使层内和层间介电值最小化。

5. 发明申请

US20060165891A1 SiCOH dielectric material with improved toughness and improved Si-C bonding, semiconductor device containing the same, and method to make the same 失效
标题翻译： SiCOH介电材料具有改善的韧性和改善的Si-C键合，含有其的半导体器件及其制造方法
公开(公告)号：US20060165891A1
公开(公告)日：2006-07-27
申请号：US11132108
申请日：2005-05-18
申请人： Daniel Edelstein , Stephen Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert Miller , Deborah Neumayer , Son Nguyen
发明人： Daniel Edelstein , Stephen Gates , Alfred Grill , Michael Lane , Qinghuang Lin , Robert Miller , Deborah Neumayer , Son Nguyen
IPC分类号： C23C16/00 , B05D3/00
CPC分类号： H01L31/103 , Y10T428/31663
摘要： A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC═CH, C≡CH2, C≡C or a [S]n linkage, where n is a defined above.
摘要翻译：提供了一种用于包括互连和感测结构的电子结构中具有增强的内聚强度的低k介电材料，其包括Si，C，O和H的原子，其中C原子的一部分键合为Si-CH _{3个官能团，另外一部分C原子键合为Si-R-Si，其中R是苯基， - [CH 2 N] - 其中n大于或等于1，HC-CH，C≡CH2，C≡C或[S] n N连接，其中n是定义的以上。}

6. 发明申请

US20060027934A1 Silicon chip carrier with conductive through-vias and method for fabricating same 审中-公开
标题翻译：具有导电通孔的硅芯片载体及其制造方法
公开(公告)号：US20060027934A1
公开(公告)日：2006-02-09
申请号：US11242221
申请日：2005-10-03
申请人： Daniel Edelstein , Paul Andry , Leena Buchwalter , Jon Casey , Sherif Goma , Raymond Horton , Gareth Hougham , Michael Lane , Xiao Liu , Chirag Patel , Edmund Sprogis , Michelle Steen , Brian Sundlof , Cornelia Tsang , George Walker , Yu-Ting Cheng , Kenneth Ocheltree , Robert Montoye
发明人： Daniel Edelstein , Paul Andry , Leena Buchwalter , Jon Casey , Sherif Goma , Raymond Horton , Gareth Hougham , Michael Lane , Xiao Liu , Chirag Patel , Edmund Sprogis , Michelle Steen , Brian Sundlof , Cornelia Tsang , George Walker , Yu-Ting Cheng , Kenneth Ocheltree , Robert Montoye
IPC分类号： H01L23/48
CPC分类号： H01L23/49883 , H01L21/486 , H01L21/76898 , H01L23/49827 , H01L2224/16 , H01L2924/01004 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要： A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches that of the substrate. The conductive structure may include concentric via fill areas having differing materials disposed concentrically therein, a core of the substrate material surrounded by an annular ring of conductive material, a core of CTE-matched non-conductive material surrounded by an annular ring of conductive material, a conductive via having an inner void with low CTE, or a full fill of a conductive composite material such as a metal-ceramic paste which has been sintered or fused.
摘要翻译：一种载体结构和方法，用于制造具有通孔的载流子结构，每个导通孔具有导电结构，其有效热膨胀系数小于或接近于基板的热膨胀系数，并且具有小于或等于或者与衬底的密切匹配。导电结构可以包括同心的通孔填充区域，其具有同心设置的不同材料，由导电材料的环形环包围的衬底材料的芯，由导电材料的环形环包围的CTE匹配的非导电材料的芯，具有低CTE的内部空隙的导电通孔，或已经烧结或熔合的诸如金属 - 陶瓷浆料的导电复合材料的完整填充物。

7. 发明申请

US20060014376A1 Stacked via-stud with improved reliability in copper metallurgy 审中-公开
标题翻译：堆叠通孔，提高了铜冶金的可靠性
公开(公告)号：US20060014376A1
公开(公告)日：2006-01-19
申请号：US11230841
申请日：2005-09-20
申请人： Birendra Agarwala , Conrad Barile , Hormazdyar Dalal , Brett Engel , Michael Lane , Ernest Levine , Xiao Liu , Vincent McGahay , John McGrath , Conal Murray , Jawahar Nayak , Du Nguyen , Hazara Rathore , Thomas Shaw
发明人： Birendra Agarwala , Conrad Barile , Hormazdyar Dalal , Brett Engel , Michael Lane , Ernest Levine , Xiao Liu , Vincent McGahay , John McGrath , Conal Murray , Jawahar Nayak , Du Nguyen , Hazara Rathore , Thomas Shaw
IPC分类号： H01L21/4763 , H01L21/44 , H01L21/31
CPC分类号： H01L23/53295 , H01L21/76807 , H01L21/76829 , H01L21/76838 , H01L23/5226 , H01L2924/0002 , Y10T428/24917 , H01L2924/00
摘要： A multilevel semiconductor integrated circuit (IC) structure including a first interconnect level including a layer of dielectric material over a semiconductor substrate, the layer of dielectric material comprising a dense material for passivating semiconductor devices and local interconnects underneath; multiple interconnect layers of dielectric material formed above the layer of dense dielectric material, each layer of dielectric material including at least a layer of low-k dielectric material; and, a set of stacked via-studs in the low-k dielectric material layers, each of said set of stacked via studs interconnecting one or more patterned conductive structures, a conductive structure including a cantilever formed in the low-k dielectric material. The dielectric layer of each of the multiple interconnection levels includes a soft low-k dielectric material, wherein the cantilever and set of stacked via-studs are integrated within the soft low-k dielectric material to increase resistance to thermal fatigue crack formation. In one embodiment, each of the set of stacked via-studs in the low-k dielectric material layers is provided with a cantilever, such that the cantilevers are interwoven by connecting a cantilever on one level to a bulk portion of the conductor line on adjacent levels of interconnection, thereby increasing flexibility of stacked via-studs between interconnection levels.
摘要翻译：一种多级半导体集成电路（IC）结构，包括在半导体衬底上包括电介质材料层的第一互连电平，所述介电材料层包括用于钝化半导体器件的致密材料和其下的局部互连; 形成在致密电介质材料层之上的电介质材料的多个互连层，每层介电材料包括至少一层低k电介质材料; 以及在低k电介质材料层中的一组堆叠的通孔螺钉，每组所述一组堆叠通孔柱互连一个或多个图案化导电结构，包括形成在低k电介质材料中的悬臂的导电结构。多个互连级别中的每一个的电介质层包括软的低k电介质材料，其中悬臂和一组堆叠的通孔螺钉集成在软低k电介质材料内，以增加对热疲劳裂纹形成的抵抗力。在一个实施例中，低k电介质材料层中的每组叠置通孔螺柱设置有悬臂，使得悬臂通过将一个级上的悬臂连接到相邻的导体线的主体部分而交织互连级别，从而增加互连级别之间堆叠通孔的灵活性。

8. 发明申请

US20060012014A1 Reliability of low-k dielectric devices with energy dissipative layer 审中-公开
标题翻译：低k介质器件与耗能层的可靠性
公开(公告)号：US20060012014A1
公开(公告)日：2006-01-19
申请号：US10891605
申请日：2004-07-15
申请人： Shyng-Tsong Chen , Stefanie Chiras , Michael Lane , Qinghuang Lin , Robert Rosenberg , Thomas Shaw , Terry Spooner
发明人： Shyng-Tsong Chen , Stefanie Chiras , Michael Lane , Qinghuang Lin , Robert Rosenberg , Thomas Shaw , Terry Spooner
IPC分类号： H01L21/44
CPC分类号： H01L21/76801 , H01L21/76807 , H01L21/76829 , H01L21/76832
摘要： The present invention provides a plastically and/or viscoelastically deformable layer that can be used in conjunction with a low-k dielectric (k of less than 4.0) to provide an electronic semiconductor structure having improved reliability. The deformable layer can be incorporated into various points within an electronic structure to dissipate energy within the structure that may cause the low-k dielectric material to crack or delaminate therefrom. Moreover, the presence of the deformable layer with the electronic structure improves the overall strength of the resultant structure.
摘要翻译：本发明提供了可以与低k电介质（k小于4.0）结合使用的塑性和/或粘弹性变形层，以提供具有改进的可靠性的电子半导体结构。可变形层可以结合到电子结构内的各个点中以消散结构内的能量，这可能导致低k电介质材料从其中破裂或分层。此外，具有电子结构的可变形层的存在提高了所得结构的总体强度。

9. 发明授权

US06974531B2 Method for electroplating on resistive substrates 失效
公开(公告)号：US06974531B2
公开(公告)日：2005-12-13
申请号：US10269956
申请日：2002-10-15
申请人： Panayotis Andricacos , Hariklia Deligianni , Wilma Jean Horkans , Keith T. Kwietniak , Michael Lane , Sandra G. Malhotra , Fenton Read McFeely , Conal Murray , Kenneth P. Rodbell , Philippe M. Vereecken
发明人： Panayotis Andricacos , Hariklia Deligianni , Wilma Jean Horkans , Keith T. Kwietniak , Michael Lane , Sandra G. Malhotra , Fenton Read McFeely , Conal Murray , Kenneth P. Rodbell , Philippe M. Vereecken
IPC分类号： C25D5/18 , C25D7/12 , B32B15/00
CPC分类号： C25D5/18 , C25D7/12 , Y10S428/926 , Y10T428/12493 , Y10T428/12528 , Y10T428/12771 , Y10T428/12778 , Y10T428/12903
摘要： A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.

10. 发明申请

US20050247664A1 Inverting vacuum panels for a plastic container 有权
标题翻译：用于塑料容器的倒置真空面板
公开(公告)号：US20050247664A1
公开(公告)日：2005-11-10
申请号：US11146163
申请日：2005-06-06
申请人： Michael Lane , Richard Steih , Daniel Gamber , Randall Brown , Rohit Joshi
发明人： Michael Lane , Richard Steih , Daniel Gamber , Randall Brown , Rohit Joshi
IPC分类号： B65D1/02 , B65D79/00 , B65D90/02
CPC分类号： B65D1/0223 , B65D1/42 , B65D79/005
摘要： A sidewall portion of a plastic container adapted for vacuum pressure absorption. The sidewall portion including generally rectangular shaped vacuum panels equidistantly spaced about the container. The vacuum panels having, at least in part, a convex shaped surface and a series of equidistantly spaced indents disposed therein. The vacuum panels being moveable to accommodate vacuum forces generated within the container thereby decreasing the volume of the container.
摘要翻译：适于真空压力吸收的塑料容器的侧壁部分。侧壁部分包括围绕容器等距间隔的大致矩形的真空板。至少部分地具有凸形表面和设置在其中的一系列等距间隔的凹口的真空面板。真空板可移动以适应在容器内产生的真空力，从而减小容器的体积。

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