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1. 发明授权

US08927057B2 Graphene formation utilizing solid phase carbon sources 有权
标题翻译：使用固相碳源的石墨烯形成
公开(公告)号：US08927057B2
公开(公告)日：2015-01-06
申请号：US12710333
申请日：2010-02-22
申请人： Ageeth A. Bol , Roy A. Carruthers , Jack O. Chu , Alfred Grill , Christian Lavoie , Katherine L. Saenger , James C. Tsang
发明人： Ageeth A. Bol , Roy A. Carruthers , Jack O. Chu , Alfred Grill , Christian Lavoie , Katherine L. Saenger , James C. Tsang
IPC分类号： B05D7/00 , C01B31/04 , B82Y30/00 , B82Y40/00
CPC分类号： C01B31/0446 , B82Y30/00 , B82Y40/00 , C01B32/184 , Y10T428/30
摘要： A method for forming a single, few-layer, or multi-layer graphene and structure is described incorporating selecting a substrate having a buried layer of carbon underneath a metal layer, providing an ambient and providing a heat treatment to pass carbon through the metal layer to form a graphene layer on the metal layer surface or incorporating a metal-carbon layer which is heated to segregate carbon in the form of graphene to the surface or chemically reacting the metal in the metal-carbon layer with a substrate containing Si driving the carbon to the surface whereby graphene is formed.
摘要翻译：描述了形成单层，几层或多层石墨烯和结构的方法，其包括选择在金属层下方具有埋藏层的衬底的基底，提供环境并提供热处理以使碳通过金属层以在金属层表面上形成石墨烯层或掺入金属碳层，该金属碳层被加热以将石墨烯形式的碳分离到表面或使金属 - 碳层中的金属与含有驱动碳的Si的基板化学反应到形成石墨烯的表面。

2. 发明授权

US08779600B2 Interlevel dielectric stack for interconnect structures 有权
标题翻译：用于互连结构的层间电介质叠层
公开(公告)号：US08779600B2
公开(公告)日：2014-07-15
申请号：US13344009
申请日：2012-01-05
申请人： Son Van Nguyen , Griselda Bonilla , Alfred Grill , Thomas J. Haigh, Jr. , Satyanarayana V. Nitta
发明人： Son Van Nguyen , Griselda Bonilla , Alfred Grill , Thomas J. Haigh, Jr. , Satyanarayana V. Nitta
IPC分类号： H01L29/40
CPC分类号： H01L23/5384 , H01L21/02167 , H01L21/02274 , H01L21/76801 , H01L21/76825 , H01L21/76832 , H01L21/76834 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , Y10T428/249969 , H01L2924/00
摘要： A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
摘要翻译：一种电介质堆叠和使用单步沉积工艺将叠层沉积到衬底的方法。电介质堆叠包括具有不同组成原子百分比，密度和孔隙率的相同元素化合物的致密层和多孔层。该堆叠增强机械模量强度并增强氧化和铜扩散阻挡性能。电介质叠层在整个网络中具有无机或杂化的无机 - 有机随机三维共价键，其含有不同化学组成的不同区域，例如与相同类型材料的低k组分相邻但具有较高孔隙率的盖组分。

3. 发明授权

US08637412B2 Process to form an adhesion layer and multiphase ultra-low k dielectric material using PECVD 有权
标题翻译：使用PECVD形成粘合层和多相超低k电介质材料的工艺
公开(公告)号：US08637412B2
公开(公告)日：2014-01-28
申请号：US13214157
申请日：2011-08-19
申请人： Alfred Grill , Thomas Jasper Haigh, Jr. , Kelly Malone , Son Van Nguyen , Vishnubhai Vitthalbhai Patel , Hosadurga Shobha
发明人： Alfred Grill , Thomas Jasper Haigh, Jr. , Kelly Malone , Son Van Nguyen , Vishnubhai Vitthalbhai Patel , Hosadurga Shobha
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L29/511 , C08J9/26 , C08J2201/042 , C08J2383/04 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02337 , H01L21/02348 , H01L21/02351 , H01L21/76801 , H01L21/76825 , H01L21/76829 , H01L21/76832 , H01L23/5329 , H01L29/515 , H01L2924/0002 , H01L2924/00
摘要： A first PECVD process incorporating a silicon oxide precursor alone and then with an organo-silicon precursor with increasing flow while the flow of the silicon oxide precursor is reduced to zero provides a graded carbon adhesion layer whereby the content of C increases with layer thickness and a second PECVD process incorporating an organo-silicon precursor including an organic porogen provides a multiphase ultra-low k dielectric. The multiphase ultra-low k PECVD process uses high frequency radio frequency power just above plasma initiation in a PECVD chamber. An energy post treatment is also provided. A porous SiCOH dielectric material having a k less than 2.7 and a modulus of elasticity greater than 7 GPa is formed.
摘要翻译：第一PECVD工艺，其单独掺入氧化硅前体，然后与有机硅前驱物同时增加流动，同时氧化硅前体的流动减少至零，从而提供渐变的碳粘附层，由此C的含量随层的厚度而增加，结合包含有机致孔剂的有机硅前体的第二PECVD工艺提供了多相超低k电介质。多相超低k PECVD工艺在PECVD室中使用高于等离子体起始的高频射频功率。还提供了能量后处理。形成k小于2.7且弹性模量大于7GPa的多孔SiCOH电介质材料。

4. 发明申请

US20130207080A1 BILAYER GATE DIELECTRIC WITH LOW EQUIVALENT OXIDE THICKNESS FOR GRAPHENE DEVICES 失效
标题翻译：用于石墨设备的低等效氧化物厚度的双层栅介质
公开(公告)号：US20130207080A1
公开(公告)日：2013-08-15
申请号：US13369901
申请日：2012-02-09
申请人： Christos D. Dimitrakopoulos , Damon B. Farmer , Alfred Grill , Yu-Ming Lin , Deborah A. Neumayer , Dirk Pfeiffer , Wenjuan Zhu
发明人： Christos D. Dimitrakopoulos , Damon B. Farmer , Alfred Grill , Yu-Ming Lin , Deborah A. Neumayer , Dirk Pfeiffer , Wenjuan Zhu
IPC分类号： H01L29/775 , H01L21/336
CPC分类号： H01L21/0237 , B82Y30/00 , B82Y40/00 , H01L21/02378 , H01L21/02527 , H01L21/02617 , H01L21/02661 , H01L29/1606 , H01L29/4908 , H01L29/513 , H01L29/66045 , H01L29/7781 , H01L29/78684
摘要： A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.
摘要翻译：在石墨烯层的最上表面上设置氮化硅层，然后在氮化硅层的最上表面上设置二氧化铪层。氮化硅层用作二氧化铪层的润湿剂，从而防止在石墨烯层顶上形成不连续的二氧化铪塔。共同形成低EOT双层栅极电介质的氮化硅层和二氧化铪层在石墨烯层的顶部呈现连续的形态。

5. 发明申请

US20130196483A1 SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC 审中-公开
标题翻译： SOI结构包括一个BURIED BORON NITRIDE DIELECTRIC
公开(公告)号：US20130196483A1
公开(公告)日：2013-08-01
申请号：US13604004
申请日：2012-09-05
申请人： Robert H. Dennard , Alfred Grill , Effendi Leobandung , Deborah A. Neumayer , Dea-Gyu Park , Ghavam G. Shahidi , Leathen Shi
发明人： Robert H. Dennard , Alfred Grill , Effendi Leobandung , Deborah A. Neumayer , Dea-Gyu Park , Ghavam G. Shahidi , Leathen Shi
IPC分类号： H01L21/30
CPC分类号： H01L29/78603 , H01L21/02112 , H01L21/02274 , H01L21/0228 , H01L21/76254
摘要： Boron nitride is used as a buried dielectric of an SOI structure including an SOI layer and a handle substrate. The boron nitride is located between an SOI layer and a handle substrate. Boron nitride has a dielectric constant and a thermal expansion coefficient close to silicon dioxide. Yet, boron nitride has a wet as well as a dry etch resistance that is much better than silicon dioxide. In the SOI structure, there is a reduced material loss of boron nitride during multiple wet and dry etches so that the topography and/or bridging are not an obstacle for device integration. Boron nitride has a low dielectric constant so that devices built in SOI active regions do not suffer from a charging effect.
摘要翻译：氮化硼被用作包括SOI层和手柄衬底的SOI结构的掩埋电介质。氮化硼位于SOI层和手柄基板之间。氮化硼具有接近二氧化硅的介电常数和热膨胀系数。然而，氮化硼具有比二氧化硅好得多的湿润以及耐干蚀刻性。在SOI结构中，在多次湿和干蚀刻期间氮化硼的材料损失减少，使得形貌和/或桥接不是器件集成的障碍。氮化硼具有低介电常数，使得内置在SOI有源区中的器件不会带来充电效应。

6. 发明申请

US20120308735A1 ULTRA LOW DIELECTRIC CONSTANT MATERIAL WITH ENHANCED MECHANICAL PROPERTIES 审中-公开
标题翻译：超低介电常数材料，具有增强的机械性能
公开(公告)号：US20120308735A1
公开(公告)日：2012-12-06
申请号：US13570742
申请日：2012-08-09
申请人： Christos D. DIMITRAKOPOULOS , Stephen M. GATES , Alfred GRILL
发明人： Christos D. DIMITRAKOPOULOS , Stephen M. GATES , Alfred GRILL
IPC分类号： C23C16/56
CPC分类号： H01L23/5329 , H01L21/02126 , H01L21/02203 , H01L21/02208 , H01L21/02211 , H01L21/02216 , H01L21/02274 , H01L21/02348 , H01L21/3105 , H01L21/7682 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating an ultra low dielectric constant material is disclosed. The method includes placing a substrate into a deposition reactor. A first precursor is flowed into the deposition reactor. The first precursor is a matrix precursor. A second precursor is flowed into the deposition reactor. The second precursor is a porogen precursor. A preliminary film is deposited onto the substrate based on the first and second precursors. The preliminary film includes Si, C, O, and H atoms. A first ultraviolet curing step is performed on the substrate including the preliminary film at a first temperature. At least a second ultraviolet curing step is performed on the substrate including the preliminary film at a second temperature.
摘要翻译：公开了一种制造超低介电常数材料的方法。该方法包括将基底放置到沉积反应器中。第一前体流入沉积反应器。第一种前体是基质前体。第二个前体流入沉积反应器。第二种前体是致孔剂前体。基于第一和第二前体将初步膜沉积到基底上。初步膜包括Si，C，O和H原子。在包含第一温度的初步膜的基板上进行第一紫外线固化步骤。在包含初步膜的基板上在第二温度下进行至少第二紫外线固化步骤。

7. 发明申请

US20120302005A1 SELF ALIGNED CARBIDE SOURCE/DRAIN FET 有权
标题翻译：自对准碳源/漏极FET
公开(公告)号：US20120302005A1
公开(公告)日：2012-11-29
申请号：US13566050
申请日：2012-08-03
申请人： Cyril Cabral, JR. , Josephine B. Chang , Alfred Grill , Michael A. Guillorn , Christian Lavoie , Eugene J. O'Sullivan
发明人： Cyril Cabral, JR. , Josephine B. Chang , Alfred Grill , Michael A. Guillorn , Christian Lavoie , Eugene J. O'Sullivan
IPC分类号： H01L21/336 , B82Y40/00
CPC分类号： H01L29/775 , B82Y10/00 , H01L29/16 , H01L29/1602 , H01L51/0048 , H01L51/0541 , H01L51/105
摘要： A field effect transistor includes a metal carbide source portion, a metal carbide drain portion, an insulating carbon portion separating the metal carbide source portion from the metal carbide portion, a nanostructure formed over the insulating and carbon portion and connecting the metal carbide source portion to the metal carbide drain portion, and a gate stack formed on over at least a portion of the insulating carbon portion and at least a portion of the nanostructure.
摘要翻译：场效应晶体管包括金属碳化物源部分，金属碳化物漏极部分，将金属碳化物源部分与金属碳化物部分分离的绝缘碳部分，形成在绝缘和碳部分上的纳米结构，并将金属碳化物源部分连接到金属碳化物排出部分和形成在绝缘碳部分的至少一部分和至少一部分纳米结构上的栅堆叠。

8. 发明申请

US20120205626A1 SEMICONDUCTOR CHIP WITH GRAPHENE BASED DEVICES IN AN INTERCONNECT STRUCTURE OF THE CHIP 有权
标题翻译：半导体芯片与基于图形的设备在芯片的互连结构中
公开(公告)号：US20120205626A1
公开(公告)日：2012-08-16
申请号：US13027797
申请日：2011-02-15
申请人： Christos D. Dimitrakopoulos , Guy M. Cohen , Stephen M. Gates , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung
发明人： Christos D. Dimitrakopoulos , Guy M. Cohen , Stephen M. Gates , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung
IPC分类号： H01L29/78 , H01L21/20
CPC分类号： H01L21/02527 , H01L29/1606 , H01L29/41766 , H01L29/42356 , H01L29/66431 , H01L29/778 , H01L2924/00013 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599
摘要： A semiconductor structure includes a first dielectric material including at least one first conductive region contained therein. The structure also includes at least one graphene containing semiconductor device located atop the first dielectric material. The at least one graphene containing semiconductor device includes a graphene layer that overlies and is in direct with the first conductive region. The structure further includes a second dielectric material covering the at least one graphene containing semiconductor device and portions of the first dielectric material. The second dielectric material includes at least one second conductive region contained therein, and the at least one second conductive region is in contact with a conductive element of the at least one graphene containing semiconductor device.
摘要翻译：半导体结构包括包含其中包含的至少一个第一导电区域的第一电介质材料。该结构还包括位于第一介电材料顶部的至少一个含石墨烯的半导体器件。所述至少一个含石墨烯的半导体器件包括覆盖并与第一导电区直接相连的石墨烯层。所述结构还包括覆盖所述至少一个含石墨烯的半导体器件和所述第一电介质材料的部分的第二电介质材料。第二电介质材料包括其中包含的至少一个第二导电区域，并且至少一个第二导电区域与至少一个含石墨烯的半导体器件的导电元件接触。

9. 发明授权

US08097932B2 Ultra low κ plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality 有权
标题翻译：超低＆kgr 使用含有SiCOH基质官能团和有机致孔剂功能的单一双功能前体的等离子体增强化学气相沉积方法
公开(公告)号：US08097932B2
公开(公告)日：2012-01-17
申请号：US12371180
申请日：2009-02-13
申请人： Son Van Nguyen , Stephen McConnell Gates , Deborah A. Neumayer , Alfred Grill
发明人： Son Van Nguyen , Stephen McConnell Gates , Deborah A. Neumayer , Alfred Grill
IPC分类号： H01L23/58
CPC分类号： C23C16/401 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02337 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/3122 , H01L21/31633 , H01L21/31695 , Y10T428/249921
摘要： A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.
摘要翻译：提供了由具有内置有机致孔剂的单一有机硅前体制备包含Si，C，O和H原子的SiCOH电介质材料的方法。具有内置有机致孔剂的单一有机硅前体选自具有分子式SiRR1R2R3的硅烷（SiH4）衍生物，具有分子式为R4R5R6-Si-O-Si-R7R8R9的二硅氧烷衍生物和分子式为R10R11R12- Si-O-Si-R13R14-O-Si-R15R16R17其中R和R1-17可以相同也可以不相同，并且可以选自H，烷基，烷氧基，环氧基，苯基，乙烯基，烯丙基，烯基或炔基，直链，支链，环状，多环，并且可以被含氧，含氮或氟的取代基官能化。除了该方法之外，本申请还提供了由本发明方法制备的SiCOH电介质以及含有该SiCOH的电子结构。

10. 发明申请

US20110162874A1 SELF-ALIGNED COMPOSITE M-MOx/DIELECTRIC CAP FOR Cu INTERCONNECT STRUCTURES 有权
标题翻译：用于Cu互连结构的自对准复合材料M-MOx /电介质盖
公开(公告)号：US20110162874A1
公开(公告)日：2011-07-07
申请号：US12683590
申请日：2010-01-07
申请人： Son Van Nguyen , Alfred Grill , Thomas J. Haigh, JR. , Hosadurga Shobha , Tuan A. Vo
发明人： Son Van Nguyen , Alfred Grill , Thomas J. Haigh, JR. , Hosadurga Shobha , Tuan A. Vo
IPC分类号： H05K1/09 , B05D5/12 , B05D3/06 , B05D3/04
CPC分类号： H01L21/76849 , H01L21/76846 , H01L21/76864 , H01L21/76867
摘要： An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes an interconnect dielectric material having a dielectric constant of about 4.0 or less. The interconnect dielectric material has at least one opening therein that is filled with a Cu-containing material. The Cu-containing material within the at least one opening has an exposed upper surface that is co-planar with an upper surface of the interconnect dielectric material. The interconnect structure further includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal. The interconnect structure further includes a dielectric cap located on at least an upper surface of the composite M-MOx cap.
摘要翻译：提供了具有改进的电迁移阻力的互连结构以及形成这种互连结构的方法。互连结构包括具有约4.0或更小的介电常数的互连电介质材料。互连电介质材料在其中具有填充有含Cu材料的至少一个开口。至少一个开口内的含Cu材料具有与互连电介质材料的上表面共面的暴露的上表面。互连结构还包括至少位于至少一个开口内的含Cu材料的上表面上的复合M-MOx帽。复合M-MOx帽包括由与氧和氧化铜相比具有比氧更高的亲和性的金属构成的上部区域和由所述金属的非化学计量氧化物构成的下部区域。互连结构还包括位于复合M-MOx帽的至少上表面上的介电帽。

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