专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20050180061A1 Self-pinned read sensor design with enhanced lead stabilizing mechanism 失效
标题翻译：自固定读取传感器设计，具有增强的引线稳定机制
公开(公告)号：US20050180061A1
公开(公告)日：2005-08-18
申请号：US10781548
申请日：2004-02-18
申请人： Meng Ding , Robert Fontana , Kuok Ho , Neil Robertson , Ching Tsang
发明人： Meng Ding , Robert Fontana , Kuok Ho , Neil Robertson , Ching Tsang
IPC分类号： G01R33/09 , G11B5/39 , H01L43/08 , G11B5/33 , G11B5/127
CPC分类号： B82Y25/00 , G01R33/093 , G11B5/3912
摘要： A self pinned magnetoresistive sensor that has a relatively thick compressive material at either side to assist with self pinning. A shield having recessed portions at either side of the sensor area allows room for a thicker compressive layer than would otherwise be possible.
摘要翻译：自固定磁阻传感器，在任一侧具有相对较厚的压缩材料以辅助自锁。在传感器区域的任一侧具有凹入部分的屏蔽件允许比否则可能的空间更厚的压缩层。

2. 发明申请

US20050241138A1 Method of making a read sensor while protecting it from electrostatic discharge (ESD) damage 失效
标题翻译：制造读取传感器同时防止静电放电（ESD）损坏的方法
公开(公告)号：US20050241138A1
公开(公告)日：2005-11-03
申请号：US10835807
申请日：2004-04-30
申请人： Frederick Dill , Meng Ding , Kuok Ho , Jordan Katine , Scott MacDonald , Huey-Ming Tzeng
发明人： Frederick Dill , Meng Ding , Kuok Ho , Jordan Katine , Scott MacDonald , Huey-Ming Tzeng
IPC分类号： G11B5/187 , G11B5/31 , G11B5/39 , G11B5/40
CPC分类号： G11B5/3906 , G11B5/3163 , G11B5/40 , Y10T29/49021 , Y10T29/49043 , Y10T29/49048
摘要： A method of making a read sensor while protecting it from electrostatic discharge (ESD) damage involves forming a severable shunt during the formation of the read sensor. The method may include forming a resist layer over a plurality of read sensor layers; performing lithography with use of a mask to form the resist layer into a patterned resist which exposes left and right side regions over the read sensor layers as well as a shunt region; etching, with the patterned resist in place, to remove materials in the left and right side regions and in the shunt region; and depositing, with the patterned resist in place, left and right hard bias and lead layers in the left and right side regions, respectively, and in the shunt region for forming a severable shunt which electrically couples the left and right hard bias and lead layers together for ESD protection.
摘要翻译：制造读取传感器同时防止静电放电（ESD）损坏的方法包括在形成读取的传感器期间形成可分离的分流。该方法可以包括在多个读取传感器层上形成抗蚀剂层; 使用掩模执行光刻以将抗蚀剂层形成图案化的抗蚀剂，其在读取的传感器层以及分流区域上暴露左侧区域和右侧区域; 蚀刻，图案化抗蚀剂就位，以去除左右侧区域和分流区域中的材料; 并且分别在左侧区域和右侧区域以及分流区域中分别将图案化的抗蚀剂沉积在左侧和右侧的硬偏压和引线层，以形成可分离的分流器，其将左右硬偏压和引线层电耦合一起为ESD保护。

3. 发明申请

US20060000079A1 Method of providing a low-stress sensor configuration for a lithographically-defined read sensor 失效
标题翻译：为光刻定义的读取传感器提供低应力传感器配置的方法
公开(公告)号：US20060000079A1
公开(公告)日：2006-01-05
申请号：US10881581
申请日：2004-06-30
申请人： Meng Ding , Kuok Ho , Tsann Lin , Huey-Ming Tzeng
发明人： Meng Ding , Kuok Ho , Tsann Lin , Huey-Ming Tzeng
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11B5/3166 , G11B5/3169 , G11B5/3173 , G11B5/3903 , Y10T29/49041 , Y10T29/49046 , Y10T29/49052
摘要： One illustrative method of fabricating a read sensor of a magnetic head includes the steps of forming a plurality of read sensor layers on a wafer; etching the read sensor layers to form a read sensor structure with a trench in front of the read sensor structure; forming a highly porous material within the trench; and slicing the wafer and lapping the sliced wafer through the highly porous material until an air bearing surface (ABS) of the magnetic head is reached. Advantageously, the highly porous material in front of the read sensor structure reduces mechanical stress on the read sensor during the lapping process. This reduces the likelihood that the amplitude of the read sensor will be degraded or set in a “flipped” or reversed orientation, as well as reduces the likelihood that electrostatic discharge (ESD) damage to the read sensor will occur.
摘要翻译：一种制造磁头的读取传感器的说明性方法包括以下步骤：在晶片上形成多个读取传感器层; 蚀刻读取的传感器层以形成读取的传感器结构，其中在传感器结构的前面具有沟槽; 在沟槽内形成高度多孔的材料; 并切片晶片并通过高度多孔材料研磨切片的晶片，直到达到磁头的空气轴承表面（ABS）。有利地，在读取传感器结构前面的高度多孔材料在研磨过程中减小了读取传感器上的机械应力。这降低了读取传感器的幅度将被降级或设置为“翻转”或反向取向的可能性，并且降低了对读取传感器的静电放电（ESD）损坏将发生的可能性。

4. 发明申请

US20050180063A1 Method for biasing magnetoresistive sensor with decoupled hard bias multilayers 失效
标题翻译：用去耦硬偏置多层膜偏置磁阻传感器的方法
公开(公告)号：US20050180063A1
公开(公告)日：2005-08-18
申请号：US10782628
申请日：2004-02-18
申请人： Marie-Claire Cyrille , Meng Ding , Kuok Ho , Prakash Kasiraj , Ernesto Marinero , James Nix
发明人： Marie-Claire Cyrille , Meng Ding , Kuok Ho , Prakash Kasiraj , Ernesto Marinero , James Nix
IPC分类号： G11B5/127 , G11B5/33 , G11B5/39
CPC分类号： G11B5/3903
摘要： A magnetic sensor is provided, having two bias layers separated by a decoupling layer to eliminate exchange coupling between the bias layers. The two bias layers may have differing coercivities, such that the biases provided by the bias layers to the free layer are independently adjustable. The grain structures of the two bias layers may be substantially decorrelated by the decoupling layer.
摘要翻译：提供了一种磁传感器，其具有由解耦层隔开的两个偏置层，以消除偏置层之间的交换耦合。两个偏置层可以具有不同的矫顽力，使得由偏置层提供给自由层的偏压是独立可调的。两个偏置层的晶粒结构可以通过去耦层基本上去相关。

5. 发明申请

US20050063103A1 Method of forming an embedded read element 失效
标题翻译：形成嵌入式读取元素的方法
公开(公告)号：US20050063103A1
公开(公告)日：2005-03-24
申请号：US10666679
申请日：2003-09-19
申请人： Meng Ding , Kuok Ho , Tsann Lin , Huey-Ming Tzeng
发明人： Meng Ding , Kuok Ho , Tsann Lin , Huey-Ming Tzeng
IPC分类号： B24B37/04 , B24B49/10 , G11B5/39 , G11B5/33 , B24B49/00 , B24B51/00 , G11B5/127
CPC分类号： B24B37/013 , B24B49/10 , G11B5/39 , Y10T29/49041 , Y10T29/49046 , Y10T29/49048
摘要： A method of forming an embedded read element is used in the fabrication process of a magnetic head assembly including write and read heads. In this method, three photolithographic patterning steps are applied for defining the designed height of the embedded read element, defining its designed width, and connecting it with conducting layers, respectively. An in-line lapping guide is also formed with a spacing in front of the embedded read element. In this method, two mechanical lapping steps are applied, one monitored by measuring the resistance of a parallel circuit of the embedded read element and the in-line lapping guide, and the other monitored by measuring the GMR response of the embedded read element.
摘要翻译：在包括写入和读取头的磁头组件的制造过程中使用形成嵌入式读取元件的方法。在该方法中，应用三个光刻图案步骤来定义嵌入式读取元件的设计高度，限定其设计宽度，并将其与导电层连接。在嵌入式读取元件的前面还形成有间距的在线研磨引导件。在这种方法中，应用了两个机械研磨步骤，一个通过测量嵌入式读取元件的并联电路的电阻和在线研磨导轨进行监测，另一个通过测量嵌入式读取元件的GMR响应进行监测。

6. 发明申请

US20060196040A1 Method for making a magnetoresistive read head having a pinned layer width greater than the free layer stripe height 失效
标题翻译：用于制造具有大于自由层条纹高度的钉扎层宽度的磁阻读取头的方法
公开(公告)号：US20060196040A1
公开(公告)日：2006-09-07
申请号：US11072559
申请日：2005-03-03
申请人： Marie-Claire Cyrille , Meng Ding , Elizabeth Dobisz , Kuok Ho , Scott MacDonald
发明人： Marie-Claire Cyrille , Meng Ding , Elizabeth Dobisz , Kuok Ho , Scott MacDonald
IPC分类号： G11B5/127 , C23C14/00
CPC分类号： B82Y25/00 , B82Y10/00 , G01R33/093 , G11B5/3163 , G11B5/3169 , G11B5/3903 , G11B2005/3996 , Y10T29/49041 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052
摘要： A method for making a magnetoresistive read head so that the pinned ferromagnetic layer is wider than the stripe height of the free ferromagnetic layer uses ion milling with the ion beam aligned at an angle to the substrate supporting the stack of layers making up the read head. The stack is patterned with photoresist to define a rectangular region with front and back long edges aligned parallel to the read head track width. After ion milling in two opposite directions orthogonal to the front and back long edges, the pinned layer width has an extension. The extension makes the width of the pinned layer greater than the stripe height of the free layer after the substrate and stack of layers are lapped. The length of the extension is determined by the angle between the substrate and the ion beam and the thickness of the photoresist.
摘要翻译：一种用于制造磁阻读取头的方法，使得被钉扎铁磁层比自由铁磁层的条带高度宽，使用离子铣削，离子束与支撑构成读取头的层叠层的衬底成一角度对准。叠层用光致抗蚀剂图案化以限定具有平行于读头磁道宽度排列的前后长边缘的矩形区域。在与前后长边缘正交的两个相反方向离子铣削后，钉扎层宽度具有延伸。在衬底和层叠层之后，延伸部使得钉扎层的宽度大于自由层的条带高度。延伸长度由基板和离子束之间的角度以及光致抗蚀剂的厚度决定。

7. 发明申请

US20060044702A1 Repeatable ESD protection 有权
标题翻译：可重复ESD保护
公开(公告)号：US20060044702A1
公开(公告)日：2006-03-02
申请号：US10931731
申请日：2004-08-31
申请人： Meng Ding , Surya Pattanaik , Chie Poon , Neil Robertson
发明人： Meng Ding , Surya Pattanaik , Chie Poon , Neil Robertson
IPC分类号： G11B5/33 , G11B5/127
CPC分类号： G11B5/11 , B23K1/0056 , B23K1/018 , B23K26/0622 , B23K26/354 , B23K2101/42 , G11B5/3906 , G11B5/40
摘要： A method for shorting, unshorting, and reshorting an electronic component such as an MR sensor provides a repeatable ESD protection scheme. A conductive line of an electrically conductive first shorting material is created between electrical leads operatively coupled to an electronic component for creating a short therebetween. The short is severed using a laser. The short is recreated by applying a second shorting material, which may or may not be the same as the first shorting material.
摘要翻译：用于短路，不启动和重新安装诸如MR传感器的电子部件的方法提供了可重复的ESD保护方案。导电的第一短路材料的导线在可操作地耦合到电子部件的电引线之间产生，以在其间产生短路。使用激光切断短路。通过应用与第一短路材料相同或不同的第二短路材料来重建短路。

8. 发明申请

US20070223148A1 DEVICE WITH ESD PROTECTION 失效
标题翻译：具有ESD保护功能的设备
公开(公告)号：US20070223148A1
公开(公告)日：2007-09-27
申请号：US11745787
申请日：2007-05-08
申请人： Meng Ding , Surya Pattanaik , Chie Poon , Neil Robertson
发明人： Meng Ding , Surya Pattanaik , Chie Poon , Neil Robertson
IPC分类号： G11B5/33
CPC分类号： G11B5/11 , B23K1/0056 , B23K1/018 , B23K26/0622 , B23K26/354 , B23K2101/42 , G11B5/3906 , G11B5/40
摘要： A device according to one embodiment includes an electronic component such as an MR sensor, a pair of leads operatively coupled to the electronic component, and shorting material between the leads, the shorting material having been applied by a laser deposition process, the shorting material having been severed. A magnetic storage system according to another embodiment includes magnetic media; and at least one head for reading from and writing to the magnetic media, each head having: a sensor; and a writer coupled to the sensor. The system also includes a pair of pads or leads operatively coupled to the head; shorting material between the leads, the shorting material having been applied by a laser deposition process, the shorting material having been severed; a slider for supporting the head; and a control unit coupled to the head for controlling operation of the head.
摘要翻译：根据一个实施例的装置包括诸如MR传感器的电子部件，可操作地耦合到电子部件的一对引线以及引线之间的短路材料，通过激光沉积工艺施加了短路材料，所述短路材料具有被切断根据另一实施例的磁存储系统包括磁介质; 以及用于从磁介质读取和写入至少一个头部，每个头部具有：传感器; 以及耦合到传感器的写入器。该系统还包括可操作地耦合到头部的一对垫或引线; 在引线之间短路材料，通过激光沉积工艺施加的短路材料，短路材料已被切断; 用于支撑头部的滑块; 以及耦合到头部用于控制头部的操作的控制单元。

9. 发明授权

US08809936B2 Memory cell system with multiple nitride layers 有权
标题翻译：具有多个氮化物层的存储单元系统
公开(公告)号：US08809936B2
公开(公告)日：2014-08-19
申请号：US11461428
申请日：2006-07-31
申请人： Lei Xue , Rinji Sugino , YouSeok Suh , Hidehiko Shiraiwa , Meng Ding , Shenqing Fang , Joong Jeon
发明人： Lei Xue , Rinji Sugino , YouSeok Suh , Hidehiko Shiraiwa , Meng Ding , Shenqing Fang , Joong Jeon
IPC分类号： H01L29/788
CPC分类号： H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/513
摘要： A memory cell system is provided including forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming a second insulator layer over the charge trap layer, forming a top blocking intermediate layer over the second insulator layer, and forming a contact layer over the top blocking intermediate layer.
摘要翻译：提供一种存储单元系统，包括在半导体衬底上形成第一绝缘体层，在第一绝缘体层上形成电荷陷阱层，在电荷陷阱层上形成第二绝缘体层，在第二绝缘体层上形成顶部阻挡中间层并且在顶部阻挡中间层上形成接触层。

10. 发明授权

US08031528B2 Flash memory programming and verification with reduced leakage current 有权
标题翻译：闪存编程和验证，减少漏电流
公开(公告)号：US08031528B2
公开(公告)日：2011-10-04
申请号：US12557721
申请日：2009-09-11
申请人： Ashot Melik-Martirosian , Ed Runnion , Mark Randolph , Meng Ding
发明人： Ashot Melik-Martirosian , Ed Runnion , Mark Randolph , Meng Ding
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C16/0475 , G11C16/12 , G11C16/344 , G11C16/3445 , G11C16/3454 , G11C16/3459
摘要： A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduct through the target memory cells. A positive source bias voltage may also be applied to target memory cells during verification operations (program verify, soft program verify, erase verify) to reduce or eliminate leakage current that might otherwise introduce errors in the verification operations.
摘要翻译：根据本发明的示例性实施例配置的闪存系统采用虚拟接地阵列架构。在编程操作期间，目标存储器单元被偏置为正的源偏置电压，以减少或消除否则可能通过目标存储器单元传导的漏电流。在验证操作（程序验证，软程序验证，擦除验证）期间，也可以将正源偏置电压施加到目标存储器单元，以减少或消除可能在验证操作中引入错误的泄漏电流。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式