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1. 发明授权

US06469367B2 Bipolar transistor 失效
公开(公告)号：US06469367B2
公开(公告)日：2002-10-22
申请号：US09983143
申请日：2001-10-23
申请人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
发明人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L27082
CPC分类号： H01L31/1105
摘要： A bipolar transistor using a B-doped Si and Ge alloy for a base in which a Ge content in an emitter-base depletion region and in a base-collector depletion region is greater than a Ge content in a base layer. Diffusion of B from the base layer can be suppressed by making the Ge content in the emitter-base depletion region and in a base-collector depletion region on both sides of the base layer greater than the Ge content in the base layer since the diffusion coefficient of B in the SiGe layer is lowered as the Ge contents increases.

2. 发明授权

US06653715B2 Bipolar transistor 失效
公开(公告)号：US06653715B2
公开(公告)日：2003-11-25
申请号：US10237674
申请日：2002-09-10
申请人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
发明人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L2782
CPC分类号： H01L31/1105
摘要： A bipolar transistor using a B-doped Si and Ge alloy for a base in which a Ge content in an emitter-base depletion region and in a base-collector depletion region is greater than a Ge content in a base layer. Diffusion of B from the base layer can be suppressed by making the Ge content in the emitter-base depletion region and in a base-collector depletion region on both sides of the base layer greater than the Ge content in the base layer since the diffusion coefficient of B in the SiGe layer is lowered as the Ge contents increases.

3. 发明授权

US06482710B2 Bipolar transistor and manufacting method thereof 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：US06482710B2
公开(公告)日：2002-11-19
申请号：US09811559
申请日：2001-03-20
申请人： Katsuya Oda , Eiji Ohue , Masao Kondo , Katsuyoshi Washio , Masamichi Tanabe , Hiromi Shimamoto
发明人： Katsuya Oda , Eiji Ohue , Masao Kondo , Katsuyoshi Washio , Masamichi Tanabe , Hiromi Shimamoto
IPC分类号： H01L21331
CPC分类号： H01L29/66287 , H01L29/66242 , H01L29/732 , H01L29/7378
摘要： A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
摘要翻译：根据本发明的双极晶体管具有以下结构：由单晶Si-Ge构成的本征基极和基极引出电极通过高浓度掺杂的由多晶Si-Ge制成的连接基底连接，此外，在本征基底之下的部分具有与集电体相同的导电类型，并且在外围部分中，在本征基极和集电极层之间设置具有与基底相同的导电类型的单晶Si-Ge层。因此，同时实现本征基极与基极引出电极之间的基极的电阻的降低和集电极与基极之间的电容的减小，以及自对准双极晶体管，其中发射极和集电极和基极之间的基极和电容分别小，功耗小，获得高速运行。

4. 发明授权

US06974977B2 Heterojunction bipolar transistor 失效
标题翻译：异质结双极晶体管
公开(公告)号：US06974977B2
公开(公告)日：2005-12-13
申请号：US10457428
申请日：2003-06-10
申请人： Katsuyoshi Washio , Reiko Hayami , Hiromi Shimamoto , Masao Kondo , Katsuya Oda , Eiji Oue , Masamichi Tanabe
发明人： Katsuyoshi Washio , Reiko Hayami , Hiromi Shimamoto , Masao Kondo , Katsuya Oda , Eiji Oue , Masamichi Tanabe
IPC分类号： H01L29/72 , G02B6/42 , H01L21/331 , H01L29/737 , H03F3/45
CPC分类号： H01L29/66242 , G02B6/4251 , G02B6/4274 , H01L29/7375 , H01L29/7378 , H03F3/45085 , H03F3/45089 , H03F2200/372 , H03F2203/45311 , H03F2203/45574 , H03F2203/45612 , H03F2203/45652 , H03F2203/45722
摘要： A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.
摘要翻译：提供了具有高可靠性和高增益的双极晶体管，并且特别适用于高速运行。双极晶体管以高精度工作，即使在集电极电压变化时也不会对集电极电流产生实质性的变化。与传统的集电极电流双极晶体管相比，它具有较小的变化，同时确保了高速性能和高增益。在一个示例中，基极区域中的带隙小于发射极和集电极区域中的带隙。带隙在与发射极区域的结点附近是恒定的，并且朝着与集电极区域的结点减小。单晶硅/锗通常用于基极区域。

5. 发明授权

US06600178B1 Heterojunction bipolar transistor 失效
标题翻译：异质结双极晶体管
公开(公告)号：US06600178B1
公开(公告)日：2003-07-29
申请号：US09599741
申请日：2000-06-23
申请人： Katsuyoshi Washio , Reiko Hayami , Hiromi Shimamoto , Masao Kondo , Katsuya Oda , Eiji Oue , Masamichi Tanabe
发明人： Katsuyoshi Washio , Reiko Hayami , Hiromi Shimamoto , Masao Kondo , Katsuya Oda , Eiji Oue , Masamichi Tanabe
IPC分类号： H01L29737
CPC分类号： H01L29/66242 , G02B6/4251 , G02B6/4274 , H01L29/7375 , H01L29/7378 , H03F3/45085 , H03F3/45089 , H03F2200/372 , H03F2203/45311 , H03F2203/45574 , H03F2203/45612 , H03F2203/45652 , H03F2203/45722
摘要： A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.
摘要翻译：提供了具有高可靠性和高增益的双极晶体管，并且特别适用于高速运行。双极晶体管以高精度工作，即使在集电极电压变化时也不会对集电极电流产生实质性的变化。与传统的集电极电流双极晶体管相比，它具有较小的变化，同时确保了高速性能和高增益。在一个示例中，基极区域中的带隙小于发射极和集电极区域中的带隙。带隙在与发射极区域的结点附近是恒定的，并且朝着与集电极区域的结点减小。单晶硅/锗通常用于基极区域。

6. 发明授权

US06521974B1 Bipolar transistor and manufacturing method thereof 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：US06521974B1
公开(公告)日：2003-02-18
申请号：US09689800
申请日：2000-10-13
申请人： Katsuya Oda , Eiji Ohue , Masao Kondo , Katsuyoshi Washio , Masamichi Tanabe , Hiromi Shimamoto
发明人： Katsuya Oda , Eiji Ohue , Masao Kondo , Katsuyoshi Washio , Masamichi Tanabe , Hiromi Shimamoto
IPC分类号： H01L2970
CPC分类号： H01L29/66287 , H01L29/66242 , H01L29/732 , H01L29/7378
摘要： A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
摘要翻译：根据本发明的双极晶体管具有以下结构：由单晶Si-Ge构成的本征基极和基极引出电极通过高浓度掺杂的由多晶Si-Ge制成的连接基底连接，此外，在本征基底之下的部分具有与集电体相同的导电类型，并且在外围部分中，在本征基极和集电极层之间设置具有与基底相同的导电类型的单晶Si-Ge层。因此，同时实现本征基极与基极引出电极之间的基极的电阻的降低和集电极与基极之间的电容的减小，以及自对准双极晶体管，其中发射极和集电极和基极之间的基极和电容分别小，功耗小，获得高速运行。

7. 发明授权

US06388307B1 Bipolar transistor 失效
公开(公告)号：US06388307B1
公开(公告)日：2002-05-14
申请号：US09376352
申请日：1999-08-18
申请人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
发明人： Masao Kondo , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L2782
CPC分类号： H01L31/1105
摘要： A bipolar transistor using a B-doped Si and Ge alloy for a base in which a Ge content in an emitter-base depletion region and in a base-collector depletion region is greater than a Ge content in a base layer. Diffusion of B from the base layer can be suppressed by making the Ge content in the emitter-base depletion region and in a base-collector depletion region on both sides of the base layer greater than the Ge content in the base layer since the diffusion coefficient of B in the SiGe layer is lowered as the Ge contents increases.

8. 发明申请

US20050001238A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050001238A1
公开(公告)日：2005-01-06
申请号：US10855378
申请日：2004-05-28
申请人： Eiji Oue , Katsuyoshi Washio , Hiromi Shimamoto , Katsuya Oda , Makoto Miura
发明人： Eiji Oue , Katsuyoshi Washio , Hiromi Shimamoto , Katsuya Oda , Makoto Miura
IPC分类号： H01L21/331 , H01L29/732 , H01L29/737 , H01L31/0328
CPC分类号： H01L29/66287 , H01L29/7322
摘要： A bipolar transistor is provided in which both the base resistance and the base-collector capacitance are reduced and which is capable of operating at a high cutoff frequency. The semiconductor device is structured so that the emitter and extrinsic base are separated from each other by an insulator sidewall and the bottom faces of the insulator sidewall, and the emitter are approximately on the same plane. The extrinsic base electrode and the collector region are separated from each other by an insulator.
摘要翻译：提供双极晶体管，其中基极电阻和基极集电极电容都减小，并且能够以高截止频率工作。半导体器件被构造成使得发射极和非本征基极通过绝缘体侧壁和绝缘体侧壁的底面彼此分离，并且发射极大致在同一平面上。外部基极和集电极区域通过绝缘体彼此分离。

9. 发明授权

US06667489B2 Heterojunction bipolar transistor and method for production thereof 有权
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US06667489B2
公开(公告)日：2003-12-23
申请号：US10299837
申请日：2002-11-20
申请人： Isao Suzumura , Katsuya Oda , Katsuyoshi Washio
发明人： Isao Suzumura , Katsuya Oda , Katsuyoshi Washio
IPC分类号： H01L2906
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A high-speed heterojunction bipolar transistor in a large injection of electrons from the emitter and a method for production thereof. In a typical example of the SiGeC heterojunction bipolar transistor, the collector has a layer of n-type single-crystal Si and a layer of n-type single-crystal SiGe, the base is a layer of heavily doped p-type single-crystal SiGeC, and the emitter is a layer of n-type single-crystal Si. At the heterointerface between the layer of n-type single-crystal SiGe and the layer of p-type single-crystal SiGeC, the bandgap of the p-type single-crystal SiGeC is larger than that of the layer of n-type single-crystal SiGe. Even though the effective neutral base expands due to an increase in electrons injected from the emitter, no energy barrier occurs in the conduction band at the heterointerface between the layer of n-type single-crystal SiGe and the layer of p-type single-crystal SiGeC. Thus, the diffusion of electrons is not inhibited and it is possible to realize high-speed heterojunction bipolar transistors even in the high injection state.
摘要翻译：从发射极大量注入电子的高速异质结双极晶体管及其制造方法。在SiGeC异质结双极晶体管的典型实例中，集电体具有n型单晶Si层和n型单晶SiGe层，基极是重掺杂p型单晶层 SiGeC，发射极是n型单晶Si层。在n型单晶SiGe层和p型单晶SiGeC层之间的异质界面处，p型单晶SiGeC的带隙大于n型单晶SiGeC层的带隙，水晶SiGe。即使有效的中性碱基由于从发射体注入的电子的增加而扩大，在n型单晶SiGe层与p型单晶层之间的异质界面的导带中也不发生能量势垒 SiGeC。因此，电子的扩散不被抑制，即使在高注入状态下也可以实现高速异质结双极晶体管。

10. 发明授权

US07095043B2 Semiconductor device, semiconductor circuit module and manufacturing method of the same 失效
标题翻译：半导体器件，半导体电路模块及其制造方法
公开(公告)号：US07095043B2
公开(公告)日：2006-08-22
申请号：US10790190
申请日：2004-03-02
申请人： Katsuya Oda , Nobuyuki Sugii , Makoto Miura , Isao Suzumura , Katsuyoshi Washio
发明人： Katsuya Oda , Nobuyuki Sugii , Makoto Miura , Isao Suzumura , Katsuyoshi Washio
IPC分类号： H01L29/06 , H01L31/0328
CPC分类号： H01L29/66068 , H01L21/823807 , H01L27/0922 , H01L29/1054 , H01L29/1608
摘要： An (SiGe)C layer having a stoichiometric ratio of about 1:1 is locally formed on an Si layer, a large forbidden band width semiconductor device is prepared inside the layered structure thereof and an Si semiconductor integrated circuit is formed in the regions not formed with the layered structure, whereby high frequency high power operation of the device is enabled by the large forbidden band width semiconductor device and high performance is attained by hybridization of the Si integrated circuit.
摘要翻译：在Si层上局部地形成化学计量比为约1:1的An（SiGe）C层，在其层叠结构内制备大的禁带宽半导体器件，并且在未形成的区域中形成Si半导体集成电路具有分层结构，由此通过大的禁带宽半导体器件能够实现器件的高频高功率操作，并且通过Si集成电路的杂交获得高性能。

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