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    • 2. 发明授权
    • Method and apparatus for enhancing peak luminance on plasma display panel
    • 用于提高等离子体显示面板上的峰值亮度的方法和装置
    • US07023406B1
    • 2006-04-04
    • US09567344
    • 2000-05-09
    • Keiji NunomuraYoshio SanoToshiyuki AkiyamaHachiro Yamada
    • Keiji NunomuraYoshio SanoToshiyuki AkiyamaHachiro Yamada
    • G09G3/28
    • G09G3/2944G09G3/2022G09G2320/0233G09G2330/021G09G2360/16
    • To provide a plasma display device which implements a peak luminance higher than prior art, reduces the power dissipation, improves the smoothness of gradation display, and conducts clear display suitable especially for TV display. By setting a plurality of APL levels according to the average value of the scene brightness, and by shortening a sustaining pulse period and increasing the number of sustaining pulses of each sub-field in APL levels having small APL, the peak luminance is raised. Further, by making the sustaining pulse period long in APL levels having large APL requiring large discharge light emission power, the light emission efficiency is improved and the maximum power dissipation is reduced. The luminance distribution in the scene when the APL level is small is detected. On the basis of that information, setting of the number of sustaining pulses and the sustaining pulse period is changed in the same APL level. As a result, the peak luminance is increased, and the gradation smoothness in the dark scene is improved.
    • 为了提供实现比现有技术更高的峰值亮度的等离子体显示装置,降低了功率消耗,提高了灰度显示的平滑度,并且进行了特别适用于电视显示的清晰显示。 通过根据场景亮度的平均值设置多个APL电平,并且通过缩短维持脉冲周期并增加具有小APL的APL电平中的每个子场的维持脉冲数,峰值亮度升高。 此外,通过使需要大放电发光功率的APL大的APL电平的持续脉冲期间长,能够提高发光效率,降低最大功耗。 检测到当APL电平小时场景中的亮度分布。 基于该信息,维持脉冲数和持续脉冲周期的设定在相同的APL电平中变化。 结果,峰值亮度增加,并且暗场景中的灰度平滑度得到改善。
    • 3. 发明授权
    • System string search system using matrix memory?comparator with columns
simultaneously comparing with symbols of string supplied in parallel
from a column of input shift registers
    • 使用矩阵存储器的系统字符串搜索系统?比较器与列同时与输入移位寄存器列并行提供的字符串的符号进行比较
    • US5175860A
    • 1992-12-29
    • US397029
    • 1989-08-22
    • Hachiro Yamada
    • Hachiro Yamada
    • G06F17/30G06F7/02
    • G06F7/02Y10S707/99933
    • A symbol string collating apparatus includes a memory unit, a shift register, a collating unit, and an encoder. The memory unit includes memory circuits arranged in a matrix, stores a series of variable-length reference data with reference to a lower bit position of each column of the memory circuits, and stores specific data not including the reference data in a remaining portion. The shift register has the number of stages equal to the number of rows of the matrix and stores variable-length reference data to be collated which is externally input in series to the shift register in units of symbols. The collating unit collates the reference data stored in the shift register with the reference data stored in each column of the memory unit in units of bits. The encoder generates an output signal when at least a part of the reference data coincides with the reference data as a result of collating by the collating unit.
    • 符号串对照装置包括存储单元,移位寄存器,对照单元和编码器。 存储单元包括以矩阵形式布置的存储器电路,参考存储器电路的每列的较低位位置存储一系列可变长度参考数据,并将不包括参考数据的特定数据存储在剩余部分中。 移位寄存器具有与矩阵的行数相等的级数,并且存储要对准的可变长度参考数据,其以符号为单位串行输入到移位寄存器。 对照单元将存储在移位寄存器中的参考数据与存储在存储器单元的每列中的参考数据以位为单位进行比较。 当由对照单元对照的结果,当至少一部分参考数据与参考数据一致时,编码器产生输出信号。
    • 5. 发明授权
    • String comparator for searching for reference character string of
arbitrary length
    • 用于搜索任意长度的参考字符串的字符串比较器
    • US4907194A
    • 1990-03-06
    • US811073
    • 1985-12-19
    • Hachiro YamadaKousuke Takahashi
    • Hachiro YamadaKousuke Takahashi
    • G06F7/02G06F17/30
    • G06F17/30985G06F7/02
    • A string comparator is provided for searching the address of a stored string having substantially the same content as that of an input reference string. This comparator comprises a memory including a number of memory cells arranged in a matrix form having a plurality of rows and a plurality of columns. Each string is stored in the memory in such a manner that the row position of each of the memory cells corresponds to the content of a stored string and the column position of each of the memory cells corresponds to the address of the stored string. A row selector is coupled to the memory for selecting one row of the memory cell matrix corresponding to the content of the input reference string to be compared, so that the content of the memory cells belonging to the row selected by the row selector is read out.
    • 提供串比较器,用于搜索与输入参考串的内容基本相同内容的存储串的地址。 该比较器包括存储器,该存储器包括以具有多行和多列的矩阵形式布置的多个存储单元。 每个字符串以这样的方式存储在存储器中,使得每个存储单元的行位置对应于存储的字符串的内容,并且每个存储单元的列位置对应于存储的字符串的地址。 行选择器被耦合到存储器,用于选择与要比较的输入参考串的内容相对应的存储单元矩阵的一行,使得属于由行选择器选择的行的存储单元的内容被读出 。
    • 6. 发明授权
    • Gray scale expression method and gray scale display device
    • 灰度表达法和灰度显示装置
    • US06323880B1
    • 2001-11-27
    • US08936801
    • 1997-09-24
    • Hachiro Yamada
    • Hachiro Yamada
    • G09G510
    • G09G3/2033G09G3/2029G09G3/204G09G3/2927G09G2300/0426G09G2320/0261G09G2320/0266G09G2320/0276G09G2320/0285
    • In order to restrict a degradation of image quality due to fake contours of moving images, gray scale is displayed by dividing one field period into sub-fields and combining the sub-fields including a plurality of sub-fields weighted such that a light intensity of a certain one of the plurality of the sub-fields is smaller than two times a light intensity of a lower sub-field adjacent to the certain sub-field and larger than the light intensity of the lower sub-field. Further, a light intensity information code converter circuit responsive to binary numbers expressing weights of light intensities of the plurality of the sub-fields for outputting a light intensity information expressing weights in a range satisfying a condition that a light intensity of a certain one of the plurality of the sub-fields is smaller than two times a light intensity of a lower sub-field adjacent to the certain sub-field and larger than the light intensity of the lower sub-field.
    • 为了限制由于运动图像的假轮廓引起的图像质量的劣化,通过将一个场周期划分为子场来显示灰度级,并且组合包括加权的多个子场的子场,使得 多个子场中的某个子场小于与该子场相邻的较低子场的光强度的两倍,并且大于下部子场的光强度。 此外,光强度信息代码转换器电路响应于表示所述多个子场的光强度的权重的二进制数,用于输出表示在满足条件中的某一个的光强度的条件下的权重的光强度信息 多个子场小于与特定子场相邻的较低子场的光强度的两倍,并且大于下部子场的光强度。
    • 7. 发明授权
    • Plasma display panel with a structure capable of reducing various noises
    • 具有能够减少各种噪声的结构的等离子体显示面板
    • US06275203B1
    • 2001-08-14
    • US09116128
    • 1998-07-15
    • Hachiro Yamada
    • Hachiro Yamada
    • G09G328
    • G09G3/296G09G3/294G09G2310/0218G09G2330/06
    • The present invention relates to a plasma display panel of the surface discharge type and the AC type. In the plasma display panel of the present invention, scanning pulses are successively applied to a large number of scanning electrodes while data pulses are successively applied to a large number of data electrodes to write wall charge which corresponds to an image into pixels. Then, sustain pulses whose feeding directions are reversed between a first condition and a second condition which occur alternately are fed between the scanning electrodes and sustain electrodes so that discharge occurs at the positions of the pixels in which the wall charge is written to cause a phosphor to emit light to display the image. Since, when the surface discharge electrodes of a predetermined number of one or more rows arranged successively in the column direction are defined as a set, the feeding directions and the positive and negative polarities of the sustain pulses are made opposite between the surface discharge electrodes of odd-numbered sets and even-numbered sets, magnetic noises and electric field noises generated by feeding of the sustain pulses of a high voltage cancel each other, and consequently, such noises can be reduced.
    • 本发明涉及一种表面放电型和AC型等离子显示面板。 在本发明的等离子体显示面板中,扫描脉冲被连续地施加到大量的扫描电极,同时数据脉冲被连续施加到大量的数据电极上,以将对应于图像的壁电荷写入像素。 然后,在扫描电极和维持电极之间馈送在交替发生的第一条件和第二条件之间的供电方向相反的维持脉冲,使得在写入壁电荷的像素的位置处发生放电,从而引起荧光体 发光以显示图像。 由于当将在列方向上连续排列的预定数量的一行或多行的表面放电电极定义为一组时,维持脉冲的馈送方向和正极性和负极性在表面放电电极之间相反, 奇数组和偶数组,通过馈送高电压的维持脉冲而产生的磁噪声和电场噪声彼此抵消,因此可以降低这种噪声。
    • 9. 发明授权
    • Associative memory device with small memory cells selectively storing
data bits and don't care bits
    • 具有小存储器单元的关联存储器件选择性地存储数据位并且不关心位
    • US5455784A
    • 1995-10-03
    • US288190
    • 1994-08-09
    • Hachiro Yamada
    • Hachiro Yamada
    • G11C15/04G11C15/00
    • G11C15/04G11C15/046
    • An associative memory cell is implemented by a series combination of two electrically erasable and programmable read only memory transistors inserted in a potential line and complementarily driven by two data lines for making one of the two electrically erasable and programmable read only memory transistors conductive depending upon the logic level of a registration data bit, and the two data lines make both of the two electrically erasable and programmable read only memory transistors conductive for storing a don't-care bit, thereby decreasing the occupation area assigned to the associative memory cell without sacrifice of usability in the associative operation.
    • 一个联想存储器单元由两个电可擦除和可编程只读存储晶体管的串联组合来实现,这两个电可擦除和可编程只读存储晶体管插入电位线,并由两个数据线互补驱动,以使两个电可擦除和可编程只读存储晶体管中的一个导体依赖于 注册数据位的逻辑电平,并且两个数据线使两个电可擦除和可编程只读存储晶体管都导通,用于存储不需要的位,从而减少分配给关联存储器单元而不牺牲的占用面积 在联想操作中的可用性。