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1. 发明授权

US5882963A Method of manufacturing semiconductor components 失效
标题翻译：制造半导体元件的方法
公开(公告)号：US5882963A
公开(公告)日：1999-03-16
申请号：US910055
申请日：1997-08-12
申请人： Martin Kerber , Helmut Klose , Andreas Vom Felde
发明人： Martin Kerber , Helmut Klose , Andreas Vom Felde
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/768 , H01L23/522 , H01L21/44
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002
摘要： A method of manufacturing a semiconductor component, wherein capacitances occurring between contacts, interconnects or metallizations are reduced by filling cavities with air or gas is provided. The cavities are produced between the semiconductor material and a passivation layer in a region wherein the interconnects are surrounded by dielectric and are subsequently closed by a further passivation layer.
摘要翻译：提供了制造半导体部件的方法，其中通过用空气或气体填充空腔来减少在触点，互连或金属化之间出现的电容。在半导体材料和钝化层之间产生空腔，其中互连由电介质围绕并且随后被另外的钝化层封闭。

2. 发明授权

US5969534A Semiconductor testing apparatus 失效
标题翻译：半导体测试仪器
公开(公告)号：US5969534A
公开(公告)日：1999-10-19
申请号：US666491
申请日：1996-07-11
申请人： Holger Hubner , Werner Weber , Siegmar Koppe , Helmut Klose
发明人： Holger Hubner , Werner Weber , Siegmar Koppe , Helmut Klose
IPC分类号： G01R31/26 , G01R1/06 , G01R1/067 , G01R1/073 , H01L21/66 , G01R31/02
CPC分类号： G01R1/06783
摘要： A method and apparatus for the reversible contacting of a semiconductor circuit level to assist in performing a function test. The apparatus includes a testing head having test points arranged at a test side lying opposite the contact surfaces of a semiconductor circuit level. The test points are formed of liquid contacts in recesses in the test side of the testing head wherein the liquid contacts form menisci that project beyond the surface of the testing head. The recesses, in turn, are provided for metallizations which are connected to electrically-conductive leads. In addition, the surface may be provided with a roughening or with etched trenches.
摘要翻译： PCT No.PCT / DE95 / 00013 Sec。 371日期：1996年7月11日 102（e）日期1996年7月11日PCT 1995年1月9日PCT PCT。公开号WO95 / 18975 日期1995年7月13日用于半导体电路级的可逆接触以辅助执行功能测试的方法和装置。该装置包括具有布置在与半导体电路电平的接触表面相对的测试侧的测试点的测试头。测试点由测试头测试侧的凹槽中的液体触点形成，其中液体触点形成突出超出测试头表面的半月板。这些凹槽又被提供用于连接到导电引线的金属化。此外，表面可以设置有粗糙化或具有蚀刻的沟槽。

3. 发明授权

US5273934A Method for producing a doped region in a substrate 失效
标题翻译：在衬底中制造掺杂区域的方法
公开(公告)号：US5273934A
公开(公告)日：1993-12-28
申请号：US881166
申请日：1992-05-11
申请人： Karl Ehinger , Michael Bianco , Helmut Klose
发明人： Karl Ehinger , Michael Bianco , Helmut Klose
IPC分类号： H01L21/225 , H01L21/331 , H01L29/73 , H01L29/732
CPC分类号： H01L29/66272 , H01L21/2255 , H01L29/732 , Y10S148/034 , Y10S438/923
摘要： A doped region (14) is produced in a substrate (11) of silicon by diffusion of dopant from a doped glass layer (13) that is arranged on an intermediate layer (12) situated on the substrate (11) . The dopant concentration in the doped region (14) is thereby limited by the intermediate layer (12). The doped glass layer (13) is particularly produced by chemical vapor deposition of (B(OSi(CH.sub.3).sub.3).sub.3).
摘要翻译：通过掺杂剂从布置在位于衬底（11）上的中间层（12）上的掺杂玻璃层（13）的扩散而在硅的衬底（11）中产生掺杂区域（14）。因此，掺杂区域（14）中的掺杂剂浓度被中间层（12）限制。掺杂的玻璃层（13）特别是通过（B（OSi（CH3）3）3）的化学气相沉积来制备。

4. 发明授权

US5177582A CMOS-compatible bipolar transistor with reduced collector/substrate capacitance and process for producing the same 失效
标题翻译：具有降低的集电极/衬底电容的CMOS兼容双极晶体管及其制造方法
公开(公告)号：US5177582A
公开(公告)日：1993-01-05
申请号：US754377
申请日：1991-08-30
申请人： Thomas Meister , Hans-Willi Meul , Helmut Klose , Hermann Wendt
发明人： Thomas Meister , Hans-Willi Meul , Helmut Klose , Hermann Wendt
IPC分类号： H01L21/8249 , H01L27/06 , H01L29/08 , H01L29/732
CPC分类号： H01L29/0826 , H01L21/8249 , H01L27/0623 , H01L29/732
摘要： A bipolar transistor with a collector, a base and an emitter disposed in vertical succession includes a semiconductor substrate, insulating oxide zones disposed in the substrate for separating adjacent transistors, and a buried collector terminal layer at least partly disposed on the insulating oxide zones. An insulator structure laterally surrounding a collector. A subcollector is surrounded by the insulating oxide zones, has the same conductivity type with a lower impedance than the collector, is disposed under the collector and under the insulator structure, and is electrically connected to the collector. The insulator structure covers the buried collector terminal layer, laterally insulates the collector from the buried collector terminal layer, and has lateral surfaces extending inside the insulating oxide regions up to the subcollector. The buried collector terminal layer is in direct contact with the subcollector. The collector is electrically connected to the buried collector terminal layer only through the subcollector. The insulator structure has a contact hole extending to the buried collector terminal layer laterally of the active transistor zone, and a metallization filling the contact hole. A process for producing the bipolar transistor includes producing an insulator structure on a substrate for determining a location for a collector; and producing the collector by selective epitaxy only inside the insulator structure, for laterally insulating the collector with the insulator structure. An integrated circuit and method include such bipolar transistors and CMOS transistors.
摘要翻译：具有垂直相继布置的集电极，基极和发射极的双极晶体管包括半导体衬底，设置在衬底中用于分离相邻晶体管的绝缘氧化物区域和至少部分地设置在绝缘氧化物区域上的埋地集电极端子层。横向围绕收集器的绝缘体结构。子集电极被绝缘氧化物区围绕，具有与集电体相比具有较低阻抗的相同的导电类型，设置在集电器下方和绝缘体结构下方，并且与集电极电连接。绝缘体结构覆盖埋地集电极端子层，使集电体与埋地集电极端子层横向绝缘，并且具有在绝缘氧化物区域内延伸直到子集电极的侧表面。埋地集电极端子层与子集电极直接接触。集电极仅通过子集电极电连接到埋地集电极端子层。绝缘体结构具有在有源晶体管区域侧向延伸到集电极端子层的接触孔，以及填充接触孔的金属化。制造双极晶体管的方法包括：在基板上制造用于确定集电体位置的绝缘体结构; 并且仅通过绝缘体结构内的选择性外延生产集电体，用于使绝缘体结构的集电体横向绝缘。集成电路和方法包括这样的双极晶体管和CMOS晶体管。

5. 发明授权

US5714397A Process for producing lateral bipolar transistor 失效
标题翻译：制造横向双极晶体管的工艺
公开(公告)号：US5714397A
公开(公告)日：1998-02-03
申请号：US666101
申请日：1996-06-19
申请人： Helmut Klose
发明人： Helmut Klose
IPC分类号： H01L21/331 , H01L29/73 , H01L21/265
CPC分类号： H01L29/66265 , H01L29/7317
摘要： In a lateral bipolar transistor and a method for producing the same, an emitter layer and a collector layer are disposed on a structured dielectric layer. The structured dielectric layer is located in a plane of a base layer and is interrupted by the base layer in such a way that between the base layer and portions of the structured dielectric layer, the base layer is contacted on one side by the emitter layer and on the opposite side by the collector layer.
摘要翻译：在横向双极晶体管及其制造方法中，发射极层和集电极层设置在结构化电介质层上。结构化介电层位于基底层的平面中，并被基底层间隔开，使得在基底层和结构化介电层的部分之间，基底层在一侧被发射极层接触，并且在集电体层的相对侧。

6. 发明授权

US5447067A Acceleration sensor and method for manufacturing same 失效
标题翻译：加速度传感器及其制造方法
公开(公告)号：US5447067A
公开(公告)日：1995-09-05
申请号：US207080
申请日：1994-03-08
申请人： Markus Biebl , Thomas Scheiter , Helmut Klose
发明人： Markus Biebl , Thomas Scheiter , Helmut Klose
IPC分类号： G01P15/09 , G01P15/08 , G01P15/12 , G01P15/125 , H01L29/84 , G01P1/02
CPC分类号： G01P15/125 , G01P15/0802 , G01P15/123 , G01P2015/0814
摘要： An acceleration sensor has a proof mass attached by resilient elements, in the form of micromechanical components, in a monocrystalline silicon layer of an SOI (silicon-on-insulator) substrate, the insulator layer of the substrate being removed under the structure which is susceptible to acceleration, in order to enable free mobility of the micromechanical components. Piezoresistors are provided for detecting movement of the proof mass, the piezoresistors supplying electrical signals to an evaluation circuit.
摘要翻译：加速度传感器具有通过在MEMS（绝缘体上硅）衬底的单晶硅层中以微机械部件的形式的弹性元件附着的校验物质，该衬底的绝缘体层在易感的结构下被去除以加速，以便实现微机械部件的自由移动。提供压阻器用于检测检测质量块的运动，压电电阻器将电信号提供给评估电路。

7. 发明授权

US5431051A Tunnel effect acceleration sensor 失效
标题翻译：隧道效应加速度传感器
公开(公告)号：US5431051A
公开(公告)日：1995-07-11
申请号：US219538
申请日：1994-03-29
申请人： Markus Biebl , Thomas Scheiter , Helmut Klose
发明人： Markus Biebl , Thomas Scheiter , Helmut Klose
IPC分类号： G01P15/08 , H01L29/88 , G01P15/13
CPC分类号： G01P15/0894
摘要： An acceleration sensor is produced on a silicon substrate by etching to leave a cantilevered beam of polysilicon with a tip on the substrate projecting toward this beam. Acceleration of the sensor causes the beam to bend, thereby changing the spacing between the tip and the beam, and thereby also changing the tunnel current, which is measured. Electrodes are provided that, given application of a potential thereto, effect an electrostatic compensation of the bending of the beam.
摘要翻译：通过蚀刻在硅衬底上产生加速度传感器，以留下多晶硅的悬臂梁，衬底上的尖端朝向该梁突出。传感器的加速度导致光束弯曲，从而改变尖端和光束之间的间距，从而也改变测量的隧道电流。提供电极，其给予施加电位以对光束的弯曲进行静电补偿。

8. 发明授权

US5358882A Method for manufacturing a bipolar transistor in a substrate 失效
标题翻译：在基板中制造双极晶体管的方法
公开(公告)号：US5358882A
公开(公告)日：1994-10-25
申请号：US030901
申请日：1993-03-15
申请人： Emmerich Bertagnolli , Helmut Klose
发明人： Emmerich Bertagnolli , Helmut Klose
IPC分类号： H01L29/73 , H01L21/331 , H01L21/74 , H01L29/732 , H01L21/265
CPC分类号： H01L29/66272 , H01L21/743 , H01L29/7325 , Y10S148/011
摘要： A method for producing a bipolar transistor completely surrounded by an insulating trench in a substrate. Insulating regions at the surface of the substrate can be produced by depositing an SiO.sub.2 layer on the basis of thermal decomposition of TEOS and subsequent structuring of the SiO.sub.2 layer. The insulating regions can be employed as a self-aligning mask for the production of a collector terminal and of a substrate terminal.
摘要翻译：一种完全由基板中的绝缘沟槽围绕的双极晶体管的制造方法。可以通过在TEOS的热分解和SiO 2层的结构化的基础上沉积SiO 2层来制造衬底表面的绝缘区域。绝缘区域可以用作用于生产集电极端子和衬底端子的自对准掩模。

9. 发明授权

US5326718A Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor 失效
标题翻译：用于制造衬底上的横向受限的单晶区域的方法及其用于制造MOS晶体管和双极晶体管的方法
公开(公告)号：US5326718A
公开(公告)日：1994-07-05
申请号：US950068
申请日：1992-09-23
申请人： Helmut Klose , Thomas Meister , Hans-Willi Meul , Reinhard Stengl
发明人： Helmut Klose , Thomas Meister , Hans-Willi Meul , Reinhard Stengl
IPC分类号： H01L21/76 , H01L21/20 , H01L21/331 , H01L21/336 , H01L29/73 , H01L29/732 , H01L29/78
CPC分类号： H01L29/66287 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02505 , H01L21/02532 , H01L21/02639 , H01L29/66651 , Y10S148/011
摘要： A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor.
摘要翻译：一种用于制造适合用作晶体管的有源部分的横向受限的单晶区域的方法。

10. 发明申请

US20050270826A1 Semiconductor memory device and method for producing a semiconductor memory device 审中-公开
标题翻译：半导体存储器件及半导体存储器件的制造方法
公开(公告)号：US20050270826A1
公开(公告)日：2005-12-08
申请号：US11137778
申请日：2005-05-26
申请人： Thomas Mikolajick , Wolfgang Werner , Helmut Klose , Hyang-Sook Klose , Jan Klose
发明人： Thomas Mikolajick , Wolfgang Werner , Helmut Klose , Hyang-Sook Klose , Jan Klose
IPC分类号： H01L27/24 , H01L45/00 , G11C11/00
CPC分类号： H01L45/1293 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/122 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16 , H01L45/1683
摘要： A semiconductor memory device with a phase transformation memory effect includes at least one memory element in a semiconductor substrate, and a cavity arrangement including at least one cavity in spatial proximity to the respective memory element. The cavity is in spatial arrangement with the respective memory element so as to reduce thermal coupling of the respective memory element to the areas surrounding the memory element, which also reduces the thermal conductivity between memory element and the areas surrounding the memory element.
摘要翻译：具有相变存储器效应的半导体存储器件包括半导体衬底中的至少一个存储器元件，以及包括至少一个空腔中相应于存储器元件的空腔的腔体结构。空腔与相应的存储元件处于空间上，以便减少相应存储元件与存储元件周围区域的热耦合，这也降低了存储元件与存储元件周围区域之间的热导率。

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