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1. 发明授权

US5882963A Method of manufacturing semiconductor components 失效
标题翻译：制造半导体元件的方法
公开(公告)号：US5882963A
公开(公告)日：1999-03-16
申请号：US910055
申请日：1997-08-12
申请人： Martin Kerber , Helmut Klose , Andreas Vom Felde
发明人： Martin Kerber , Helmut Klose , Andreas Vom Felde
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/768 , H01L23/522 , H01L21/44
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002
摘要： A method of manufacturing a semiconductor component, wherein capacitances occurring between contacts, interconnects or metallizations are reduced by filling cavities with air or gas is provided. The cavities are produced between the semiconductor material and a passivation layer in a region wherein the interconnects are surrounded by dielectric and are subsequently closed by a further passivation layer.
摘要翻译：提供了制造半导体部件的方法，其中通过用空气或气体填充空腔来减少在触点，互连或金属化之间出现的电容。在半导体材料和钝化层之间产生空腔，其中互连由电介质围绕并且随后被另外的钝化层封闭。

2. 发明授权

US5801428A MOS transistor for biotechnical applications 失效
标题翻译： MOS晶体管用于生物技术应用
公开(公告)号：US5801428A
公开(公告)日：1998-09-01
申请号：US864822
申请日：1997-05-29
申请人： Andreas Vom Felde , Emmerich Bertagnolli , Martin Kerber
发明人： Andreas Vom Felde , Emmerich Bertagnolli , Martin Kerber
IPC分类号： G01N27/414 , G01N27/327 , G01N33/487 , G06N3/00 , H01L29/78 , H01L27/14
CPC分类号： B82Y10/00 , G01N33/48728 , G06N3/002 , G01N27/414 , H01L2924/0002
摘要： An MOS transistor has a gate electrode is electrically conductively connected to an exposed contact area (pad). The contact area is electrochemically corrosion-resistant and is dimensioned for connection to a living cell. The surface topology is relatively flat and the surface, with the exception of the contact area, is protected with a dielectric passivation layer.
摘要翻译：具有栅电极的MOS晶体管导电地连接到暴露的接触区域（焊盘）。接触区域是电化学耐腐蚀的，其尺寸用于连接到活细胞。表面拓扑相对平坦，除了接触面积之外，表面被电介质钝化层保护。

3. 发明授权

US5587599A Bipolar transistor and manufacturing method 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：US5587599A
公开(公告)日：1996-12-24
申请号：US449213
申请日：1995-05-23
申请人： Reinhard Mahnkopf , Andreas Vom Felde
发明人： Reinhard Mahnkopf , Andreas Vom Felde
IPC分类号： H01L29/73 , H01L21/331 , H01L21/8222 , H01L21/8248 , H01L21/8249 , H01L27/06 , H01L27/12 , H01L29/76 , H01L21/265
CPC分类号： H01L29/66265 , H01L27/0623
摘要： Bipolar transistor, potentially with monolithically integrated MOSFETs, in the body silicon layer having a thickness of approximately 0.6 .mu.m in a SOI substrate, have a collector region and a base region that are produced by implantation. An oxide layer provided for the gate oxide of the MOSFETs is applied surface-wide and is partially removed in the region of the bipolar transistor, a polysilicon layer (5) also employed for the gate electrodes of the MOSFETs is applied and structured. Implantation for highly doped termination regions (5, 10, 12) for emitter, base and collector ensue with masks (13). An emitter region (8) is driven out of the highly doped polysilicon layer as terminal region for the emitter in a temperature step. The doping degree of the collector region, as lowest doped region, can be selected so light that the collector region is completely depleted. The function corresponds to a vertical bipolar transistor with a lateral collector space-charged zone.
摘要翻译：在SOI衬底中具有约0.6μm厚度的体硅层中的潜在地具有单片集成MOSFET的双极晶体管具有通过注入产生的集电极区域和基极区域。为MOSFET的栅极氧化物提供的氧化物层被施加在表面宽度上，并且在双极晶体管的区域中部分地去除，并且还应用并构造了也用于MOSFET的栅电极的多晶硅层（5）。用于发射器，基极和集电极的高掺杂终止区域（5,10,12）的植入物随着掩模（13）而发生。在温度步骤中，发射极区域（8）从高掺杂多晶硅层作为发射极的端子区域被驱出。作为最低掺杂区域的集电极区域的掺杂度可以如此选择，使得集电极区域完全耗尽。该功能对应于具有横向收集器空间带电区域的垂直双极晶体管。

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