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1. 发明授权

US06251717B1 Viable memory cell formed using rapid thermal annealing 有权
标题翻译：使用快速热退火形成的可行存储单元
公开(公告)号：US06251717B1
公开(公告)日：2001-06-26
申请号：US09163315
申请日：1998-09-30
申请人： Mark Ramsbey , Daniel Sobek , Nicholas H. Trispas
发明人： Mark Ramsbey , Daniel Sobek , Nicholas H. Trispas
IPC分类号： H01L218242
CPC分类号： H01L27/11521 , H01L27/115
摘要： A method for forming viable floating gate memory cells in a semiconductor substrate. At various points within the memory cell manufacturing process rapid thermal annealing is used to repair any damage that may be caused to the crystals in the substrate by various processing steps. By quickly repairing any damage to the crystals of the substrate, the rate and amount of overall transient enhanced diffusion of the various dopants within the substrate can be greatly reduced, thereby allowing the production of a viable memory cell. Specifically, the present invention uses rapid thermal annealing during and following the formation of the source and drain regions and the interconnection regions effecting electrical connection between the source regions. This desensitizes the erase rates of the semiconductor device to the etching conditions employed to form the connections.
摘要翻译：一种用于在半导体衬底中形成可行浮栅存储器单元的方法。在存储单元制造过程中的各个点，使用快速热退火来通过各种处理步骤修复可能对基板中的晶体造成的任何损坏。通过快速修复对基板的晶体的任何损坏，可以大大降低衬底内的各种掺杂剂的总体瞬态增强扩散的速率和量，从而允许生产可行的存储单元。具体地说，本发明在形成源极区和漏极区之间和之后使用快速热退火以及实现源区之间的电连接的互连区。这使得半导体器件的擦除速率与用于形成连接的蚀刻条件脱敏。

2. 发明申请

US20080251383A1 Microfluidic Liquid Stream Configuration System 有权
标题翻译：微流体液流配置系统
公开(公告)号：US20080251383A1
公开(公告)日：2008-10-16
申请号：US12064630
申请日：2006-08-23
申请人： Daniel Sobek , Jun Zeng
发明人： Daniel Sobek , Jun Zeng
IPC分类号： G01N27/00
CPC分类号： B01L3/502792 , B01L3/50273 , B01L3/502738 , B01L2300/0645 , B01L2300/069 , B01L2300/089 , B01L2400/0415 , B01L2400/0448 , B01L2400/06 , F04B19/006 , G01N33/4905
摘要： A microfluidic liquid stream configuration system is provided including providing a substrate; forming a first co-planar electrode and a second co-planar electrode on the substrate; applying a dielectric layer, with a controlled surface energy, on the first co-planar electrode and the second co-planar electrode; forming an input reservoir on the first co-planar electrode and a second co-planar electrode; supplying a liquid in the input reservoir for analysis; and imposing an electric field, an electric field gradient, or a combination thereof on the liquid for respectively driving surface charge or dipole moments in the liquid for configuring a liquid stream.
摘要翻译：提供了一种微流体液流配置系统，包括提供基板; 在所述基板上形成第一共面电极和第二共面电极; 在所述第一共平面电极和所述第二共面电极上施加具有受控表面能的电介质层; 在所述第一共平面电极和第二共面电极上形成输入容器; 在输入容器中供应液体进行分析; 并在液体上施加电场，电场梯度或其组合，以分别驱动用于构成液体流的液体中的表面电荷或偶极矩。

3. 发明授权

US07173240B2 Electrospray devices for mass spectrometry 有权
标题翻译：用于质谱的电喷雾装置
公开(公告)号：US07173240B2
公开(公告)日：2007-02-06
申请号：US11001268
申请日：2004-11-30
申请人： Karen L. Seaward , Hongfeng Yin , Kevin P. Killeen , Daniel Sobek , Daniel Roitman
发明人： Karen L. Seaward , Hongfeng Yin , Kevin P. Killeen , Daniel Sobek , Daniel Roitman
IPC分类号： H01J49/10
CPC分类号： H01J49/167 , G01N30/7266
摘要： An electrospray device for a mass spectrometry system is described. The electrospray device comprises a body portion and a tip portion extending from the body portion. The tip portion comprises a polymeric material. The electrospray device also comprises a hydrophobic coating substantially selectively covering the tip portion.
摘要翻译：描述了用于质谱系统的电喷雾装置。电喷雾装置包括主体部分和从主体部分延伸的尖端部分。尖端部分包括聚合材料。电喷雾装置还包括基本上选择性地覆盖尖端部分的疏水涂层。

4. 发明申请

US20060102862A1 Electrostatic sealing device and method of use thereof 审中-公开
标题翻译：静电密封装置及其使用方法
公开(公告)号：US20060102862A1
公开(公告)日：2006-05-18
申请号：US11318994
申请日：2005-12-27
申请人： Daniel Sobek
发明人： Daniel Sobek
IPC分类号： F16K31/02
CPC分类号： F04B43/12 , B01L3/502707 , B01L3/50273 , B01L3/502738 , B01L2200/0689 , B01L2300/0887 , B01L2300/123 , B01L2400/0481 , B01L2400/0655 , B29C65/008 , B29C65/76 , B29C66/1122 , B29C66/12443 , B29C66/53461 , B29C66/54 , B29C66/5412 , B29C66/71 , B29L2031/756 , B81B2201/058 , B81C3/001 , F04B43/043 , F16K99/0001 , B29K2083/00 , B29K2081/06 , B29K2077/00 , B29K2075/00 , B29K2069/00 , B29K2033/12 , B29K2033/08 , B29K2027/18 , B29K2027/12 , B29K2027/06 , B29K2023/38 , B29K2023/12 , B29K2021/00
摘要： A microfluidic structure having an electrostatic sealing device is disclosed. The electrostatic sealing device includes a first electrode and a second electrode opposite the first electrode. At least one of the electrodes has an elastic layer facing the other electrode. The second electrode is capable of moving toward the first electrode and forming a seal with the first electrode in response to a voltage difference between the two electrodes. The electrostatic sealing device eliminates the need for mechanical components that are traditionally used for generating a mechanical force between two components of a microfluidic structure and thus reduces complexity of the microfluidic structure and possible interference with optical interrogation of the microfluidic structure. Moreover, the seal can be established or removed simply by turning the voltage on or off. The electrostatic sealing device can also be used as a valve, a pump, or a combination thereof, to control fluid flow in the microchannels of a microfluidic structure.
摘要翻译：公开了一种具有静电密封装置的微流体结构。静电密封装置包括与第一电极相对的第一电极和第二电极。至少一个电极具有面向另一个电极的弹性层。第二电极能够朝着第一电极移动并且响应于两个电极之间的电压差而与第一电极形成密封。静电密封装置消除了对传统上用于在微流体结构的两个部件之间产生机械力的机械部件的需要，并且因此降低了微流体结构的复杂性以及对微流体结构的光询问的可能干扰。此外，通过打开或关闭电压，可以简单地建立或移除密封。静电密封装置也可以用作阀，泵或其组合，以控制微流体结构的微通道中的流体流动。

5. 发明授权

US07022982B2 Ion source frequency feedback device and method 失效
标题翻译：离子源频率反馈装置及方法
公开(公告)号：US07022982B2
公开(公告)日：2006-04-04
申请号：US10896981
申请日：2004-07-23
申请人： Daniel Sobek , Jing Cai , Kevin Killeen , Hongfeng Yin
发明人： Daniel Sobek , Jing Cai , Kevin Killeen , Hongfeng Yin
IPC分类号： H01J49/10
CPC分类号： H01J49/165
摘要： An ion source for an analytical instrument is described. The ion source comprises a capillary tip and counter-electrode interface and a feedback loop control device connected to the capillary tip and counter-electrode interface. The feedback loop control device comprises a transimpedance amplifier, a DC de-coupler, a frequency to voltage converter, a controller, and a voltage-controlled high-voltage power supply that provides a tip to counter-electrode voltage to the capillary tip and counter-electrode interface. The feedback loop control device measures the modulation frequency of ionization currents and provides a feedback adjustment of the tip-to-counter-electrode voltage to maintain ionization efficiency.
摘要翻译：描述了用于分析仪器的离子源。离子源包括毛细管尖端和对电极界面以及连接到毛细管尖端和对电极界面的反馈回路控制装置。反馈回路控制装置包括跨阻抗放大器，直流去耦合器，频率 - 电压转换器，控制器和电压控制的高压电源，其提供针对毛细管尖端和计数器的对电极电压的尖端电极接口。反馈回路控制装置测量电离电流的调制频率，并提供端对电极电压的反馈调整，以维持电离效率。

6. 发明申请

US20060011548A1 Mobile phase gradient generation microfluidic device 有权
公开(公告)号：US20060011548A1
公开(公告)日：2006-01-19
申请号：US11224904
申请日：2005-09-12
申请人： Hongfeng Yin , Kevin Killeen , Daniel Sobek
发明人： Hongfeng Yin , Kevin Killeen , Daniel Sobek
IPC分类号： B01D15/08
CPC分类号： G01N30/34 , G01N30/6095 , G01N2030/201 , G01N2030/202 , G01N2030/285
摘要： The present invention relates to a microfluidic device for separating the components of a fluid sample. A cover plate is arranged over the first surface of a substrate, which, in combination with a microchannel formed in the first surface, defines a separation conduit for separating the components of the fluid sample. An inlet port in fluid communication with the separation conduit allows a mobile phase containing a gradient of a selected mobile-phase component to be introduced from an integrated gradient-generation means to the separation conduit. A method is also provided for separating the components of a fluid sample using a mobile phase containing a gradient of a selected mobile-phase component, wherein the gradient is generated within a small volume of mobile phase.

7. 发明申请

US20050098750A1 Electrostatic sealing device and method of use thereof 审中-公开
标题翻译：静电密封装置及其使用方法
公开(公告)号：US20050098750A1
公开(公告)日：2005-05-12
申请号：US10701502
申请日：2003-11-06
申请人： Daniel Sobek
发明人： Daniel Sobek
IPC分类号： B01L3/00 , B81B1/00 , B81C3/00 , F04B19/00 , F04B43/04 , F04B43/12 , F15C5/00 , F16K31/02
CPC分类号： F04B43/12 , B01L3/502707 , B01L3/50273 , B01L3/502738 , B01L2200/0689 , B01L2300/0887 , B01L2300/123 , B01L2400/0481 , B01L2400/0655 , B29C65/008 , B29C65/76 , B29C66/1122 , B29C66/12443 , B29C66/53461 , B29C66/54 , B29C66/5412 , B29C66/71 , B29L2031/756 , B81B2201/058 , B81C3/001 , F04B43/043 , F16K99/0001 , B29K2083/00 , B29K2081/06 , B29K2077/00 , B29K2075/00 , B29K2069/00 , B29K2033/12 , B29K2033/08 , B29K2027/18 , B29K2027/12 , B29K2027/06 , B29K2023/38 , B29K2023/12 , B29K2021/00
摘要： A microfluidic structure having an electrostatic sealing device is disclosed. The electrostatic sealing device includes a first electrode and a second electrode opposite the first electrode. At least one of the electrodes has an elastic layer facing the other electrode. The second electrode is capable of moving toward the first electrode and forming a seal with the first electrode in response to a voltage difference between the two electrodes. The electrostatic sealing device eliminates the need for mechanical components that are traditionally used for generating a mechanical force between two components of a microfluidic structure and thus reduces complexity of the microfluidic structure and possible interference with optical interrogation of the microfluidic structure. Moreover, the seal can be established or removed simply by turning the voltage on or off. The electrostatic sealing device can also be used as a valve, a pump, or a combination thereof, to control fluid flow in the microchannels of a microfluidic structure.
摘要翻译：公开了一种具有静电密封装置的微流体结构。静电密封装置包括与第一电极相对的第一电极和第二电极。至少一个电极具有面向另一个电极的弹性层。第二电极能够朝着第一电极移动并且响应于两个电极之间的电压差而与第一电极形成密封。静电密封装置消除了对传统上用于在微流体结构的两个部件之间产生机械力的机械部件的需要，并且因此降低了微流体结构的复杂性以及对微流体结构的光询问的可能干扰。此外，通过打开或关闭电压，可以简单地建立或移除密封。静电密封装置也可以用作阀，泵或其组合，以控制微流体结构的微通道中的流体流动。

8. 发明授权

US06518072B1 Deposited screen oxide for reducing gate edge lifting 有权
标题翻译：沉积的屏幕氧化物，用于减少门边缘提升
公开(公告)号：US06518072B1
公开(公告)日：2003-02-11
申请号：US09476906
申请日：2000-01-03
申请人： Carl Robert Huster , Daniel Sobek , Timothy Thurgate , Sameer S. Haddad
发明人： Carl Robert Huster , Daniel Sobek , Timothy Thurgate , Sameer S. Haddad
IPC分类号： H01L218247
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324
摘要： A method of manufacturing a flash memory device with a controllable amount of gate edge lifting including etching the ends of the tunnel oxide forming a cavity at each end of the tunnel oxide and anisotropically depositing and etching an oxide to form spacers on the sides of the gate stack. The spacers have a predetermined thickness that controls the amount of gate edge lifting. The predetermined thickness is determined during a characterization procedure that can be a computer modeling procedure or it can be determined empirically.
摘要翻译：一种制造具有可控量的栅极边缘提升的闪速存储器件的方法，包括蚀刻隧道氧化物的端部，在隧道氧化物的每一端处形成空腔，并各向异性沉积和蚀刻氧化物以在栅极的侧面上形成间隔物堆栈间隔物具有控制浇口边缘提升量的预定厚度。在可以是计算机建模过程的表征过程中确定预定厚度，或者可以凭经验确定。

9. 发明授权

US06410956B1 Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices 有权
标题翻译：使用间隔物补偿植入物损伤并减少闪存装置中的横向扩散的方法和系统
公开(公告)号：US06410956B1
公开(公告)日：2002-06-25
申请号：US09478864
申请日：2000-01-07
申请人： Vei-Han Chan , Scott D. Luning , Mark Randolph , Nicholas H. Tripsas , Daniel Sobek , Janet Wang , Timothy J. Thurgate , Sameer Haddad
发明人： Vei-Han Chan , Scott D. Luning , Mark Randolph , Nicholas H. Tripsas , Daniel Sobek , Janet Wang , Timothy J. Thurgate , Sameer Haddad
IPC分类号： H01L2976
CPC分类号： H01L29/66825
摘要： A system and method for providing a memory cell on a semiconductor is disclosed. In one aspect, the method and system include providing at least one gate stack on the semiconductor, depositing at least one spacer, and providing at least one source implant in the semiconductor. The at least one gate stack has an edge. A portion of the at least one spacer is disposed along the edge of the at least one gate stack. In another aspect, the method and system include providing at least one gate stack on the semiconductor, providing a first junction implant in the semiconductor, depositing at least one spacer, and providing a second junction implant in the semiconductor after the at least one spacer is deposited. The at least one gate stack has an edge. A portion of the at least one spacer is disposed at the edge of the at least one gate stack. In a third aspect, the method and system include providing at least one gate stack on the semiconductor, providing at least one source implant in the semiconductor, depositing at least one spacer after the at least one source implant is provided, and providing at least one drain implant in the semiconductor after the spacer is deposited. The at least one gate has an edge. A portion of the at least one spacer is disposed along the edge of the at least one gate.
摘要翻译：公开了一种在半导体上提供存储单元的系统和方法。在一个方面，所述方法和系统包括在半导体上提供至少一个栅极堆叠，沉积至少一个间隔物，以及在半导体中提供至少一个源极注入。至少一个栅极堆叠具有边缘。所述至少一个间隔物的一部分沿着所述至少一个栅极叠层的边缘设置。在另一方面，该方法和系统包括在半导体上提供至少一个栅极叠层，在半导体中提供第一结注入，沉积至少一个间隔物，以及在至少一个间隔物之后在半导体中提供第二结注入存放至少一个栅极堆叠具有边缘。所述至少一个间隔件的一部分设置在所述至少一个栅极叠层的边缘处。在第三方面，所述方法和系统包括在半导体上提供至少一个栅极堆叠，在半导体中提供至少一个源极注入，在提供至少一个源极植入之后沉积至少一个间隔物，并且提供至少一个在间隔物沉积之后在半导体中的漏极注入。至少一个门具有边缘。所述至少一个间隔物的一部分沿着所述至少一个栅极的边缘设置。

10. 发明授权

US06268624B1 Method for inhibiting tunnel oxide growth at the edges of a floating gate during semiconductor device processing 有权
标题翻译：在半导体器件处理期间抑制浮栅的边缘处的隧道氧化物生长的方法
公开(公告)号：US06268624B1
公开(公告)日：2001-07-31
申请号：US09364982
申请日：1999-07-31
申请人： Daniel Sobek , Timothy Thurgate , Carl R. Huster , Tuan Duc Pham , Mark T. Ramsbey , Sameer S. Haddad
发明人： Daniel Sobek , Timothy Thurgate , Carl R. Huster , Tuan Duc Pham , Mark T. Ramsbey , Sameer S. Haddad
IPC分类号： H01L218247
CPC分类号： H01L21/28273
摘要： A method for making a ULSI MOSFET chip includes forming a MOSFET gate stack on a substrate, with a tunnel oxide layer being sandwiched between the gate stack and substrate. To prevent thickening of the tunnel oxide layer into a “gate edge lifting” profile during subsequent oxidation-causing steps, at least one protective barrier film is deposited or grown over the gate stack and tunnel oxide layer immediately after gate stack formation. Then, subsequent steps, including forming source and drain regions for the gate stack, can be undertaken without causing thickening of the tunnel oxide layer.
摘要翻译：制造ULSI MOSFET芯片的方法包括在衬底上形成MOSFET栅极叠层，其中隧道氧化层夹在栅叠层和衬底之间。为了防止隧道氧化物层在随后的氧化引发步骤期间增厚到“栅极边缘提升”轮廓中，在栅极堆叠形成之后立即沉积或生长至少一个保护性阻挡膜在栅极堆叠和隧道氧化物层上。然后，可以进行包括形成栅极堆叠的源极和漏极区域的后续步骤，而不会导致隧道氧化物层的增厚。

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