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1. 发明授权

US5933765A Communication device having a reduced level of hazardous substances 失效
标题翻译：具有降低的有害物质含量的通信装置
公开(公告)号：US5933765A
公开(公告)日：1999-08-03
申请号：US727330
申请日：1996-10-08
申请人： Mark D. Newton , Steven D. Pratt , Sivakumar Muthuswamy , Kimberly A. Williams , Thomas J. Swirbel , James Lynn Davis , Lara J. Martin , Robert J. Mulligan , Kevin J. Pieper , Brian H. Lee , Roger K. Callanan
发明人： Mark D. Newton , Steven D. Pratt , Sivakumar Muthuswamy , Kimberly A. Williams , Thomas J. Swirbel , James Lynn Davis , Lara J. Martin , Robert J. Mulligan , Kevin J. Pieper , Brian H. Lee , Roger K. Callanan
IPC分类号： H04B1/38
CPC分类号： H04M1/0202 , H04M1/18 , H04B1/3827
摘要： A communication device is designed to contain the lowest possible level of toxic or hazardous materials, so that when it is eventually disposed of, it will not harm the environment and can be safely recycled. Each component A.sub.1, A.sub.2, . . . , A.sub.n in the communication device has a calculated Component Toxicity Index value. A Product Toxicity Index for the entire communication device is calculated by summing the individual Component Toxicity Index values. The desired outcome is a communication device having a Product Toxicity Index less than or equal to 100. The resulting communication device is referred to as "environmentally friendly". The communication device may be a two-way radio (10), and some of the components are a radio transmitter (12), a radio receiver (14), an antenna (16), an amplifier (18), a battery (20) and a housing (22).
摘要翻译：通信设备被设计为包含最低可能级别的有毒或有害物质，以便在最终被处置时不会对环境造成伤害并可以安全回收。每个组件A1，A2，。。。通信设备中的An具有计算出的组分毒性指数值。通过对各个组分毒性指数值求和来计算整个通信设备的产品毒性指数。期望的结果是具有小于或等于100的产品毒性指数的通信设备。所得到的通信设备被称为“环境友好”。通信设备可以是双向无线电（10），并且一些组件是无线电发射机（12），无线电接收机（14），天线（16），放大器（18），电池（20））和壳体（22）。

2. 发明授权

US5328728A Process for manufacturing liquid crystal device substrates 失效
标题翻译：液晶装置基板的制造方法
公开(公告)号：US5328728A
公开(公告)日：1994-07-12
申请号：US993535
申请日：1992-12-21
申请人： Thomas J. Swirbel , Melanie Williams , Robert J. Mulligan
发明人： Thomas J. Swirbel , Melanie Williams , Robert J. Mulligan
IPC分类号： G02F1/1339 , B05D5/06
CPC分类号： G02F1/13392 , Y10T29/49002
摘要： A process for manufacturing a substrate (12) used in a device (10) for containing a liquid crystal fluid (30) between two spaced electrodes. A plurality of spacers (35) is distributed on a first surface of a substrate by coating the first surface with an admixture of spacers dispersed in a liquid (36). The admixture is agitated during the applications step in order to maintain a uniform dispersion of the spacers in the liquid. The liquid is then evaporated from the substrate surface, leaving a plurality of spacers distributed on the substrate. Preferably, an ester alcohol dispersant is employed in the admixture in order to facilitate dispersion of the spacers in the liquid. Ultrasonics are preferred as the means of agitating the admixture during application. Ultrasonic energy can also be applied to the substrate during application of the admixture to the substrate. Ultrasonic energy can also be applied to the admixture at the point of application (44) of the admixture onto the substrate.
摘要翻译：一种在装置（10）中使用的用于在两个间隔开的电极之间容纳液晶流体（30）的基板（12）的制造方法。通过用分散在液体（36）中的间隔物的混合物涂覆第一表面，将多个间隔物（35）分布在基板的第一表面上。在施加步骤期间搅拌混合物以保持间隔物在液体中的均匀分散。然后从基板表面蒸发液体，留下分布在基板上的多个间隔物。优选地，在混合物中使用酯醇分散剂，以促进间隔物在液体中的分散。作为在施用期间搅拌混合物的手段，超声波是优选的。在将外加剂应用于基材时，也可以将超声波能量施加到基材上。也可以在混合物施加到基底上的掺合物（44）上施加超声波能量。

3. 发明授权

US06990734B2 Methods for shielding one or more circuit of a printed circuit board 有权
标题翻译：屏蔽印刷电路板的一个或多个电路的方法
公开(公告)号：US06990734B2
公开(公告)日：2006-01-31
申请号：US10263006
申请日：2002-10-02
申请人： Jeffrey A. Underwood , John K. Arledge , Thomas J. Swirbel , Joaquin Barreto
发明人： Jeffrey A. Underwood , John K. Arledge , Thomas J. Swirbel , Joaquin Barreto
IPC分类号： H05K3/34
CPC分类号： H05K1/0218 , H01L2223/6622 , H05K1/0221 , H05K1/0222 , H05K1/113 , H05K3/4644 , H05K9/0039 , H05K2201/0715 , H05K2201/09036 , H05K2201/09509 , H05K2201/09809 , H05K2201/09972 , H05K2201/09981 , H05K2201/10553 , H05K2201/10969 , Y10T29/49117 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49156
摘要： Methods for forming a metal shield on a printed circuit board (10) include depositing a first layer of metal (41) on a substrate (22) of the printed circuit board (10), depositing a first layer of dielectric material (42) on the first layer of metal (41), printing one or more circuits (21, 21′) on the first dielectric layer (42), depositing a second layer of dielectric material (43) over the one or more printed circuits (21, 21′), forming a trench-like opening (44) in the two layers of dielectric material (42, 43) surrounding the one or more printed circuits (21, 21′) so that the metal of the first layer (41) is exposed by the trench-like opening (44), depositing a second layer of metal (27) on the second layer of dielectric material (43) such that the second layer of metal (27) plates the trench-like opening (44) and makes electrical contact with the first metal layer (41).
摘要翻译：在印刷电路板（10）上形成金属屏蔽的方法包括在印刷电路板（10）的基板（22）上沉积第一金属层（41），将第一层介电材料（42）沉积在所述第一金属层（41），在所述第一介电层（42）上印刷一个或多个电路（21,21'），在所述一个或多个印刷电路（21,21）上沉积第二介电材料层 '），在围绕所述一个或多个印刷电路（21,21'）的两层介电材料（42,43）中形成沟槽状开口（44），使得第一层（41）的金属暴露通过所述沟槽状开口（44），在所述第二介电材料层（43）上沉积第二金属层（27），使得所述第二金属层（27）平坦化所述沟槽状开口（44）并使与第一金属层（41）电接触。

4. 发明授权

US6091194A Active matrix display 失效
标题翻译：主动矩阵显示
公开(公告)号：US6091194A
公开(公告)日：2000-07-18
申请号：US926627
申请日：1997-09-10
申请人： Thomas J. Swirbel , Patrick M. Dunn
发明人： Thomas J. Swirbel , Patrick M. Dunn
IPC分类号： H01L27/32 , H05B33/14
CPC分类号： H01L27/3253
摘要： A flat panel display (10) uses active matrix addressing. Two parallel substrates (20, 30) have an organic electroluminescent medium (40) that emits visible light in response to an electrical signal, sandwiched between them. The top substrate is transparent to allow emitted light (50) to be discernible to an observer. The bottom substrate does not need to be transparent, as the active matrix display operates in a emissive or reflective mode. An array of electrodes (22) is situated on an inside face of the bottom substrate, and a transparent electrode (32) corresponding to the array is situated on an inside face of the top substrate. The electrodes serve to define an array of pixels. A number of switches (24) are located on the backside of the bottom substrate, and are each connected to respective electrodes (22) by an electrically conductive via (28) in the bottom substrate.
摘要翻译：平板显示器（10）使用有源矩阵寻址。两个平行的基板（20,30）具有有机电致发光介质（40），其响应于电信号发射可见光，夹在它们之间。顶部衬底是透明的，以允许发射光（50）对观察者可辨别。底部衬底不需要是透明的，因为有源矩阵显示器以发射或反射模式工作。电极阵列（22）位于底部基板的内表面上，并且对应于阵列的透明电极（32）位于顶部基板的内表面上。电极用于限定像素阵列。多个开关（24）位于底部基板的背面，并且各自通过底部基板中的导电通孔（28）连接到相应的电极（22）。

5. 发明授权

US5773198A Method of forming high resolution circuitry by depositing a polyvinyl alcohol layer beneath a photosensitive polymer layer 失效
标题翻译：通过在感光聚合物层下沉积聚乙烯醇层形成高分辨率电路的方法
公开(公告)号：US5773198A
公开(公告)日：1998-06-30
申请号：US660384
申请日：1996-06-07
申请人： Thomas J. Swirbel , Anthony B. Suppelsa , Joaquin Barreto
发明人： Thomas J. Swirbel , Anthony B. Suppelsa , Joaquin Barreto
IPC分类号： G03F7/09 , H05K3/10 , G03C5/56
CPC分类号： H05K3/108 , G03F7/092 , H05K2203/0577 , H05K2203/0789 , Y10S438/95 , Y10S438/951
摘要： A method of forming a high resolution metal pattern on a substrate. A temporary polyvinyl alcohol (10) layer underneath the photoresist layer (20) aids in removing the photoresist layer after plating. The photoresist is photodelineated in conventional manner to form a pattern (40). During photodelineation, the developing process for the resist does not completely remove the PVA (45) that lies directly under the removed resist, but instead reveals those portions of the polyvinyl alcohol layer. The substrate is then rinsed in a hot aqueous solution to effect removal of the revealed PVA portions, now exposing portions (40) of the substrate (15). Metal (50) is then electroplated to build up a metal circuitry pattern. The remaining portions of the photoresist and the PVA are then removed by a hot aqueous solution.
摘要翻译：在基板上形成高分辨率金属图案的方法。在光致抗蚀剂层（20）下面的临时聚乙烯醇（10）层有助于在电镀后去除光致抗蚀剂层。光致抗蚀剂以常规方式光线照射以形成图案（40）。在光线照射期间，抗蚀剂的显影过程不能完全去除位于去除的抗蚀剂正下方的PVA（45），而是透露聚乙烯醇层的那些部分。然后将衬底在热水溶液中漂洗以实现所揭露的PVA部分的去除，现在暴露衬底（15）的部分（40）。然后电镀金属（50）以建立金属电路图案。然后通过热水溶液除去光致抗蚀剂和PVA的剩余部分。

6. 发明授权

US5591480A Method for fabricating metallization patterns on an electronic substrate 失效
标题翻译：在电子基板上制造金属化图案的方法
公开(公告)号：US5591480A
公开(公告)日：1997-01-07
申请号：US517392
申请日：1995-08-21
申请人： Douglas H. Weisman , Thomas J. Swirbel , John K. Arledge
发明人： Douglas H. Weisman , Thomas J. Swirbel , John K. Arledge
IPC分类号： G02F1/1345 , H01L21/48 , H03H3/08 , H05K3/06 , H05K3/24 , B05D5/12 , C23C14/00 , C25D5/02 , H01L21/465
CPC分类号： H05K3/243 , H01L21/4846 , H03H3/08 , G02F1/1345 , H05K2201/0326 , H05K2203/0384 , H05K2203/095 , H05K3/062 , H05K3/064
摘要： One method for fabricating solderable pads (406) onto a substrate (220) for direct chip attachment uses a multilayer metallization coating (500). The coating has a bottom layer (202) of indium-tin oxide, with an intermediate layer (204) of copper and a top layer (206) of indium-tin oxide. A masking layer (208) is deposited on the active display area (402) of the substrate, leaving the bonding pads uncovered. The revealed bonding pads are then plasma etched, using the polyimide as an etch resist, and the top layer of ITO is selectively removed to reveal the underlying copper layer. The exposed copper layer (204) is then plated with a solderable metal to the desired thickness to form bonding pads that may be used with direct chip attachment schemes.
摘要翻译：用于将可焊焊盘（406）制造到用于直接芯片附接的基板（220）上的一种方法使用多层金属化涂层（500）。涂层具有铟锡氧化物的底层（202），其中铜的中间层（204）和氧化铟锡的顶层（206）。掩模层（208）沉积在衬底的有源显示区域（402）上，留下焊盘未被覆盖。然后使用聚酰亚胺作为抗蚀剂，然后等离子体蚀刻所揭示的接合焊盘，并且选择性地去除ITO的顶层以露出下面的铜层。然后将暴露的铜层（204）用可焊接金属镀覆至所需厚度，以形成可与直接芯片附接方案一起使用的焊盘。

7. 发明授权

US5515191A Liquid crystal display having enhanced conductors and adhesive spacers 失效
标题翻译：液晶显示器具有增强的导体和粘合间隔物
公开(公告)号：US5515191A
公开(公告)日：1996-05-07
申请号：US251446
申请日：1994-05-31
申请人： Thomas J. Swirbel
发明人： Thomas J. Swirbel
IPC分类号： G02F1/1333 , G02F1/1339 , G02F1/1343
CPC分类号： G02F1/13394 , G02F1/133305
摘要： Briefly, according to the invention, there is provided a liquid crystal display device (LCD). The LCD has an electrode pattern (14) deposited on one side of a substrate (10). The pattern is formed in a series of elements or pixels (13), that are arranged in a regularly ordered matrix of rows and columns. Metal conductors (16) are also on the face of the substrate and are electrically connected to the electrode elements. A spacer material (27) is formed on metal conductors and a second substrate (10') is placed on the first substrate, and the two substrates are arranged so that a uniform gap (25) is maintained between the substrates by the spacer material. A liquid crystal material (29) is then disposed in the uniform gap. The spacer material can be a photoimaged adhesive, the electrode pattern can be indium/tin oxide, the metal conductors can be copper, and the metal conductors are located between the rows and columns of the plurality of elements in the electrode pattern.
摘要翻译：简而言之，根据本发明，提供了一种液晶显示装置（LCD）。 LCD具有沉积在基板（10）的一侧上的电极图案（14）。图案形成在一系列元件或像素（13）中，其被布置成行和列的规则排列的矩阵。金属导体（16）也位于基板的表面上并与电极元件电连接。间隔材料（27）形成在金属导体上，第二基板（10'）放置在第一基板上，并且两个基板被布置成使得通过间隔材料在基板之间保持均匀的间隙（25）。然后将液晶材料（29）设置在均匀间隙中。隔离材料可以是光刻胶粘剂，电极图案可以是铟/锡氧化物，金属导体可以是铜，并且金属导体位于电极图案中的多个元件的行和列之间。

8. 发明授权

US5395740A Method for fabricating electrode patterns 失效
标题翻译：电极图形制作方法
公开(公告)号：US5395740A
公开(公告)日：1995-03-07
申请号：US10224
申请日：1993-01-27
申请人： Thomas J. Swirbel , John K. Arledge , James L. Davis
发明人： Thomas J. Swirbel , John K. Arledge , James L. Davis
IPC分类号： G02F1/1343 , G03F7/00 , G03F7/20 , H01L27/32 , H01L51/52 , H05K3/04 , G03F7/26 , G03C5/16
CPC分类号： H05K3/048 , G02F1/13439 , G03F7/00 , G03F7/0035 , G03F7/2022 , H01L51/0021
摘要： A method of forming electrode patterns on a substrate. A transparent substrate (10) is patterned with a photoresist layer (14) on the front side so that portions (18) of the substrate are revealed. A metal oxide layer (12) is deposited on the patterned photoresist layer and the revealed portions of the substrate. The patterned photoresist layer is then exposed to actinic radiation (19) through the back side (25) of the transparent substrate. The photoresist pattern (20) is removed, carrying with it those portions of the metal oxide layer deposited on the photoresist layer, forming an electrode pattern (22) by a lift-off technique.
摘要翻译：在基板上形成电极图案的方法。透明基板（10）被图案化，在前侧具有光致抗蚀剂层（14），从而露出基板的部分（18）。金属氧化物层（12）沉积在图案化的光刻胶层和衬底的露出部分上。然后将图案化的光致抗蚀剂层通过透明基底的背面（25）暴露于光化辐射（19）。去除光致抗蚀剂图案（20），携带沉积在光致抗蚀剂层上的金属氧化物层的那些部分，通过剥离技术形成电极图案（22）。

9. 发明授权

US07579215B2 Method for fabricating a low cost integrated circuit (IC) package 失效
标题翻译：制造低成本集成电路（IC）封装的方法
公开(公告)号：US07579215B2
公开(公告)日：2009-08-25
申请号：US11694744
申请日：2007-03-30
申请人： Thomas J. Swirbel
发明人： Thomas J. Swirbel
IPC分类号： H01L21/56 , H01L21/60
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3135 , H01L23/525 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L2224/24227 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2224/82 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.
摘要翻译：一种用于制造低成本集成电路封装（600）的方法包括将经处理的硅晶片分离成多个单独的裸片（601），然后将裸片（603）定位在第二基板上，以便朝下放置以允许增加的裸片 I / O连接区域。用一种或多种环氧树脂材料覆盖（605）模具以形成一组嵌入式模具封装。然后裸片上的一个或多个焊盘暴露（615）并随后连接（617）到管芯I / O连接区域中的I / O连接。然后将每个模具从第二基板分离（619）形成单个嵌入的模具封装。该方法提供了使用晶片级封装和晶片级封装工艺的组合形成低成本，高密度集成电路封装的制造工艺。

10. 发明授权

US06653915B1 Coaxial transmission lines having grounding troughs on a printed circuit board 有权
标题翻译：同轴传输线在印刷电路板上具有接地槽
公开(公告)号：US06653915B1
公开(公告)日：2003-11-25
申请号：US09378351
申请日：1999-08-20
申请人： John K. Arledge , Joaquin Barreto , Thomas J. Swirbel , Jeffrey A. Underwood
发明人： John K. Arledge , Joaquin Barreto , Thomas J. Swirbel , Jeffrey A. Underwood
IPC分类号： H01P308
CPC分类号： H05K1/0221 , H01P11/005 , H05K3/0023 , H05K3/4644 , H05K2201/09036 , H05K2201/09809 , H05K2201/09981 , Y10T29/49016 , Y10T29/49117
摘要： A method of forming a coaxial transmission line on a high density PCB. A metal layer (102) on the PCB (104) forms the bottom part of the shield, and is covered by a first dielectric (112). Two parallel trenches (122) are formed in the first dielectric to reveal part (123) of the metal strip. The signal conductor (132) is then formed on the first dielectric. A second dielectric (142) covers the signal conductor and the first dielectric. A second set of two parallel trenches (172) are formed in the second dielectric immediately above the first two trenches. Metal deposit (182) is plated in the parallel trenches to contact the metal strip, and also covers a portion of the second dielectric that lies between the trenches, to create a shield. The resulting coaxial transmission line has a center conductor insulated from the shield by the dielectrics.
摘要翻译：一种在高密度PCB上形成同轴传输线的方法。 PCB（104）上的金属层（102）形成屏蔽的底部并被第一电介质（112）覆盖。在第一电介质中形成两个平行的沟槽（122），以露出金属条的部分（123）。信号导体（132）然后形成在第一电介质上。第二电介质（142）覆盖信号导体和第一电介质。第二组两个平行的沟槽（172）形成在紧邻第一两个沟槽上方的第二电介质中。金属沉积物（182）被电镀在平行的沟槽中以接触金属条，并且还覆盖位于沟槽之间的第二电介质的一部分以形成屏蔽。所得到的同轴传输线具有通过电介质与屏蔽层绝缘的中心导体。

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