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1. 发明申请

US20110171779A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20110171779A1
公开(公告)日：2011-07-14
申请号：US13071741
申请日：2011-03-25
申请人： Makoto Terui , Yasushi Shiraishi
发明人： Makoto Terui , Yasushi Shiraishi
IPC分类号： H01L21/58
CPC分类号： H01L23/42 , H01L23/3121 , H01L23/4334 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/167 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A BGA substrate which has a back surface to which a heat radiating plate is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.
摘要翻译：使用具有安装有散热板的背面的BGA基板和设置在其表面的中心的用于容纳中继布线基板的开口。将ASIC芯片和存储器芯片倒装连接到的中继布线基板通过导热接合材料接合到开口中的散热板。此外，ASIC芯片和存储芯片的每个后表面连接到金属盖，用于通过介于其间的导热材料密封开口。

2. 发明申请

US20080237846A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080237846A1
公开(公告)日：2008-10-02
申请号：US12052074
申请日：2008-03-20
申请人： Makoto Terui , Yasushi Shiraishi
发明人： Makoto Terui , Yasushi Shiraishi
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L23/42 , H01L23/3121 , H01L23/4334 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/167 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A BGA substrate which has a back surface to which a heat radiating plate 5 is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.
摘要翻译：使用具有安装有散热板5的背面的BGA基板和设置在其表面的中心的用于容纳中继布线基板的开口。将ASIC芯片和存储器芯片倒装连接到的中继布线基板通过导热接合材料接合到开口中的散热板。此外，ASIC芯片和存储芯片的每个后表面连接到金属盖，用于通过介于其间的导热材料密封开口。

3. 发明授权

US07932597B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07932597B2
公开(公告)日：2011-04-26
申请号：US12052074
申请日：2008-03-20
申请人： Makoto Terui , Yasushi Shiraishi
发明人： Makoto Terui , Yasushi Shiraishi
IPC分类号： H01L23/498
CPC分类号： H01L23/42 , H01L23/3121 , H01L23/4334 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/167 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A BGA substrate which has a back surface to which a heat radiating plate is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.
摘要翻译：使用具有安装有散热板的背面的BGA基板和设置在其表面的中心的用于容纳中继布线基板的开口。将ASIC芯片和存储器芯片倒装连接到的中继布线基板通过导热接合材料接合到开口中的散热板。此外，ASIC芯片和存储芯片的每个后表面连接到金属盖，用于通过介于其间的导热材料密封开口。

4. 发明申请

US20090203171A1 SEMICONDUCTOR DEVICE FABRICATING METHOD 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：US20090203171A1
公开(公告)日：2009-08-13
申请号：US12338534
申请日：2008-12-18
申请人： Kengo TAKEMASA , Makoto Terui , Yasushi Shiraishi , Junji Tsuchimoto
发明人： Kengo TAKEMASA , Makoto Terui , Yasushi Shiraishi , Junji Tsuchimoto
IPC分类号： H01L21/78
CPC分类号： H01L23/3128 , H01L21/561 , H01L21/6835 , H01L23/16 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/97 , H01L25/50 , H01L2221/68345 , H01L2224/16145 , H01L2224/16235 , H01L2224/32145 , H01L2224/45144 , H01L2224/48227 , H01L2224/73204 , H01L2224/81801 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06589 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/15151 , H01L2924/15153 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H01L2924/18161 , H01L2224/85 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor device fabricating method includes forming a plurality of semiconductor devices that include one semiconductor chip and a metal plate having an opening portion that surrounds a region where the semiconductor chip is provided, by cutting, at regions where a frame portion exists, a plate-shaped member that includes: a wiring layer including a wiring portion and an insulating portion; a plurality of semiconductor chips disposed on one surface of the wiring layer; a metal plate disposed at a surface of the wiring layer at a side at which the semiconductor chips are provided, and having a plurality of opening portions that surround regions where the semiconductor chips are provided and the frame portion that forms the opening portions; and a sealing resin layer provided so as to seal at least gaps between the semiconductor chips and the metal plate.
摘要翻译：一种半导体器件制造方法，包括通过在存在框架部分的区域处切割包括一个半导体芯片和具有围绕设置有半导体芯片的区域的开口部分的金属板来形成多个半导体器件，包括：布线层，包括布线部分和绝缘部分; 布置在所述布线层的一个表面上的多个半导体芯片; 金属板，设置在布线层的设置有半导体芯片的一侧的表面，并且具有围绕设置有半导体芯片的区域的多个开口部分和形成开口部分的框架部分; 以及密封树脂层，其设置成至少密封半导体芯片和金属板之间的间隙。

5. 发明授权

US08409930B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US08409930B2
公开(公告)日：2013-04-02
申请号：US13071741
申请日：2011-03-25
申请人： Makoto Terui , Yasushi Shiraishi
发明人： Makoto Terui , Yasushi Shiraishi
IPC分类号： H01L21/58
CPC分类号： H01L23/42 , H01L23/3121 , H01L23/4334 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L2224/16145 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/167 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A BGA substrate which has a back surface to which a heat radiating plate is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.
摘要翻译：使用具有安装有散热板的背面的BGA基板和设置在其表面的中心的用于容纳中继布线基板的开口。将ASIC芯片和存储器芯片倒装连接到的中继布线基板通过导热接合材料接合到开口中的散热板。此外，ASIC芯片和存储芯片的每个后表面连接到金属盖，用于通过介于其间的导热材料密封开口。

6. 发明授权

US08021562B2 Method for manufacturing a filter substrate, inkjet recording head, and method for manufacturing the inkjet recording head 有权
标题翻译：用于制造过滤器基板的方法，喷墨记录头以及用于制造喷墨记录头的方法
公开(公告)号：US08021562B2
公开(公告)日：2011-09-20
申请号：US12174559
申请日：2008-07-16
申请人： Masataka Kato , Makoto Terui , Ryoji Kanri
发明人： Masataka Kato , Makoto Terui , Ryoji Kanri
IPC分类号： G01D15/00 , G11B5/127 , B44C1/22 , C03C15/00 , C03C25/68 , H01L21/302 , H01L21/461 , C23F1/00
CPC分类号： B41J2/1639 , B41J2/1603 , B41J2/1623 , B41J2/1628 , B41J2/1631 , B41J2/1632 , B41J2/1635
摘要： A filter capable of separating or filtering micro foreign particles in a flow passage is provided. A first mask and a second mask are formed on a silicon substrate by dry etching. Before performing the dry etching, a resist of the first mask is subjected to a heat treatment performed at a temperature equal to or higher than a glass transition point. A resist of the second mask is not subjected to such a heat treatment. This processing simultaneously forms in the substrate a groove portion and a wall having a hole that is located in the groove portion. A silicon material located beneath a wide portion of the first mask remains as a wall portion separating the holes.
摘要翻译：提供了能够分离或过滤流路中的微小异物的过滤器。通过干蚀刻在硅衬底上形成第一掩模和第二掩模。在进行干蚀刻之前，对第一掩模的抗蚀剂进行在玻璃化转变点以上的温度下进行的热处理。第二掩模的抗蚀剂不进行这种热处理。这种处理在基板中同时形成有槽部分和具有位于槽部分中的孔的壁。位于第一掩模的宽部分下方的硅材料保留为分离孔的壁部分。

7. 发明授权

US07934810B2 Ink jet recording head including beams dividing supply ports 有权
标题翻译：喷墨记录头包括分配供应端口的光束
公开(公告)号：US07934810B2
公开(公告)日：2011-05-03
申请号：US12369259
申请日：2009-02-11
申请人： Kazuhiro Hayakawa , Makoto Terui
发明人： Kazuhiro Hayakawa , Makoto Terui
IPC分类号： B41J2/05
CPC分类号： B41J2/1631 , B41J2/14145 , B41J2/1603
摘要： An ink jet recording head has sufficient and uniform ink refill for all orifices and separate flow paths even though the substrate has high rigidity by dividing a supply port into a plurality of ports. The substrate of the ink jet recording head has a plurality of separate flow paths corresponding to discharge pressure generating elements, a common flow path communicating with the separate flow paths, an ink supply port communicating with the common flow path and supplying ink to the common flow path, and a plurality of beam portions dividing the ink supply port. A recess is formed on the common flow path, extending to the separate flow paths formed nearest to the beam portion.
摘要翻译：喷墨记录头对于所有孔和分离的流动路径具有足够且均匀的填充墨水，即使基板通过将供给口分成多个端口而具有高刚性。喷墨记录头的基板具有与排出压力产生元件相对应的多个单独的流路，与分开的流路连通的公共流路，与公共流路连通并将墨水供给到公共流路径和分割供墨口的多个光束部分。在公共流动路径上形成一个凹槽，延伸到最靠近梁部分形成的独立流动路径。

8. 发明授权

US07833608B2 Beam, ink jet recording head having beams, and method for manufacturing ink jet recording head having beams 有权
标题翻译：光束，具有光束的喷墨记录头，以及具有光束的喷墨记录头的制造方法
公开(公告)号：US07833608B2
公开(公告)日：2010-11-16
申请号：US11835746
申请日：2007-08-08
申请人： Takashi Ushijima , Takeo Yamazaki , Makoto Terui , Kazuhiro Hayakawa
发明人： Takashi Ushijima , Takeo Yamazaki , Makoto Terui , Kazuhiro Hayakawa
IPC分类号： B32B3/00 , B41J2/05
CPC分类号： B41J2/1603 , B41J2/14145 , B41J2/1623 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1632 , B41J2/1634 , B41J2/1642 , B41J2/1643 , B41J2/1646 , Y10T428/24331 , Y10T428/24479 , Y10T428/24562 , Y10T428/2457 , Y10T428/24612
摘要： A beam having a base material of silicon monocrystal and at least one projection which is integrally formed so as to be supported at least at one end thereof and which has two surfaces having an orientation plane (111), includes a bottom surface in a plane which is common with a plane of the base material; a groove penetrating from the bottom surface to a top of the projection; and a protecting member having a resistance property against a crystal anisotropic etching liquid and covering an inner wall of the groove.
摘要翻译：一种具有单晶硅基材和至少一个突起的光束，其一体地形成为至少在其一端被支撑并且具有两个具有取向平面（111）的表面，该平面包括在平面中的底表面与基材的平面相同; 从所述底表面到所述突起的顶部穿透的凹槽; 以及对结晶各向异性蚀刻液具有抵抗性并覆盖所述槽的内壁的保护构件。

9. 发明授权

US07687283B2 Method of producing a semiconductor device having a magnetic layer formed thereon 有权
标题翻译：制造其上形成有磁性层的半导体器件的方法
公开(公告)号：US07687283B2
公开(公告)日：2010-03-30
申请号：US11159145
申请日：2005-06-23
申请人： Makoto Terui
发明人： Makoto Terui
IPC分类号： H01L21/00
CPC分类号： H01L23/552 , H01L23/3114 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05569 , H01L2224/16 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/3025 , H01L2224/05599
摘要： A semiconductor device of a wafer level chip size package type is formed by cutting a semiconductor wafer with a plurality of semiconductor elements formed thereon in pieces. The semiconductor device includes a semiconductor substrate as the semiconductor wafer having a magnetic layer formed on at least one of a front surface and a backside surface of the semiconductor wafer.
摘要翻译：通过用形成有多个半导体元件的半导体晶片切割晶片级芯片尺寸封装形式的半导体器件。半导体器件包括作为半导体晶片的半导体衬底，其具有形成在半导体晶片的前表面和后侧表面中的至少一个上的磁性层。

10. 发明授权

US07026699B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07026699B2
公开(公告)日：2006-04-11
申请号：US10853662
申请日：2004-05-26
申请人： Noritaka Anzai , Makoto Terui
发明人： Noritaka Anzai , Makoto Terui
IPC分类号： H01L29/82
CPC分类号： H01L23/5227 , H01L23/3114 , H01L2924/0002 , Y10T29/49073 , H01L2924/00
摘要： In a semiconductor device having a WCSP type construction package, to increase inductance without increasing further an area conventionally occupied by a coil. A pseudo-post part 27 comprising a magnetic body is extended in a direction perpendicular to a main surface 12a of a semiconductor chip 12, on a second insulating layer 21 of a WCSP 10. A first conductive part 15a and a second conductive part 15b constructed as square frames are respectively provided so as to surround the pseudo-post part, on respective top surfaces of a second insulation layer and a third insulating layer 22 which are separated parallel to each other, in an extension direction of the pseudo-post part. A coil 100 being a substantially spiral shape conductive path is formed from, the first conductive part, the second conductive part, and a connection part 26 which electrically connects the one ends of the first and second conductive parts.
摘要翻译：在具有WCSP型结构封装的半导体器件中，增加电感而不增加线圈通常占用的面积。在WCSP10的第二绝缘层21上，包括磁性体的假立柱部分27在垂直于半导体芯片12的主表面12a的方向上延伸。分别设置有构成方框的第一导电部分15a和第二导电部分15b，以便在第二绝缘层和第三绝缘层22的相应顶表面上包围假立柱部分，第二绝缘层和第三绝缘层22平行于彼此在假后部分的延伸方向上。第一导电部分，第二导电部分和电连接第一和第二导电部分的一端的连接部分26形成大致螺旋形的导电路径的线圈100。

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