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1. 发明授权

US08054871B2 Semiconductor device and semiconductor integrated circuit 有权
标题翻译：半导体器件和半导体集成电路
公开(公告)号：US08054871B2
公开(公告)日：2011-11-08
申请号：US12370338
申请日：2009-02-12
申请人： Makoto Saen , Kenichi Osada , Shigenobu Komatsu , Itaru Nonomura , Yasuhisa Shimazaki
发明人： Makoto Saen , Kenichi Osada , Shigenobu Komatsu , Itaru Nonomura , Yasuhisa Shimazaki
IPC分类号： H04L5/16 , H04B1/38
CPC分类号： H01L25/0657 , H01L24/16 , H01L2224/16 , H01L2225/06517 , H01L2225/06527 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107
摘要： A semiconductor device including a pair of stacked semiconductor ICs capable of communicating with each other by wireless. Each IC has: a transmitter circuit operable to send, by wireless, transmit data together with a clock signal deciding a transmission timing, and arranged so that the wireless transmission timing is adjustable; a receiver circuit operable to receive data in synchronization with a clock signal received by wireless, and arranged so that its wireless reception timing is adjustable; and a control circuit operable to perform timing adjustments of the transmitter and receiver circuits based on a result of authentication of data returned by the other IC in response to data transmitted through the transmitter circuit, and received by the receiver circuit. This arrangement for near field communication between stacked semiconductor ICs enables: reduction of the scale of a circuit for communication timing adjustment; and highly accurate adjustment of the communication timing.
摘要翻译：一种半导体器件，包括能够通过无线彼此通信的一对叠层半导体IC。每个IC具有：发射机电路，其可操作来通过无线发送数据与决定发送定时的时钟信号一起发送，并且被布置成使得无线发送定时是可调节的; 接收机电路，可操作以与由无线接收的时钟信号同步地接收数据，并且被布置为使得其无线接收定时是可调节的; 以及控制电路，其可操作以基于由所述另一IC响应于通过所述发射机电路发送的数据并由所述接收机电路接收的数据的认证的结果执行所述发射机和接收机电路的定时调整。用于层叠半导体IC之间的近场通信的这种布置使得能够减少用于通信定时调整的电路的规模; 并高度准确地调整通讯时机。

2. 发明申请

US20090245445A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体器件和半导体集成电路
公开(公告)号：US20090245445A1
公开(公告)日：2009-10-01
申请号：US12370338
申请日：2009-02-12
申请人： Makoto Saen , Kenichi Osada , Shigenobu Komatsu , Itaru Nonomura , Yasuhisa Shimazaki
发明人： Makoto Saen , Kenichi Osada , Shigenobu Komatsu , Itaru Nonomura , Yasuhisa Shimazaki
IPC分类号： H04L7/00
CPC分类号： H01L25/0657 , H01L24/16 , H01L2224/16 , H01L2225/06517 , H01L2225/06527 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107
摘要： A semiconductor device including a pair of stacked semiconductor ICs capable of communicating with each other by wireless. Each IC has: a transmitter circuit operable to send, by wireless, transmit data together with a clock signal deciding a transmission timing, and arranged so that the wireless transmission timing is adjustable; a receiver circuit operable to receive data in synchronization with a clock signal received by wireless, and arranged so that its wireless reception timing is adjustable; and a control circuit operable to perform timing adjustments of the transmitter and receiver circuits based on a result of authentication of data returned by the other IC in response to data transmitted through the transmitter circuit, and received by the receiver circuit. This arrangement for near field communication between stacked semiconductor ICs enables: reduction of the scale of a circuit for communication timing adjustment; and highly accurate adjustment of the communication timing.
摘要翻译：一种半导体器件，包括能够通过无线彼此通信的一对叠层半导体IC。每个IC具有：发射机电路，其可操作来通过无线发送数据与决定发送定时的时钟信号一起发送，并且被布置成使得无线发送定时是可调节的; 接收机电路，可操作以与由无线接收的时钟信号同步地接收数据，并且被布置为使得其无线接收定时是可调节的; 以及控制电路，其可操作以基于由所述另一IC响应于通过所述发射机电路发送的数据并由所述接收机电路接收的数据的认证的结果执行所述发射机和接收机电路的定时调整。用于层叠半导体IC之间的近场通信的这种布置使得能够减少用于通信定时调整的电路的规模; 并高度准确地调整通讯时机。

3. 发明申请

US20090031053A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE WITH THE SAME 有权
标题翻译：半导体集成电路和具有该半导体集成电路的半导体器件
公开(公告)号：US20090031053A1
公开(公告)日：2009-01-29
申请号：US12172512
申请日：2008-07-14
申请人： Itaru Nonomura , Makoto Saen , Kenichi Osada
发明人： Itaru Nonomura , Makoto Saen , Kenichi Osada
IPC分类号： G06F13/20 , G06F13/00 , H03L7/00
CPC分类号： G06F13/4045 , H01L2924/0002 , H01L2924/00
摘要： An interconnect configuration technology of making an access from an IP mounted on a semiconductor chip to an IP mounted on another semiconductor chip by transmitting and receiving a packet transferred through an interconnect built in a semiconductor chip among the chips using the 3D coupling technology. The device according to the technology has an initiator for transmitting an access request, a target for receiving the access request and transmitting an access response, a router for relaying the access request and the access response, and a 3D coupling circuit (three-dimensional transceiver) for performing communication with the outside, wherein the 3D coupling circuit is disposed adjacent to the router.
摘要翻译：一种互连配置技术，其通过使用3D耦合技术发送和接收通过内置在半导体芯片中的互连的芯片传输的分组，从安装在半导体芯片上的IP到安装在另一半导体芯片上的IP进行访问。根据该技术的设备具有用于发送接入请求的发起者，用于接收接入请求并发送接入响应的目标，用于中继接入请求和接入响应的路由器，以及3D耦合电路（三维收发机），用于与外部进行通信，其中所述3D耦合电路邻近所述路由器设置。

4. 发明申请

US20090021974A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090021974A1
公开(公告)日：2009-01-22
申请号：US12167228
申请日：2008-07-02
申请人： Itaru NONOMURA , Kenichi Osada , Makoto Saen
发明人： Itaru NONOMURA , Kenichi Osada , Makoto Saen
IPC分类号： G11C5/06 , H01L23/49
CPC分类号： H01L25/0657 , H01L23/48 , H01L24/06 , H01L24/48 , H01L24/73 , H01L25/18 , H01L2224/0401 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06527 , H01L2225/06541 , H01L2225/06562 , H01L2225/06575 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01055 , H01L2924/01075 , H01L2924/01082 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device where multiple chips of identical design can be stacked, and the spacer and interposer eliminated, to improve three-dimensional coupling information transmission capability. A first semiconductor circuit including a three-dimensional coupling circuit (three-dimensional coupling transmission terminal group and three-dimensional coupling receiver terminal group); and a second semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode (power supply via hole and ground via hole); and a third semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode are stacked on the package substrate.
摘要翻译：可以堆叠具有相同设计的多个芯片的半导体器件，并且消除间隔件和插入件，以改善三维耦合信息传输能力。包括三维耦合电路（三维耦合传输端子组和三维耦合接收器端子组）的第一半导体电路; 以及包括三维耦合电路和馈通电极（电源通孔和接地通孔）的第二半导体集成电路; 并且在封装衬底上堆叠包括三维耦合电路和馈通电极的第三半导体集成电路。

5. 发明授权

US07994623B2 Semiconductor device with offset stacked integrated circuits 有权
标题翻译：具有偏移堆叠集成电路的半导体器件
公开(公告)号：US07994623B2
公开(公告)日：2011-08-09
申请号：US12167228
申请日：2008-07-02
申请人： Itaru Nonomura , Kenichi Osada , Makoto Saen
发明人： Itaru Nonomura , Kenichi Osada , Makoto Saen
IPC分类号： H01L23/02 , H01L27/00
CPC分类号： H01L25/0657 , H01L23/48 , H01L24/06 , H01L24/48 , H01L24/73 , H01L25/18 , H01L2224/0401 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06527 , H01L2225/06541 , H01L2225/06562 , H01L2225/06575 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01055 , H01L2924/01075 , H01L2924/01082 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device where multiple chips of identical design can be stacked, and the spacer and interposer eliminated, to improve three-dimensional coupling information transmission capability. A first semiconductor circuit including a three-dimensional coupling circuit (three-dimensional coupling transmission terminal group and three-dimensional coupling receiver terminal group); and a second semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode (power supply via hole and ground via hole); and a third semiconductor integrated circuit including a three-dimensional coupling circuit and feed-through electrode are stacked on the package substrate.
摘要翻译：可以堆叠具有相同设计的多个芯片的半导体器件，并且消除间隔件和插入件，以改善三维耦合信息传输能力。包括三维耦合电路（三维耦合传输端子组和三维耦合接收器端子组）的第一半导体电路; 以及包括三维耦合电路和馈通电极（电源通孔和接地通孔）的第二半导体集成电路; 并且在封装衬底上堆叠包括三维耦合电路和馈通电极的第三半导体集成电路。

6. 发明授权

US07849237B2 Semiconductor integrated circuit and semiconductor device with the same 有权
标题翻译：半导体集成电路和半导体器件相同
公开(公告)号：US07849237B2
公开(公告)日：2010-12-07
申请号：US12172512
申请日：2008-07-14
申请人： Itaru Nonomura , Makoto Saen , Kenichi Osada
发明人： Itaru Nonomura , Makoto Saen , Kenichi Osada
IPC分类号： G06F13/12
CPC分类号： G06F13/4045 , H01L2924/0002 , H01L2924/00
摘要： An interconnect configuration technology of making an access from an IP mounted on a semiconductor chip to an IP mounted on another semiconductor chip by transmitting and receiving a packet transferred through an interconnect built in a semiconductor chip among the chips using the 3D coupling technology. The device according to the technology has an initiator for transmitting an access request, a target for receiving the access request and transmitting an access response, a router for relaying the access request and the access response, and a 3D coupling circuit (three-dimensional transceiver) for performing communication with the outside, wherein the 3D coupling circuit is disposed adjacent to the router.
摘要翻译：一种互连配置技术，其通过使用3D耦合技术发送和接收通过内置在半导体芯片中的互连的芯片传输的分组，从安装在半导体芯片上的IP到安装在另一半导体芯片上的IP进行访问。根据该技术的设备具有用于发送接入请求的发起者，用于接收接入请求并发送接入响应的目标，用于中继接入请求和接入响应的路由器，以及3D耦合电路（三维收发机），用于与外部进行通信，其中所述3D耦合电路邻近所述路由器设置。

7. 发明授权

US08508968B2 Semiconductor apparatus 有权
标题翻译：半导体装置
公开(公告)号：US08508968B2
公开(公告)日：2013-08-13
申请号：US13461848
申请日：2012-05-02
申请人： Makoto Saen , Kenichi Osada , Masanao Yamaoka , Tomonori Sekiguchi
发明人： Makoto Saen , Kenichi Osada , Masanao Yamaoka , Tomonori Sekiguchi
IPC分类号： G11C5/06 , G11C7/00 , H01L23/48 , H01L23/52
CPC分类号： H01L25/0657 , G11C5/02 , H01L25/18 , H01L2224/16 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014 , H01L2924/13091 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： The need for mediation operation is eliminated by adoption of a connection topology in which a circuit for executing one transmission (TR—00T), and a circuit for executing a plurality of receptions (TR—10R, TR—20R, TR—30R) are connected to one penetration-electrode group (for example, TSVGL—0). In order to implement the connection topology even in the case of piling up a plurality of LSIs one after another, in particular, a programmable memory element for designating respective penetration-electrode ports for use in transmit, or for us in receive, and address allocation of the respective penetration-electrode ports is mounted in stacked LSIs.
摘要翻译：通过采用其中执行一次发送的电路（TR-00T）和用于执行多个接收（TR-10R，TR-20R，TR-30R）的电路的连接拓扑结构来消除对中介操作的需要连接到一个穿透电极组（例如，TSVGL-0）。为了实现连接拓扑，即使在堆叠多个LSI的情况下，尤其是用于指定用于发送的各个穿透电极端口或用于接收的可编程存储器元件，以及地址分配各个贯通电极端口安装在堆叠的LSI中。

8. 发明授权

US07899643B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US07899643B2
公开(公告)日：2011-03-01
申请号：US11935790
申请日：2007-11-06
申请人： Makoto Saen , Kenichi Osada , Tetsuya Yamada , Yusuke Kanno , Satoshi Misaka
发明人： Makoto Saen , Kenichi Osada , Tetsuya Yamada , Yusuke Kanno , Satoshi Misaka
IPC分类号： G01K1/12 , G06F19/00
CPC分类号： G06F1/3228 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device includes thermal sensors which detect temperature and determine whether the detection result exceeds reference values and output the result, and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors. The control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.
摘要翻译：一种半导体集成电路器件，其消耗较少功率并实现实时处理。半导体集成电路装置包括检测温度并确定检测结果是否超过参考值并输出结果的热传感器，以及能够基于热传感器的输出信号来控制运算块的操作的控制块。控制块基于热传感器的输出信号从具有中断信号的挂起状态返回到操作状态，并且确定运算块的操作条件，以确保运算块的温度条件得到满足。从而降低了功耗，提高了实时处理效率。

9. 发明申请

US20080114967A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20080114967A1
公开(公告)日：2008-05-15
申请号：US11935790
申请日：2007-11-06
申请人： Makoto Saen , Kenichi Osada , Tetsuya Yamada , Yusuke Kanno , Satoshi Misaka
发明人： Makoto Saen , Kenichi Osada , Tetsuya Yamada , Yusuke Kanno , Satoshi Misaka
IPC分类号： G06F9/302
CPC分类号： G06F1/3228 , H01L2924/0002 , H01L2924/00
摘要： There is provided a semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device comprises: thermal sensors which can detect temperature, determine whether the detection result exceeds each of the above reference values and output the result; and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors, wherein the control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.
摘要翻译：提供了一种半导体集成电路器件，其消耗较少功率并实现实时处理。半导体集成电路装置包括：可以检测温度的热传感器，确定检测结果是否超过上述参考值，并输出结果; 以及控制块，其能够基于所述热传感器的输出信号来控制运算块的运算，其中，所述控制块基于所述热传感器的输出信号，利用中断信号从暂停状态返回到运行状态，并且确定运算块的操作条件，以确保运算块的温度条件得到满足。从而降低了功耗，提高了实时处理效率。

10. 发明申请

US20120217620A1 SEMICONDUCTOR APPARATUS 有权
公开(公告)号：US20120217620A1
公开(公告)日：2012-08-30
申请号：US13461848
申请日：2012-05-02
申请人： Makoto SAEN , Kenichi Osada , Masanao Yamaoka , Tomonori Sekiguchi
发明人： Makoto SAEN , Kenichi Osada , Masanao Yamaoka , Tomonori Sekiguchi
IPC分类号： H01L25/065
CPC分类号： H01L25/0657 , G11C5/02 , H01L25/18 , H01L2224/16 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014 , H01L2924/13091 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： The need for mediation operation is eliminated by adoption of a connection topology in which a circuit for executing one transmission (TR—00T), and a circuit for executing a plurality of receptions (TR—10R, TR—20R, TR—30R) are connected to one penetration-electrode group (for example, TSVGL—0). In order to implement the connection topology even in the case of piling up a plurality of LSIs one after another, in particular, a programmable memory element for designating respective penetration-electrode ports for use in transmit, or for us in receive, and address allocation of the respective penetration-electrode ports is mounted in stacked LSIs.
摘要翻译：通过采用其中执行一次发送的电路（TR-00T）和用于执行多个接收（TR-10R，TR-20R，TR-30R）的电路的连接拓扑结构来消除对中介操作的需要连接到一个穿透电极组（例如，TSVGL-0）。为了实现连接拓扑，即使在堆叠多个LSI的情况下，尤其是用于指定用于发送的各个穿透电极端口或用于接收的可编程存储器元件，以及地址分配各个贯通电极端口安装在堆叠的LSI中。

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