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1. 发明授权

US08120124B2 Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer 失效
标题翻译：具有DCS（SiH2Cl2）界面接种层的DRAM电容器的超薄TCS（SiCl4）电池氮化物
公开(公告)号：US08120124B2
公开(公告)日：2012-02-21
申请号：US11712077
申请日：2007-02-28
申请人： Lingyi A. Zheng , Er-Xuan Ping
发明人： Lingyi A. Zheng , Er-Xuan Ping
IPC分类号： H01L21/00
CPC分类号： H01L21/0217 , C23C16/0272 , C23C16/345 , H01L21/02211 , H01L21/02271 , H01L21/31051 , H01L21/3115 , H01L21/3185 , H01L21/3211 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： A method for forming silicon nitride films on semiconductor devices is provided. In one embodiment of the method, a silicon-comprising substrate is first exposed to a mixture of dichlorosilane (DCS) and a nitrogen-comprising gas to deposit a thin silicon nitride seeding layer on the surface, and then exposed to a mixture of silicon tetrachloride (TCS) and a nitrogen comprising gas to deposit a TCS silicon nitride layer on the DCS seeding layer. In another embodiment, the method involves first nitridizing the surface of the silicon-comprising substrate prior to forming the DCS nitride seeding layer and the TCS nitride layer. The method achieves a TCS nitride layer having a sufficient thickness to eliminate bubbling and punch-through problems and provide high electrical performance regardless of the substrate type. Also provided are methods of forming a capacitor, and the resulting capacitor structures.
摘要翻译：提供了一种在半导体器件上形成氮化硅膜的方法。在该方法的一个实施方案中，首先将含硅衬底暴露于二氯硅烷（DCS）和含氮气体的混合物以在表面上沉积薄氮化硅接种层，然后暴露于四氯化硅（TCS）和包含气体的氮气以在DCS籽晶层上沉积TCS氮化硅层。在另一个实施方案中，该方法包括在形成DCS氮化物接种层和TCS氮化物层之前首先氮化含硅衬底的表面。该方法实现了具有足够厚度的TCS氮化物层，以消除起泡和穿通问题，并且不管衬底类型如何，都能提供高电性能。还提供了形成电容器的方法以及所得到的电容器结构。

2. 发明申请

US20090075448A1 Method of Forming Inside Rough and Outside Smooth HSG Electrodes and Capacitor Structure 失效
标题翻译：粗糙和外部平滑HSG电极和电容器结构之间的形成方法
公开(公告)号：US20090075448A1
公开(公告)日：2009-03-19
申请号：US12326458
申请日：2008-12-02
申请人： Lingyi A. Zheng
发明人： Lingyi A. Zheng
IPC分类号： H01L21/02
CPC分类号： H01L28/84 , H01L21/31111 , H01L28/91
摘要： A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a layer of doped polysilicon within a container in an insulative layer disposed on a substrate; forming a barrier layer over the polysilicon layer within the container; removing the insulative layer to expose the polysilicon layer outside the container; nitridizing the exposed polysilicon layer at a low temperature, preferably by remote plasma nitridation; removing the barrier layer to expose the inner surface of the polysilicon layer within the container; and forming HSG polysilicon over the inner surface of the polysilicon layer. The capacitor can be completed by forming a dielectric layer over the lower electrode, and an upper electrode over the dielectric layer. The cup-shaped bottom electrode formed within the container defines an interior surface comprising HSG polysilicon, and an exterior surface comprising smooth polysilicon.
摘要翻译：提供容器电容器和形成容器电容器的方法。容器电容器包括通过在设置在衬底上的绝缘层中的容器内形成掺杂多晶硅层而制造的下电极; 在容器内的多晶硅层上形成阻挡层; 去除绝缘层以将多晶硅层暴露在容器外部; 优选通过远程等离子体氮化在低温下氮化暴露的多晶硅层; 去除阻挡层以暴露容器内的多晶硅层的内表面; 并在多晶硅层的内表面上形成HSG多晶硅。可以通过在下电极上形成介电层和在电介质层上方的上电极来完成电容器。形成在容器内的杯形底部电极限定包括HSG多晶硅的内表面和包含平滑多晶硅的外表面。

3. 发明授权

US07344755B2 Methods and apparatus for processing microfeature workpieces; methods for conditioning ALD reaction chambers 有权
标题翻译：加工微型工件的方法和装置; 调节ALD反应室的方法
公开(公告)号：US07344755B2
公开(公告)日：2008-03-18
申请号：US10646673
申请日：2003-08-21
申请人： Kevin L. Beaman , Ronald A. Weimer , Lyle D. Breiner , Er-Xuan Ping , Trung T. Doan , Cem Basceri , David J. Kubista , Lingyi A. Zheng
发明人： Kevin L. Beaman , Ronald A. Weimer , Lyle D. Breiner , Er-Xuan Ping , Trung T. Doan , Cem Basceri , David J. Kubista , Lingyi A. Zheng
IPC分类号： C23C16/00
CPC分类号： C23C16/45546 , C23C16/4404
摘要： The present disclosure provides methods and apparatus that may be used to process microfeature workpieces, e.g., semiconductor wafers. Some aspects have particular utility in depositing TiN in a batch process. One implementation involves pretreating a surface of a process chamber by contemporaneously introducing first and second pretreatment precursors (e.g., TiCl4 and NH3) to deposit a pretreatment material on a the chamber surface. After the pretreatment, the first microfeature workpiece may be placed in the chamber and TiN may be deposited on the microfeature workpiece by alternately introducing quantities of first and second deposition precursors.
摘要翻译：本公开提供了可用于处理微特征工件（例如半导体晶片）的方法和装置。一些方面在分批过程中沉积TiN具有特殊的用途。一个实施方案包括通过同时引入第一和第二预处理前体（例如，TiCl 4和NH 3）来预处理处理室的表面，以将预处理材料沉积在室表面上。在预处理之后，可以将第一微特征工件放置在腔室中，并且可以通过交替地引入量的第一和第二沉积前体将TiN沉积在微特征工件上。

4. 发明授权

US07235138B2 Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces 失效
标题翻译：微型工件加工设备和微型工件上批量堆放材料的微型工件加工设备及方法
公开(公告)号：US07235138B2
公开(公告)日：2007-06-26
申请号：US10646607
申请日：2003-08-21
申请人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Ronald A. Weimer , David J. Kubista , Kevin L. Beaman , Cem Basceri
发明人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Ronald A. Weimer , David J. Kubista , Kevin L. Beaman , Cem Basceri
IPC分类号： C23C16/00 , H01L21/306 , C23F1/00
CPC分类号： C23C16/4583 , C23C16/45546 , C23C16/45578 , Y10S206/832
摘要： The present disclosure describes apparatus and methods for processing microfeature workpieces, e.g., by depositing material on a microelectronic semiconductor using atomic layer deposition. Some of these apparatus include microfeature workpiece holders that include gas distributors. One exemplary implementation provides a microfeature workpiece holder adapted to hold a plurality of microfeature workpieces. This workpiece holder includes a plurality of workpiece supports and a gas distributor. The workpiece supports are adapted to support a plurality of microfeature workpieces in a spaced-apart relationship to define a process space adjacent a surface of each microfeature workpiece. The gas distributor includes an inlet and a plurality of outlets, with each of the outlets positioned to direct a flow of process gas into one of the process spaces.
摘要翻译：本公开描述了用于处理微特征工件的装置和方法，例如通过使用原子层沉积在微电子半导体上沉积材料。这些设备中的一些包括微型工件保持器，其包括气体分配器。一个示例性实施例提供了适于保持多个微特征工件的微特征工件保持器。该工件保持器包括多个工件支撑件和气体分配器。工件支撑件适于以间隔的关系支撑多个微特征工件以限定与每个微特征工件的表面相邻的工艺空间。气体分配器包括入口和多个出口，其中每个出口被定位成将处理气体流引导到处理空间中的一个中。

5. 发明授权

US07214981B2 Semiconductor devices having double-sided hemispherical silicon grain electrodes 失效
标题翻译：具有双面半球状硅晶粒电极的半导体器件
公开(公告)号：US07214981B2
公开(公告)日：2007-05-08
申请号：US10897826
申请日：2004-07-23
申请人： Lingyi A. Zheng
发明人： Lingyi A. Zheng
IPC分类号： H01L29/94
CPC分类号： H01L28/84 , H01L21/84 , H01L27/1085 , H01L27/1203 , H01L28/91
摘要： Semiconductor devices are provided with double-sided hemispherical silicon grain (HSG) electrodes for container capacitors. In an embodiment, container capacitors for a semiconductor device have a cup-shaped bottom electrode with an interior surface including HSG polysilicon and an exterior surface including smooth polysilicon. A barrier layer may be formed within the container that defines the container capacitor.
摘要翻译：半导体器件具有用于容器电容器的双面半球形硅晶粒（HSG）电极。在一个实施例中，用于半导体器件的容器电容器具有杯形底部电极，其具有包括HSG多晶硅的内表面和包括平滑多晶硅的外表面。阻挡层可以形成在容器内，限定容器电容器。

6. 发明授权

US07056806B2 Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces 失效
公开(公告)号：US07056806B2
公开(公告)日：2006-06-06
申请号：US10665099
申请日：2003-09-17
申请人： Cem Basceri , Trung T. Doan , Ronald A. Weimer , Kevin L. Beaman , Lyle D. Breiner , Lingyi A. Zheng , Er-Xuan Ping , Demetrius Sarigiannis , David J. Kubista
发明人： Cem Basceri , Trung T. Doan , Ronald A. Weimer , Kevin L. Beaman , Lyle D. Breiner , Lingyi A. Zheng , Er-Xuan Ping , Demetrius Sarigiannis , David J. Kubista
IPC分类号： H01L21/76 , H01L21/20 , H01L21/36 , H01L21/04 , H01L21/261
CPC分类号： C23C16/45527 , C23C16/34 , C23C16/45546
摘要： The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced to a second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.

7. 发明授权

US06825081B2 Cell nitride nucleation on insulative layers and reduced corner leakage of container capacitors 失效
标题翻译：绝缘层上的细胞氮化物成核并减少容器电容器的拐角泄漏
公开(公告)号：US06825081B2
公开(公告)日：2004-11-30
申请号：US09912041
申请日：2001-07-24
申请人： Lingyi A. Zheng
发明人： Lingyi A. Zheng
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/3185 , H01L28/84 , H01L28/90
摘要： Methods of forming a uniform cell nitride dielectric layer over varying substrate materials such as an insulation material and a conductive or semiconductive material, methods of forming capacitors having a uniform nitride dielectric layer deposited onto varying substrate materials such as an insulation layer and overlying conductive or semiconductive electrode, and capacitors formed from such methods are provided. In one embodiment of forming a uniform cell nitride layer in a capacitor construction, a surface-modifying agent is implanted into exposed surfaces of an insulation layer of a capacitor container by low angle implantation to alter the surface properties of the insulation layer for enhanced nucleation of the depositing cell nitride material, preferably while rotating the substrate for adequate implantation of the modifying substance along the top corner portion of the container. The resulting cell nitride layer has a uniform thickness over the insulation layer and the lower electrode, thus eliminating punch-through and corner leakage problems. The capacitors are particularly useful in fabricating DRAM cells.
摘要翻译：在诸如绝缘材料和导电或半导体材料的变化的衬底材料上形成均匀的电池氮化物电介质层的方法，形成具有均匀的氮化物电介质层的电容器的方法，其沉积到诸如绝缘层和覆盖导电或半导电材料电极和由这些方法形成的电容器。在电容器结构中形成均匀的电池氮化物层的一个实施例中，通过低角度注入将表面改性剂注入电容器容器的绝缘层的暴露表面，以改变绝缘层的表面性能，以增强成核优选地在沉积单元氮化物材料的同时旋转衬底以适当地沿着容器的顶角部分注入修饰物质。所得到的单元氮化物层在绝缘层和下电极上具有均匀的厚度，从而消除了穿透和拐角泄漏问题。电容器在制造DRAM单元时特别有用。

8. 发明授权

US06562684B1 Methods of forming dielectric materials 失效
标题翻译：形成电介质材料的方法
公开(公告)号：US06562684B1
公开(公告)日：2003-05-13
申请号：US09651818
申请日：2000-08-30
申请人： Behnam Moradi , Er-Xuan Ping , Lingyi A. Zheng , John Packard
发明人： Behnam Moradi , Er-Xuan Ping , Lingyi A. Zheng , John Packard
IPC分类号： H01L21336
CPC分类号： H01L21/02326 , H01L21/02164 , H01L21/0217 , H01L21/02271 , H01L21/3144 , H01L28/40 , H01L28/84 , Y10S438/964
摘要： The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of the substrate is subjected to dry oxidation with one or both of NO and N2O to form a second portion of the dielectric material. The invention also encompasses a method of forming a capacitor. A layer of rugged silicon is formed over a substrate, and a nitrogen-comprising layer is formed on the layer of rugged silicon. Some of the rugged silicon is exposed through the nitrogen-comprising layer. After the nitrogen-comprising layer is formed, at least some of the exposed rugged silicon is subjected to dry oxidation conditions with one or both of NO and N2O. Subsequently, a conductive material layer is formed over the nitrogen-comprising layer. Additionally, the invention encompasses a capacitor structure. The structure includes a first capacitor electrode comprising a rugged polysilicon layer, a nitrogen-comprising layer on the rugged polysilicon layer, and a second capacitor electrode. The nitrogen-comprising layer is between the first and second capacitor electrodes.
摘要翻译：本发明包括形成电介质材料的方法。在坚固的多晶硅衬底的至少一些表面上形成含氮层以形成介电材料的第一部分。在形成含氮层之后，至少一些基底用NO和N 2 O中的一种或两种进行干式氧化以形成介电材料的第二部分。本发明还包括形成电容器的方法。在衬底上形成一层坚固的硅，并且在坚固的硅层上形成含氮层。一些粗糙的硅通过含氮层露出。在形成含氮层之后，暴露的粗糙硅中的至少一些经受具有NO和N 2 O中的一种或两种的干燥氧化条件。随后，在含氮层上形成导电材料层。另外，本发明包括电容器结构。该结构包括第一电容器电极，其包括坚固的多晶硅层，在凹凸多晶硅层上的含氮层和第二电容器电极。含氮层位于第一和第二电容器电极之间。

9. 发明授权

US08518184B2 Methods and systems for controlling temperature during microfeature workpiece processing, E.G., CVD deposition 有权
标题翻译：在微加工工件加工过程中控制温度的方法和系统，E.G.，CVD沉积
公开(公告)号：US08518184B2
公开(公告)日：2013-08-27
申请号：US12840153
申请日：2010-07-20
申请人： Kevin L. Beaman , Trung T. Doan , Lyle D. Breiner , Ronald A. Weimer , Er-Xuan Ping , David J. Kubista , Cem Basceri , Lingyi A. Zheng
发明人： Kevin L. Beaman , Trung T. Doan , Lyle D. Breiner , Ronald A. Weimer , Er-Xuan Ping , David J. Kubista , Cem Basceri , Lingyi A. Zheng
IPC分类号： C23C16/00
CPC分类号： C23C16/00 , C23C16/46
摘要： The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
摘要翻译：本公开提供了用于控制温度的方法和系统。该方法在沉积工艺中控制温度，例如通过CVD沉积热反射材料方面具有特别的用途。一个示例性实施例提供了一种方法，其涉及监测沉积室外的第一温度和沉积室内的第二温度。通过（a）将控制温度与目标温度进行比较，可以根据斜坡分布来增加沉积室中的内部温度，以及（b）响应于比较的结果，选择性地将热量输送到沉积室。目标温度可以根据斜坡分布来确定，但是一个实现中的控制温度在第一温度和第二温度之间交替。

10. 发明申请

US20110163416A1 METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES 有权
标题翻译：形成小尺寸电容器结构的方法
公开(公告)号：US20110163416A1
公开(公告)日：2011-07-07
申请号：US13047430
申请日：2011-03-14
申请人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Kevin L. Beaman , Ronald A. Weimer , Cem Basceri , David J. Kubista
发明人： Lingyi A. Zheng , Trung T. Doan , Lyle D. Breiner , Er-Xuan Ping , Kevin L. Beaman , Ronald A. Weimer , Cem Basceri , David J. Kubista
IPC分类号： H01L29/92 , G06F19/00
CPC分类号： H01L28/40 , H01L21/3141 , H01L27/10852 , H01L28/60 , H01L28/84
摘要： The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å.
摘要翻译：本公开提供小尺寸电容器（例如，DRAM电容器）以及形成这种电容器的方法。一个示例性实施例提供了一种制造电容器的方法，该电容器包括顺序地形成第一电极，电介质层和第二电极。可以通过以下方式形成至少一个电极：a）使两个前体反应以第一沉积速率沉积第一导电层，以及b）通过沉积一个前体的前体层以第二较低沉积速率沉积第二导电层至少一层单层，并将该前体层暴露于另一种前体以形成纳米层反应产物。第二导电层可以与介电层接触并具有不大于约的厚度。

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