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1. 发明授权

US08924902B2 Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices 有权
标题翻译：用于在采用较低阈值电压（LVT）器件的设计和电路中优化性能和功耗的方法和电路
公开(公告)号：US08924902B2
公开(公告)日：2014-12-30
申请号：US12683075
申请日：2010-01-06
申请人： Lew G. Chua-Eoan
发明人： Lew G. Chua-Eoan
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F17/5045 , G06F17/505 , G06F2217/78 , G06F2217/84
摘要： Methods and circuits for optimizing performance and power consumption in a circuit design and circuit employing one or more lower threshold voltage (Lvt) cells or devices are described. A base supply voltage amplitude is determined for providing operating power for the circuit. The base supply voltage amplitude is a low or lowest voltage level that still satisfies a performance specification for the circuit. Providing a low or lowest base supply voltage level reduces or minimizes the standby (i.e., non-switching) power consumption in the Lvt device(s) since current leakage is reduced as the supply voltage level is reduced. Reducing the supply voltage level used to power the Lvt device(s) also reduces active power consumption for the circuit as well. Thus, total power consumption is optimized or reduced while still receiving the benefit of using Lvt devices to optimize or increase performance of a circuit layout and circuit.
摘要翻译：描述了在采用一个或多个下阈值电压（Lvt）单元或设备的电路设计和电路中优化性能和功耗的方法和电路。确定基本电源电压幅度以提供电路的工作功率。基本电源电压幅度是仍然满足电路性能规格的低或最低电压电平。提供低或最低基准电压电平降低或最小化Lvt装置中的待机（即非切换）功率消耗，因为随着电源电压电平的降低，电流泄漏减小。降低用于为Lvt设备供电的电源电压也可以降低电路的有功功耗。因此，总功耗被优化或降低，同时仍然受益于使用Lvt设备来优化或增加电路布局和电路的性能的益处。

2. 发明申请

US20120056680A1 Three Dimensional Inductor, Transformer and Radio Frequency Amplifier 有权
标题翻译：三维电感，变压器和射频放大器
公开(公告)号：US20120056680A1
公开(公告)日：2012-03-08
申请号：US13294351
申请日：2011-11-11
申请人： Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
发明人： Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
IPC分类号： H03F3/16
CPC分类号： H01L28/10 , H01F17/0013 , H01F19/04 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L27/0207 , H01L2224/16145 , H01L2924/3011
摘要： A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.
摘要翻译：公开了一种三维片上射频放大器，其包括第一和第二变压器和第一晶体管。第一变压器包括第一和第二电感耦合电感器。第二变压器包括第三和第四电感耦合电感器。每个电感器包括在第一金属层中的多个第一段; 第二金属层中的多个第二段; 第一和第二输入以及耦合第一和第二段的多通孔，以形成第一和第二输入之间的连续路径。第一电感器的第一输入耦合到放大器输入端; 第二电感器的第一输入耦合到第一晶体管栅极; 第三电感器的第一输入耦合到第一晶体管漏极，第四电感器的第一输入耦合到放大器输出端。第二电感器输入和第一晶体管源耦合到地。

3. 发明申请

US20110234300A1 Low Voltage Temperature Sensor and use Thereof for Autonomous Multiprobe Measurement Device 有权
标题翻译：低电压温度传感器及其自动多点测量装置的使用
公开(公告)号：US20110234300A1
公开(公告)日：2011-09-29
申请号：US12731455
申请日：2010-03-25
申请人： Junmou Zhang , Lew G. Chua-Eoan
发明人： Junmou Zhang , Lew G. Chua-Eoan
IPC分类号： G01K7/01
CPC分类号： G01K7/01 , G01K2215/00 , G05F3/30
摘要： A bandgap sensor which measures temperatures within an integrated circuit is presented. The sensor may include a first transistor having an emitter node coupled in series to a first resistor and a first current source, wherein a PTAT current flows through the first resistor, and a second transistor having a base node coupled to a base node of the first transistor, and a collector node coupled to a collector node of the first transistor, further wherein the first and second transistors are diode connected. The sensor may further include a first operational amplifier providing negative feedback to the first current source, wherein the negative feedback is related to a difference in the base-emitter voltages of the first and second transistors, and a second operational amplifier which couples the base-emitter voltage of the second transistor across a second resistor, wherein a CTAT current flows through the second resistor.
摘要翻译：提出了一种测量集成电路内温度的带隙传感器。传感器可以包括具有与第一电阻器和第一电流源串联耦合的发射极节点的第一晶体管，其中PTAT电流流过第一电阻器，以及第二晶体管，具有耦合到第一电阻器的基极节点的基极节点晶体管和耦合到第一晶体管的集电极节点的集电极节点，其中第一和第二晶体管是二极管连接的。传感器还可以包括向第一电流源提供负反馈的第一运算放大器，其中所述负反馈与所述第一和第二晶体管的基极 - 发射极电压的差异相关;以及第二运算放大器，跨越第二电阻器的第二晶体管的发射极电压，其中CTAT电流流过第二电阻器。

4. 发明授权

US09001267B2 Method and apparatus for tightly coupled, low power image processing 有权
标题翻译：用于紧耦合，低功率图像处理的方法和装置
公开(公告)号：US09001267B2
公开(公告)日：2015-04-07
申请号：US13294681
申请日：2011-11-11
申请人： Jian Shen , Lew G. Chua-Eoan , Yi-Pin Hsiao
发明人： Jian Shen , Lew G. Chua-Eoan , Yi-Pin Hsiao
IPC分类号： H04N5/225 , H04N5/335 , G06T1/20 , H04N1/21 , H04N5/345 , H04N5/77 , G06F13/00 , H04N19/423
CPC分类号： H04N5/335 , G06F13/00 , G06T1/20 , H04N1/2112 , H04N5/3454 , H04N5/772 , H04N19/423
摘要： An image divided into N pixel blocks, stored block wise in a camera core and transferred block wise from the camera core to a downstream processing engine local to the local memory. A direct handshaking is communicated, between the camera core and the downstream processing engine, in the block wise transfers. Optionally an optical sensor scanner divides the image with a scan rate N times a frame rate, each scan providing a block of the frame. Optionally, the block wise transfer includes a transfer through a local memory, local to the camera core, controlled by the direct handshaking.
摘要翻译：将图像划分为N个像素块，以相机核心方式存储并从相机内核块传输到本地存储器本地的下游处理引擎。在相机芯和下游处理引擎之间，在块传输中进行直接握手。可选地，光学传感器扫描器以N倍于帧速率的扫描速率分割图像，每次扫描提供帧的块。可选地，块传输包括通过本地存储器传输，通过直接握手控制的本地到摄像机核心。

5. 发明授权

US08872492B2 On-chip low voltage capacitor-less low dropout regulator with Q-control 有权
标题翻译：具有Q控制功能的片上低电压无电容低压差稳压器
公开(公告)号：US08872492B2
公开(公告)日：2014-10-28
申请号：US13091715
申请日：2011-04-21
申请人： Junmou Zhang , Lew G. Chua-Eoan
发明人： Junmou Zhang , Lew G. Chua-Eoan
IPC分类号： G05F1/40 , G05F1/575
CPC分类号： G05F1/575
摘要： Systems and method for a capacitor-less Low Dropout (LDO) voltage regulator. An error amplifier is configured to amplify a differential between a reference voltage and a regulated LDO voltage. Without including an external capacitor in the LDO voltage regulator, a Miller amplifier is coupled to an output of the error amplifier, wherein the Miller amplifier is configured to amplify a Miller capacitance formed at an input node of the Miller amplifier. A capacitor coupled to the output of the error amplifier creates a positive feedback loop for decreasing a quality factor (Q), such that system stability is improved.
摘要翻译：无电容低压差（LDO）稳压器的系统和方法。误差放大器被配置为放大参考电压和调节LDO电压之间的差分。在LDO稳压器中不包括外部电容器的情况下，米勒放大器耦合到误差放大器的输出端，其中，米勒放大器被配置为放大在米勒放大器的输入节点处形成的米勒电容。耦合到误差放大器的输出的电容器产生用于降低质量因子（Q）的正反馈回路，从而提高系统稳定性。

6. 发明授权

US08295082B2 Gate level reconfigurable magnetic logic 有权
标题翻译：门级可重构磁逻辑
公开(公告)号：US08295082B2
公开(公告)日：2012-10-23
申请号：US12192386
申请日：2008-08-15
申请人： Lew G. Chua-Eoan , Xiaochun Zhu , Zhi Zhu
发明人： Lew G. Chua-Eoan , Xiaochun Zhu , Zhi Zhu
IPC分类号： G11C11/14 , H03K19/177
CPC分类号： G11C11/16
摘要： A re-programmable gate logic includes a plurality of non-volatile re-configurable resistance state-based memory circuits in parallel, wherein the circuits are re-configurable to implement or change a selected gate logic, and the plurality of non-volatile re-configurable resistance state-based memory circuits are each adapted to receive a logical input signal. An evaluation switch in series with the plurality of parallel non-volatile re-configurable resistance state-based memory circuits is configured to provide an output signal based on the programmed states of the memory circuits. A sensor is configured to receive the output signal and provide a logical output signal on the basis of the output signal and a reference signal provided to the sensor. The reconfigurable logic may be implemented based on using spin torque transfer (STT) magnetic tunnel junction (MTJ) magnetoresistance random access memory (MRAM) as the re-programmable memory elements. The logic configuration is retained without power.
摘要翻译：可再编程门逻辑并行包括多个非易失性可重新配置的基于电阻状态的存储器电路，其中电路可重新配置以实现或改变所选择的门逻辑，可配置电阻状态的存储器电路各自适于接收逻辑输入信号。与多个并行非易失性可重配置电阻状态存储电路串联的评估开关被配置为基于存储器电路的编程状态提供输出信号。传感器被配置为接收输出信号并且基于输出信号和提供给传感器的参考信号来提供逻辑输出信号。可重构逻辑可以基于使用自旋转矩传递（STT）磁性隧道结（MTJ）磁阻随机存取存储器（MRAM）作为可再编程存储器元件来实现。逻辑配置在没有电源的情况下保留。

7. 发明申请

US20110215863A1 Integrated Voltage Regulator with Embedded Passive Device(s) 审中-公开
标题翻译：带嵌入式无源器件的集成稳压器
公开(公告)号：US20110215863A1
公开(公告)日：2011-09-08
申请号：US13108335
申请日：2011-05-16
申请人： Yuancheng Christopher Pan , Lew G. Chua-Eoan , Zhi Zhu , Junmou Zhang
发明人： Yuancheng Christopher Pan , Lew G. Chua-Eoan , Zhi Zhu , Junmou Zhang
IPC分类号： H01L25/00
CPC分类号： H01L25/16 , H01L23/642 , H01L23/645 , H01L25/0652 , H01L2224/16225 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H02M3/00 , H05K1/0262 , H05K1/141 , H05K1/185
摘要： A method of supplying voltage to a die mounted on a packaging substrate includes mounting an active portion of a voltage regulator on the packaging substrate. The method also includes coupling the active portion of the voltage regulator to at least one passive component at least partially embedded in the packaging substrate and coupling the die to the at least one passive component. Mounting the active portion of the voltage regulator includes mounting the die on the packaging substrate where the die includes the active portion of the voltage regulator.
摘要翻译：向安装在封装基板上的管芯提供电压的方法包括将电压调节器的有源部分安装在封装基板上。该方法还包括将电压调节器的有源部分耦合到至少部分地嵌入封装衬底中的至少一个无源部件，并将管芯耦合到至少一个无源部件。安装电压调节器的有源部分包括将管芯安装在封装衬底上，其中管芯包括电压调节器的有源部分。

8. 发明授权

US07812582B2 System and method of power distribution control of an integrated circuit 有权
标题翻译：集成电路配电控制系统及方法
公开(公告)号：US07812582B2
公开(公告)日：2010-10-12
申请号：US11532000
申请日：2006-09-14
申请人： Lew G. Chua-Eoan , Boris Andreev , Christopher C. Riddle , Chunlei Shi , Justin Joseph Rosen Gagne , Seong-Ook Jung , Thomas R. Toms
发明人： Lew G. Chua-Eoan , Boris Andreev , Christopher C. Riddle , Chunlei Shi , Justin Joseph Rosen Gagne , Seong-Ook Jung , Thomas R. Toms
IPC分类号： G05F1/40
CPC分类号： H02M3/158 , H02M2001/0032 , H02M2001/0045 , H02M2001/009 , Y02B70/16
摘要： A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.
摘要翻译：公开了一种器件，其包括用于向集成电路的第一电源域供电的第一引脚，向集成电路的第二电源域供电的第二引脚，开关稳压器和控制器。开关调节器耦合到第一引脚，以向第一功率域提供第一稳压电源，并且耦合到第二引脚以向第二功率域提供第二稳压电源。控制器耦合到第一引脚和第二引脚，以在低功率事件期间选择性地减少至少第二引脚的电流。

9. 发明申请

US20090309667A1 RING OSCILLATOR USING ANALOG PARALLELISM 有权
标题翻译：环形振荡器使用模拟并行列表
公开(公告)号：US20090309667A1
公开(公告)日：2009-12-17
申请号：US12136952
申请日：2008-06-11
申请人： Jonghae Kim , Lew G. Chua-Eoan , Matthew Nowak
发明人： Jonghae Kim , Lew G. Chua-Eoan , Matthew Nowak
IPC分类号： H03K3/03
CPC分类号： H03K3/0315 , H03L7/0995
摘要： An apparatus including a ring oscillator and related methods are disclosed. The ring oscillator includes at least two ring loops. A first ring loop includes a plurality of series coupled delay cells. At least one additional ring loop includes a plurality of series coupled delay cells. The at least one additional ring loop is coupled to the first ring loop by one or more common delay cells shared between the first ring loop and the at least one additional ring loops.
摘要翻译：公开了一种包括环形振荡器和相关方法的装置。环形振荡器包括至少两个环形环。第一环路环包括多个串联耦合的延迟单元。至少一个附加环路包括多个串联耦合的延迟单元。所述至少一个附加环路通过在所述第一环路和所述至少一个附加环路之间共享的一个或多个公共延迟单元耦合到所述第一环路。

10. 发明申请

US20090172452A1 System and Method of Leakage Control in an Asynchronous System 有权
标题翻译：异步系统泄漏控制系统与方法
公开(公告)号：US20090172452A1
公开(公告)日：2009-07-02
申请号：US11964072
申请日：2007-12-26
申请人： Xiaohua Kong , Lew G. Chua-Eoan , Sei Seung Yoon , Zhi Zhu
发明人： Xiaohua Kong , Lew G. Chua-Eoan , Sei Seung Yoon , Zhi Zhu
IPC分类号： G06F1/26
CPC分类号： H03K19/0016 , G06F9/3871
摘要： Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage.
摘要翻译：公开了异步管道中泄漏控制的系统和方法。在一个实施例中，在异步电路设备的操作阶段从前一级接收信号，并且响应于控制信号被发送到操作级而使与操作级相关联的开关被激活以使能到操作阶段。

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