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1. 发明申请

US20070099415A1 INTEGRATION PROCESS OF TUNGSTEN ATOMIC LAYER DEPOSITION FOR METALLIZATION APPLICATION 审中-公开
标题翻译：用于金属化应用的金属原子层沉积的集成过程
公开(公告)号：US20070099415A1
公开(公告)日：2007-05-03
申请号：US11549941
申请日：2006-10-16
申请人： Ling Chen , Hua Chung , Sean Seutter , Michael Yang , Ming Xi , Vincent Ku , Dien-Yeh Wu , Alan Ouye , Norman Nakashima , Barry Chin , Hong Zhang
发明人： Ling Chen , Hua Chung , Sean Seutter , Michael Yang , Ming Xi , Vincent Ku , Dien-Yeh Wu , Alan Ouye , Norman Nakashima , Barry Chin , Hong Zhang
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/4411 , C23C16/4412 , C23C16/45504 , C23C16/45508 , C23C16/45512 , C23C16/45525 , C23C16/45544 , C23C16/45563 , C23C16/45582 , H01L21/76843 , H01L21/76846 , H01L21/76871
摘要： In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes positioning a substrate having an underlying tungsten layer within a process chamber and depositing a tungsten-containing barrier layer on the underlying tungsten layer during a cyclical layer deposition process. The tungsten-containing barrier layer contains a refractory metal nitride material. The method further provides depositing a seed layer on the tungsten-containing barrier layer during a vapor deposition process and depositing a bulk tungsten layer on the seed layer during a chemical vapor deposition process.
摘要翻译：在一个实施例中，提供了一种在衬底上形成含钨材料的方法，其包括将具有下层钨层的衬底定位在处理室内，并且在循环层沉积期间将下述钨层上沉积含钨阻挡层处理。含钨阻挡层含有难熔金属氮化物材料。该方法进一步提供在气相沉积工艺期间在含钨阻挡层上沉积种子层，并且在化学气相沉积工艺期间在种子层上沉积体钨层。

2. 发明申请

US20070003698A1 ENHANCED COPPER GROWTH WITH ULTRATHIN BARRIER LAYER FOR HIGH PERFORMANCE INTERCONNECTS 有权
公开(公告)号：US20070003698A1
公开(公告)日：2007-01-04
申请号：US11470915
申请日：2006-09-07
申请人： LING CHEN , Hua Chung , Barry Chin , Hong Zhang
发明人： LING CHEN , Hua Chung , Barry Chin , Hong Zhang
IPC分类号： C23C16/00
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/4411 , C23C16/4412 , C23C16/45504 , C23C16/45508 , C23C16/45512 , C23C16/45525 , C23C16/45544 , C23C16/45563 , C23C16/45582 , H01L21/76843 , H01L21/76846 , H01L21/76871
摘要： A method for depositing a refractory metal nitride barrier layer having a thickness of about 20 angstroms or less is provided. In one aspect, the refractory metal nitride layer is formed by introducing a pulse of a metal-containing compound followed by a pulse of a nitrogen-containing compound. The refractory metal nitride barrier layer provides adequate barrier properties and allows the grain growth of the first metal layer to continue across the barrier layer into the second metal layer thereby enhancing the electrical performance of the interconnect.

3. 发明申请

US20070026147A1 ENHANCED COPPER GROWTH WITH ULTRATHIN BARRIER LAYER FOR HIGH PERFORMANCE INTERCONNECTS 有权
标题翻译：用于高性能互连的超级屏障层的增强铜生长
公开(公告)号：US20070026147A1
公开(公告)日：2007-02-01
申请号：US11470922
申请日：2006-09-07
申请人： LING CHEN , Hua Chung , Barry Chin , Hong Zhang
发明人： LING CHEN , Hua Chung , Barry Chin , Hong Zhang
IPC分类号： C23C16/00
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/4411 , C23C16/4412 , C23C16/45504 , C23C16/45508 , C23C16/45512 , C23C16/45525 , C23C16/45544 , C23C16/45563 , C23C16/45582 , H01L21/76843 , H01L21/76846 , H01L21/76871
摘要： A method for depositing a refractory metal nitride barrier layer having a thickness of about 20 angstroms or less is provided. In one aspect, the refractory metal nitride layer is formed by introducing a pulse of a metal-containing compound followed by a pulse of a nitrogen-containing compound. The refractory metal nitride barrier layer provides adequate barrier properties and allows the grain growth of the first metal layer to continue across the barrier layer into the second metal layer thereby enhancing the electrical performance of the interconnect.
摘要翻译：提供了一种沉积具有约20埃或更小厚度的难熔金属氮化物阻挡层的方法。一方面，难熔金属氮化物层是通过引入含金属化合物的脉冲，随后是含氮化合物的脉冲而形成的。难熔金属氮化物阻挡层提供了足够的阻挡性能，并且允许第一金属层的晶粒生长继续穿过阻挡层进入第二金属层，从而增强了互连的电性能。

4. 发明申请

US20060223286A1 ATOMIC LAYER DEPOSITION APPARATUS 有权
标题翻译：原子层沉积装置
公开(公告)号：US20060223286A1
公开(公告)日：2006-10-05
申请号：US11423535
申请日：2006-06-12
申请人： Barry Chin , Alfred Mak , Lawrence Lei , Ming Xi , Hua Chung , Ken Lai , Jeong Byun
发明人： Barry Chin , Alfred Mak , Lawrence Lei , Ming Xi , Hua Chung , Ken Lai , Jeong Byun
IPC分类号： C23C16/00 , H01L21/20
CPC分类号： C23C16/45544 , C23C16/45525 , C23C16/45548 , C23C16/45551 , C23C16/4583
摘要： A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
摘要翻译：描述了用于原子层沉积（ALD）的方法和装置。该装置包括沉积室和晶片支架。沉积室被分成两个或更多个彼此一体地连接的沉积区域。晶片支撑件可在沉积室内的两个或更多互连的沉积区域之间移动。

5. 发明授权

US06620956B2 Nitrogen analogs of copper II &bgr;-diketonates as source reagents for semiconductor processing 有权
标题翻译：铜II型β-二酮酸盐的氮类似物作为半导体加工的原料
公开(公告)号：US06620956B2
公开(公告)日：2003-09-16
申请号：US10122491
申请日：2002-04-12
申请人： Ling Chen , Barry Chin
发明人： Ling Chen , Barry Chin
IPC分类号： C07F108
CPC分类号： C07C251/08
摘要： Nitrogen containing analogs of Copper II &bgr;-diketonates which analogs are more stable source reagents for copper deposition when substantially free of solvents of excess ligands. The nitrogen containing analogs replace —O— with —N(R″)— wherein R″ is an alkyl group having from one to four carbon atoms. Replacement of each —O— is preferred although replacement of one —O— per cyclic ring is sufficient to improve stability of the copper source reagents. The source reagent can be purified by sublimation to remove solvents and excess ligands prior to semiconductor processing.
摘要翻译：含铜的类似物铜IIβ-二酮类似物，当基本上不含过量配体的溶剂时，类似物是用于铜沉积的更稳定的源试剂。含氮的类似物用-N（R“） - 取代-O-，其中R”是具有1-4个碳原子的烷基。每个-O-的替代是优选的，尽管每个环的一个-O-取代足以提高铜源试剂的稳定性。源试剂可以通过升华纯化，以在半导体加工之前除去溶剂和过量的配体。

6. 发明申请

US20070178682A1 Damage-free sculptured coating deposition 审中-公开
标题翻译：无损伤雕刻涂层沉积
公开(公告)号：US20070178682A1
公开(公告)日：2007-08-02
申请号：US11733671
申请日：2007-04-10
申请人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
发明人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
IPC分类号： H01L21/20
CPC分类号： H01L21/76843 , C23C14/046 , C23C14/165 , H01L21/2855 , H01L21/76805 , H01L21/76844 , H01L21/76846 , H01L21/76862 , H01L21/76865 , H01L21/76871 , H01L21/76877 , H01L21/76879 , H01L21/76883
摘要： We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using an ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) of the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.
摘要翻译：我们公开了使用离子沉积溅射在半导体特征表面上施加雕刻层的材料的方法，其中施加有雕刻层的表面被保护以通过冲击沉积层的离子来抵抗侵蚀和污染，所述方法包括步骤：a）以足够低的衬底偏压施加雕刻层的第一部分，使得施加所述雕刻层的表面不会以对所述半导体器件的性能或寿命有害的量被侵蚀或污染; 以及b）将所述雕刻层的后续部分施加足够高的衬底偏压，以从所述第一部分雕刻形状，同时沉积附加层材料。该方法特别适用于在半导体特征表面上雕刻阻挡层，润湿层和导电层，并且当导电层是铜时尤其有用。在施加阻挡层时，使用标准溅射技术或使用离子沉积等离子体将阻挡层材料的第一部分沉积在衬底表面上，但是与足够低的衬底偏置电压（包括没有施加的衬底电压）组合，受离子影响的表面不会以对器件性能或寿命有害的量溅射。随后，使用离子沉积溅射在增加的衬底偏置电压下施加阻挡材料的第二部分，这导致阻挡层材料的第一部分的再溅射（雕刻），同时能够进行更多的各向异性沉积新沉积的材料。应用于特征的导电材料，特别是铜种子层可以使用与上述参考阻挡层所述相同的雕刻技术来实现。

7. 发明申请

US20050020080A1 Method of depositing a diffusion barrier layer and a metal conductive layer 审中-公开
标题翻译：沉积扩散阻挡层和金属导电层的方法
公开(公告)号：US20050020080A1
公开(公告)日：2005-01-27
申请号：US10922052
申请日：2004-08-18
申请人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
发明人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
IPC分类号： H01L21/285 , H01L21/768 , H01L21/4763 , H01L21/302 , H01L21/461
CPC分类号： H01L21/76843 , C23C14/046 , C23C14/165 , H01L21/2855 , H01L21/76805 , H01L21/76844 , H01L21/76846 , H01L21/76862 , H01L21/76865 , H01L21/76871 , H01L21/76877 , H01L21/76879 , H01L21/76883
摘要： We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of: a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using all ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) or the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.
摘要翻译：我们公开了使用离子沉积溅射在半导体特征表面上施加雕刻层的材料的方法，其中施加有雕刻层的表面被保护以通过冲击沉积层的离子来抵抗侵蚀和污染，所述方法包括步骤：a）以足够低的衬底偏压施加雕刻层的第一部分，使得施加所述雕刻层的表面不会以对所述半导体器件的性能或寿命有害的量被侵蚀或污染; 以及b）将所述雕刻层的后续部分施加足够高的衬底偏压，以从所述第一部分雕刻形状，同时沉积附加层材料。该方法特别适用于在半导体特征表面上雕刻阻挡层，润湿层和导电层，并且当导电层是铜时尤其有用。在施加阻挡层时，使用标准溅射技术或使用所有离子沉积等离子体将阻挡层材料的第一部分沉积在衬底表面上，但是与足够低的衬底偏置电压（包括没有施加的衬底电压）相结合，受离子影响的表面不会以对器件性能或寿命有害的量溅射。随后，使用离子沉积溅射以增加的衬底偏置电压施加阻挡材料的第二部分，其引起再溅射（雕刻）或阻挡层材料的第一部分，同时能够进行更多的各向异性沉积新沉积材料。应用于特征的导电材料，特别是铜种子层可以使用与上述参考阻挡层所述相同的雕刻技术来实现。

8. 发明申请

US20070241458A1 Metal / metal nitride barrier layer for semiconductor device applications 失效
标题翻译：用于半导体器件应用的金属/金属氮化物阻挡层
公开(公告)号：US20070241458A1
公开(公告)日：2007-10-18
申请号：US11809153
申请日：2007-05-30
申请人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
发明人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
IPC分类号： H01L23/48
CPC分类号： H01L21/02183 , C23C14/024 , C23C14/046 , C23C14/0641 , C23C14/165 , C23C14/541 , C23C14/5806 , H01L21/022 , H01L21/02266 , H01L21/02271 , H01L21/02362 , H01L21/2855 , H01L21/318 , H01L21/76846 , H01L21/76856 , H01L21/76862 , H01L21/76876 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.
摘要翻译：用于半导体器件应用的金属/金属氮化物阻挡层。阻挡层在通孔的高导电性很重要的接触孔中特别有用，并且较低电阻率的阻挡层提供改进的整体通孔导电性。

9. 发明申请

US20050085068A1 Method of depositing a metal seed layer on semiconductor substrates 失效
标题翻译：在半导体衬底上沉积金属种子层的方法
公开(公告)号：US20050085068A1
公开(公告)日：2005-04-21
申请号：US10981319
申请日：2004-11-03
申请人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
发明人： Tony Chiang , Gongda Yao , Peijun Ding , Fusen Chen , Barry Chin , Gene Kohara , Zheng Xu , Hong Zhang
IPC分类号： H01L21/285 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76843 , C23C14/046 , C23C14/165 , H01L21/2855 , H01L21/76805 , H01L21/76844 , H01L21/76846 , H01L21/76862 , H01L21/76865 , H01L21/76871 , H01L21/76877 , H01L21/76879 , H01L21/76883
摘要： We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using an ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) of the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.
摘要翻译：我们公开了使用离子沉积溅射在半导体特征表面上施加雕刻层的材料的方法，其中施加有雕刻层的表面被保护以通过冲击沉积层的离子来抵抗侵蚀和污染，所述方法包括步骤：a）以足够低的衬底偏压施加雕刻层的第一部分，使得施加所述雕刻层的表面不会以对所述半导体器件的性能或寿命有害的量被腐蚀掉或污染; 以及b）将所述雕刻层的后续部分施加足够高的衬底偏压，以从所述第一部分雕刻形状，同时沉积附加层材料。该方法特别适用于在半导体特征表面上雕刻阻挡层，润湿层和导电层，并且当导电层是铜时尤其有用。在施加阻挡层时，使用标准溅射技术或使用离子沉积等离子体将阻挡层材料的第一部分沉积在衬底表面上，但是与足够低的衬底偏置电压（包括没有施加的衬底电压）组合，受离子影响的表面不会以对器件性能或寿命有害的量溅射。随后，使用离子沉积溅射在增加的衬底偏置电压下施加阻挡材料的第二部分，这导致阻挡层材料的第一部分的再溅射（雕刻），同时能够进行更多的各向异性沉积新沉积的材料。应用于特征的导电材料，特别是铜种子层可以使用与上述参考阻挡层所述相同的雕刻技术来实现。

10. 发明申请

US20050272254A1 Method of depositing low resistivity barrier layers for copper interconnects 审中-公开
标题翻译：沉积用于铜互连的低电阻阻挡层的方法
公开(公告)号：US20050272254A1
公开(公告)日：2005-12-08
申请号：US11184404
申请日：2005-07-18
申请人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
发明人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
IPC分类号： C23C14/06 , C23C14/16 , C23C14/32 , H01L21/285 , H01L21/44 , H01L21/4763 , H01L21/768
CPC分类号： H01L21/02183 , C23C14/0641 , C23C14/165 , C23C14/541 , C23C14/5806 , H01L21/02266 , H01L21/2855 , H01L21/318 , H01L21/76846 , H01L21/76856 , H01L21/76862 , H01L21/76876
摘要： We have discovered a method of providing a thin approximately from about 2 Å to about 100 Å thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 μΩ cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.
摘要翻译：我们已经发现了一种提供大约约2埃至大约100埃的Ta N种子层的薄膜的方法，当钽沉积在Ta上时可用于诱导形成α钽， SUB> N 种子层。此外，Ta N N种子层在30μΩ·cm的范围内显示低电阻率，并且可以在不存在α钽层的情况下用作低电阻率阻挡层。在该方法的一个实施方案中，TaN膜在其表面上形成Ta N N种子层。在该方法的另一个实施方案中，在其表面上改变Ta膜以形成Ta N N种子层。

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