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    • 5. 发明授权
    • Method for producing thin film transistor and thin film transistor using the same
    • 使用该薄膜晶体管和薄膜晶体管的薄膜晶体管的制造方法
    • US06218206B1
    • 2001-04-17
    • US09153332
    • 1998-09-15
    • Kazunori InoueMasaru AokiMunehito KumagaiShigeaki NoumiTohru Takeguchi
    • Kazunori InoueMasaru AokiMunehito KumagaiShigeaki NoumiTohru Takeguchi
    • H01L2100
    • H01L29/66765
    • To provide a method of producing a TFT array and a liquid crystal display apparatus in which a contact resistivity of a pixel electrode and a drain electrode through a contact hole in an interlayer insulating film can be not more than 10E4&OHgr; stably. A method of producing TFT of the present invention for a liquid crystal display apparatus includes the step of forming TFT, the step of forming an interlayer insulating film, in which the surface is made to be flat so that a level difference due to the TFT area is eliminated, on a transparent insulating substrate, the step of providing a contact hole on a drain electrode of the interlayer insulating film so as to forming a pixel electrode on the interlayer insulating film so that the pixel electrode is electrically connected with the drain electrode through the contact hole, and the step of after forming the contact hole on the interlayer insulating film, applying a surface treatment for cleaning the surface of the contact portion to the surface of the substrate including the surface of the drain electrode exposed from the contact hole.
    • 为了提供一种制造TFT阵列的方法和液晶显示装置,其中通过层间绝缘膜中的接触孔的像素电极和漏极的接触电阻率可以稳定在10E4OMEGA以下。 本发明的液晶显示装置的TFT的制造方法包括以下步骤:形成TFT,形成层间绝缘膜的步骤,其中使所述表面平坦,使得由TFT区域引起的电平差 在透明绝缘基板上消除了在层间绝缘膜的漏电极上设置接触孔的步骤,以在层间绝缘膜上形成像素电极,使得像素电极通过与漏极电连接而电连接 所述接触孔以及在所述层间绝缘膜上形成所述接触孔之后的步骤,对所述接触部的表面进行表面处理,将所述接触部的表面进行表面处理,所述表面处理包括从所述接触孔露出的所述漏电极的表面。
    • 6. 发明授权
    • Thin film transistor substrate and manufacturing method for the same
    • 薄膜晶体管基板及其制造方法相同
    • US08558226B2
    • 2013-10-15
    • US13480980
    • 2012-05-25
    • Toshihiko IwasakaKazunori InoueMasaru AokiReiko Noguchi
    • Toshihiko IwasakaKazunori InoueMasaru AokiReiko Noguchi
    • H01L33/08
    • H01L27/1255H01L27/1225H01L27/1288
    • Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.
    • 本发明提供一种薄膜晶体管,其具有设置在半导体膜上的与半导体膜接触的基板,源电极和漏电极的多个部分中的半导体膜,并且彼此间隔开;以及 栅极电极,其经由栅极绝缘膜设置在所述源极电极和所述漏极电极之间; 辅助电容电极,与半导体膜接触地设置在半导体膜上; 在下层具有半导体膜的源极线从源电极延伸; 从栅电极延伸的栅极线; 与漏电极电连接的像素电极; 以及在相邻像素中将辅助电容电极彼此电连接的辅助电容电极连接线。
    • 8. 发明申请
    • ACOUSTIC WAVE FILTER
    • 声波滤波器
    • US20120105298A1
    • 2012-05-03
    • US13344274
    • 2012-01-05
    • Kazunori InoueTakashi MatsudaMichio Miura
    • Kazunori InoueTakashi MatsudaMichio Miura
    • H03H9/64H01Q1/50H03H9/72
    • H03H9/02992H03H9/02952H03H9/6483H03H9/725
    • A configuration that reduces a parasitic capacitance between wires is achieved at a low cost. Disclosed is an acoustic wave filter provided with a piezoelectric substrate 1, resonators 2a and 2b that include a comb-shaped electrode formed on the piezoelectric substrate 1, a wiring portion 3 that is connected to the comb-shaped electrode, and a dielectric layer 4 formed to cover the comb-shaped electrode. The wiring portion 3 is provided with a lower layer wiring portion 3d that is disposed in the same layer as the comb-shaped electrode and an upper layer wiring portion 3e that is disposed on the lower layer wiring portion 3d. The upper layer wiring portion 3e includes a region that has a wider electrode width than the electrode width of the lower layer wiring portion 3d.
    • 以低成本实现降低电线之间的寄生电容的结构。 公开了一种设置有压电基板1的谐波滤波器,包括形成在压电基板1上的梳状电极的谐振器2a和2b,连接到梳状电极的布线部分3和介电层4 形成为覆盖梳状电极。 布线部分3设置有与梳状电极相同的层中的下层布线部分3d和布置在下层布线部分3d上的上层布线部分3e。 上层布线部分3e包括具有比下层布线部分3d的电极宽度更宽的电极宽度的区域。