专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09929229B2 Process of manufacturing an open pattern inductor 有权
公开(公告)号：US09929229B2
公开(公告)日：2018-03-27
申请号：US13219459
申请日：2011-08-26
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01F41/04 , H01F17/00 , H01L49/02 , H01L27/08 , H01P11/00 , H01P9/02 , H01F27/36
CPC分类号： H01L28/10 , H01F17/0013 , H01F27/365 , H01F41/043 , H01F41/046 , H01L27/08 , H01P9/02 , H01P11/007 , Y10T29/4902 , Y10T29/4906 , Y10T29/49062 , Y10T29/49069 , Y10T29/49071 , Y10T29/49073 , Y10T29/49075
摘要： Various embodiments includes a stacked open pattern inductor fabricated above a semiconductor substrate. The stacked open pattern inductor includes a plurality of parallel open conducting patterns embedded in a magnetic oxide or in an insulator and a magnetic material. A layer of magnetic material may be located above the inductor and below the inductor to confine electronic noise generated in the stacked open pattern inductor to the area occupied by the inductor. The stacked open pattern inductor may include a magnetic material directly contacts one of the conducting patterns and the substrate. The stacked open pattern inductor may be fabricated using conventional integrated circuit manufacturing processes, and the inductor may be used in connection with computer systems.

2. 发明授权

US08993455B2 ZrAlON films 有权
标题翻译： ZrAlON膜
公开(公告)号：US08993455B2
公开(公告)日：2015-03-31
申请号：US12790598
申请日：2010-05-28
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L21/31 , C23C16/455 , C23C16/30 , H01L21/314
CPC分类号： H01L21/02194 , C23C16/308 , C23C16/45531 , C23C16/45546 , H01L21/02178 , H01L21/02189 , H01L21/0228 , H01L21/28158 , H01L21/3143 , H01L28/40
摘要： Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.
摘要翻译：原子层沉积（ALD）可用于形成用于各种电子器件的锆铝氮氧化物（ZrAlON）的介电层。形成介电层可以包括使用原子层沉积和前体化学品沉积氧化锆，然后使用前体化学品沉积氮化铝并重复。介质层可以用作闪存中的MOSFET，电容器电介质和隧道栅极绝缘体的栅极绝缘体。

3. 发明授权

US08603907B2 Apparatus having a dielectric containing scandium and gadolinium 有权
公开(公告)号：US08603907B2
公开(公告)日：2013-12-10
申请号：US13213911
申请日：2011-08-19
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/02192 , C23C16/40 , C23C16/45529 , C23C16/4554 , C23C16/45553 , H01L21/022 , H01L21/0228 , H01L21/28194 , H01L21/28273 , H01L21/28282 , H01L21/3142 , H01L21/31604 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/788 , H01L29/792
摘要： Apparatus having a dielectric containing scandium and gadolinium can provide a reliable structure with a high dielectric constant (high k). In an embodiment, a monolayer or partial monolayer sequence process, such as for example atomic layer deposition (ALD), can be used to form a dielectric containing gadolinium oxide and scandium oxide. In an embodiment, a dielectric structure can be formed by depositing gadolinium oxide by atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing scandium oxide onto the substrate using precursor chemicals, and repeating to form a thin laminate structure. A dielectric containing scandium and gadolinium may be used as gate insulator of a MOSFET, a capacitor dielectric in a DRAM, as tunnel gate insulators in flash memories, as a NROM dielectric, or as a dielectric in other electronic devices, because the high dielectric constant (high k) of the film provides the functionality of a much thinner silicon dioxide film.

4. 发明授权

US08557672B2 Dielectrics containing at least one of a refractory metal or a non-refractory metal 有权
$Dielectrics containing at least one of a refractory metal or a non-refractory metal$
公开(公告)号：US08557672B2
公开(公告)日：2013-10-15
申请号：US13368206
申请日：2012-02-07
申请人： Leonard Forbes , Kie Y. Ahn , Arup Bhattacharyya
发明人： Leonard Forbes , Kie Y. Ahn , Arup Bhattacharyya
IPC分类号： H01L21/20
CPC分类号： H01L21/02183 , C23C16/308 , C23C16/45525 , H01L21/02178 , H01L21/02194 , H01L21/02274 , H01L21/0228 , H01L21/02307 , H01L21/28185 , H01L21/28194 , H01L21/28273 , H01L21/3141 , H01L21/3145 , H01L21/31616 , H01L21/31637 , H01L28/60 , H01L28/65 , H01L29/518 , H01L29/7881
摘要： Electronic apparatus and methods of forming the electronic apparatus may include one or more insulator layers having a refractory metal and a non-refractory metal for use in a variety of electronic systems and devices. Embodiments can include electronic apparatus and methods of forming the electronic apparatus having a tantalum aluminum oxynitride film. The tantalum aluminum oxynitride film may be structured as one or more monolayers. The tantalum aluminum oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a tantalum aluminum oxynitride film.

5. 发明授权

US08541276B2 Methods of forming an insulating metal oxide 有权
标题翻译：形成绝缘金属氧化物的方法
公开(公告)号：US08541276B2
公开(公告)日：2013-09-24
申请号：US13442140
申请日：2012-04-09
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L21/336
CPC分类号： H01L21/0228 , C23C16/0281 , C23C16/40 , C23C16/45531 , H01L21/02178 , H01L21/02186 , H01L21/02194 , H01L21/022 , H01L21/02337 , H01L21/28229 , H01L21/3141 , H01L21/3142 , H01L29/513 , H01L29/517
摘要： A dielectric containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric produce a reliable dielectric for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also include structures for capacitors, transistors, memory devices, and electronic systems with dielectrics containing a titanium aluminum oxide film.
摘要翻译：包含具有多个金属成分的绝缘金属氧化物膜的电介质和制造这种电介质的方法产生用于各种电子器件的可靠电介质。实施方案包括被构造为一个或多个单层的钛氧化铝膜。实施例还包括用于电容器，晶体管，存储器件和具有包含钛氧化铝膜的电介质的电子系统的结构。

6. 发明授权

US08467639B2 Zinc oxide diodes for optical interconnections 有权
公开(公告)号：US08467639B2
公开(公告)日：2013-06-18
申请号：US13185074
申请日：2011-07-18
申请人： Leonard Forbes , Kie Y. Ahn
发明人： Leonard Forbes , Kie Y. Ahn
IPC分类号： G02B6/12 , H01L21/00
CPC分类号： G02B6/43 , B82Y20/00 , G02B6/102 , H01L33/20 , H01L33/28
摘要： The present disclosure includes methods, devices, and systems for zinc oxide diodes for optical interconnections. One system includes a ZnO emitter confined within a circular geometry in an oxide layer on a silicon substrate. An optical waveguide is formed in the oxide layer and has an input coupled to the ZnO emitter. A detector is coupled to an output of the optical waveguide.

7. 发明授权

US08409959B2 Vertically base-connected bipolar transistor 有权
公开(公告)号：US08409959B2
公开(公告)日：2013-04-02
申请号：US11717462
申请日：2007-03-13
申请人： Badih El-Kareh , Leonard Forbes , Kie Y. Ahn
发明人： Badih El-Kareh , Leonard Forbes , Kie Y. Ahn
IPC分类号： H01L21/8222
CPC分类号： H01L29/732 , H01L21/8249 , H01L27/0623 , H01L29/0817 , H01L29/1004 , H01L29/66272 , H01L29/66287 , H01L29/73 , H01L29/7371 , H03K17/60
摘要： Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar transistors in the embodiments of the present disclosure are formed with a CMOS fabrication technique that decreases the transistor size while maintaining the high performance characteristics of a bipolar transistor.

8. 发明申请

US20130012031A1 HAFNIUM TANTALUM OXIDE DIELECTRICS 有权
标题翻译：高锰氧化物电介质
公开(公告)号：US20130012031A1
公开(公告)日：2013-01-10
申请号：US13614059
申请日：2012-09-13
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L21/3105
CPC分类号： H01L21/0228 , H01L21/02181 , H01L21/02183 , H01L21/02194 , H01L21/022 , H01L21/02318 , H01L21/28194 , H01L21/28273 , H01L21/28282 , H01L21/3141 , H01L21/31637 , H01L21/31645 , H01L29/4908 , H01L29/517
摘要： A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film structured as one or more monolayers.
摘要翻译：包含铪钽氧化物膜的介电层和制造这种电介质层的方法产生用于各种电子器件的介电层。实施例包括用于电容器，晶体管，存储器件和具有包含被构造为一个或多个单层的铪钽氧化物膜的电介质层的电子系统的结构。

9. 发明申请

US20120313097A1 FLASH MEMORY DEVICE HAVING A GRADED COMPOSITION, HIGH DIELECTRIC CONSTANT GATE INSULATOR 有权
标题翻译：具有成型组合物的高速电介质绝缘体的闪存存储装置
公开(公告)号：US20120313097A1
公开(公告)日：2012-12-13
申请号：US13595219
申请日：2012-08-27
申请人： Leonard Forbes , Kie Y. Ahn
发明人： Leonard Forbes , Kie Y. Ahn
IPC分类号： H01L29/788
CPC分类号： H01L27/11517 , H01L21/8239 , H01L27/11563 , H01L29/513 , H01L29/7881
摘要： A graded composition, high dielectric constant gate insulator is formed between a substrate and floating gate in a flash memory cell transistor. The gate insulator comprises amorphous germanium or a graded composition of germanium carbide and silicon carbide. If the composition of the gate insulator is closer to silicon carbide near the substrate, the electron barrier for hot electron injection will be lower. If the gate insulator is closer to the silicon carbide near the floating gate, the tunnel barrier can be lower at the floating gate.
摘要翻译：在闪速存储单元晶体管中的衬底和浮置栅极之间形成分级成分，高介电常数栅极绝缘体。栅极绝缘体包括无定形锗或碳化锗和碳化硅的分级组合物。如果栅极绝缘体的组成更靠近基板附近的碳化硅，则热电子注入的电子势垒将更低。如果栅极绝缘体靠近浮动栅极附近的碳化硅，隧道势垒可以在浮动栅极处较低。

10. 发明授权

US08269254B2 Silicon on germanium 有权
标题翻译：锗在锗上
公开(公告)号：US08269254B2
公开(公告)日：2012-09-18
申请号：US12829099
申请日：2010-07-01
申请人： Kie Y. Ahn , Leonard Forbes
发明人： Kie Y. Ahn , Leonard Forbes
IPC分类号： H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109 , H01L31/062
CPC分类号： H01L29/78651 , H01L21/28255 , H01L29/513 , H01L29/517
摘要： The use of atomic layer deposition (ALD) to form a semiconductor structure of a silicon film on a germanium substrate is disclosed. An example embodiment includes a tantalum nitride gate electrode on a hafnium dioxide gate dielectric on the silicon film (TaN/HfO2/Si/Ge), which produces a reliable high dielectric constant (high k) electronic structure having higher charge carrier mobility as compared to silicon substrates. This structure may be useful in high performance electronic devices. The structure can be formed by ALD deposition of a thin silicon layer on a germanium substrate surface, and then ALD forming a hafnium oxide gate dielectric layer, and a tantalum nitride gate electrode. Such a structure may be used as the gate of a MOSFET, or as a capacitor. The properties of the dielectric may be varied by replacing the hafnium oxide with another gate dielectric such as zirconium oxide (ZrO2), or titanium oxide (TiO2).
摘要翻译：公开了使用原子层沉积（ALD）在锗衬底上形成硅膜的半导体结构。示例性实施例包括在硅膜上的二氧化铪电介质（TaN / HfO 2 / Si / Ge）上的氮化钽栅电极，其产生具有较高电荷载流子迁移率的可靠的高介电常数（高k）电子结构，与硅衬底。该结构在高性能电子设备中可能是有用的。该结构可以通过在锗衬底表面上沉积薄硅层，然后形成氧化铪栅极电介质层的ALD和氮化钽栅电极来形成。这种结构可以用作MOSFET的栅极或电容器。可以通过用诸如氧化锆（ZrO 2）或氧化钛（TiO 2）的另一种栅极电介质代替氧化铪来改变电介质的性质。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式