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1. 发明授权

US07358588B2 Trench isolation type semiconductor device which prevents a recess from being formed in a field region 有权
标题翻译：沟槽隔离型半导体器件防止在场区域中形成凹陷
公开(公告)号：US07358588B2
公开(公告)日：2008-04-15
申请号：US11301510
申请日：2005-12-13
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L29/00
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

2. 发明授权

US07795110B2 Trench isolation type semiconductor device which prevents a recess from being formed in a field region and method of fabricating the same 有权
标题翻译：防止在场区域形成凹部的沟槽隔离型半导体器件及其制造方法
公开(公告)号：US07795110B2
公开(公告)日：2010-09-14
申请号：US12070808
申请日：2008-02-21
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

3. 发明申请

US20060128114A1 Trench isolation type semiconductor device and method of fabricating the same 有权
标题翻译：沟槽隔离型半导体器件及其制造方法
公开(公告)号：US20060128114A1
公开(公告)日：2006-06-15
申请号：US11301510
申请日：2005-12-13
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

4. 发明授权

US07709340B2 Semiconductor integrated circuit device and method of manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07709340B2
公开(公告)日：2010-05-04
申请号：US11705164
申请日：2007-02-12
申请人： Jong-hyon Ahn , Jae-cheol Yoo , Ki-seog Youn , Kwan-jong Roh , Su-gon Bae , Ki-young Kim
发明人： Jong-hyon Ahn , Jae-cheol Yoo , Ki-seog Youn , Kwan-jong Roh , Su-gon Bae , Ki-young Kim
IPC分类号： H01L21/20
CPC分类号： H01L21/823807 , H01L21/823864 , H01L27/11 , H01L27/1104 , H01L29/7843
摘要： A semiconductor integrated circuit device may include a semiconductor substrate, a static memory cell on the semiconductor substrate, a tensile stress film on the pull-down transistors, and a compressive stress film on the pass transistors. The static memory cell may include multiple pull-up transistors and pull-down transistors, which form a latch, and multiple pass transistors may be used to access the latch.
摘要翻译：半导体集成电路器件可以包括半导体衬底，半导体衬底上的静态存储单元，下拉晶体管上的拉伸应力膜以及通过晶体管上的压应力膜。静态存储单元可以包括形成锁存器的多个上拉晶体管和下拉晶体管，并且多通道晶体管可用于访问锁存器。

5. 发明申请

US20090051014A1 Method of fabricating semiconductor device having silicide layer and semiconductor device fabricated thereby 审中-公开
标题翻译：制造具有硅化物层的半导体器件及其制造的半导体器件的方法
公开(公告)号：US20090051014A1
公开(公告)日：2009-02-26
申请号：US12285851
申请日：2008-10-15
申请人： Ki-seog Youn , Jong-hyon Ahn , Su-gon Bae
发明人： Ki-seog Youn , Jong-hyon Ahn , Su-gon Bae
IPC分类号： H01L29/06
CPC分类号： H01L21/823443 , H01L21/823418
摘要： A method of fabricating a semiconductor device having a silicide layer and a semiconductor device fabricated by the method are provided. The method may involve providing a semiconductor substrate having an active region and a field region, and forming a plurality of gate patterns on each of the active region and the field region. The plurality of gate patterns may each have a sidewall spacer. The plurality of gate patterns on the field region include at least two adjacent gate patterns. The method may involve forming a silicide blocking layer pattern that masks a portion of the field region that exists between each of the adjacent gate patterns on the field region. The method may also involve forming a silicide layer on the active region and any of the plurality of the gate patterns that are not masked by the silicide blocking layer pattern.
摘要翻译：提供一种制造具有硅化物层的半导体器件的方法和通过该方法制造的半导体器件。该方法可以包括提供具有有源区和场区的半导体衬底，并且在有源区和场区中的每一个上形成多个栅极图案。多个栅极图案可以各自具有侧壁间隔物。场区域上的多个栅极图案包括至少两个相邻的栅极图案。该方法可以包括形成硅化物阻挡层图案，其掩蔽存在于场区域上的每个相邻栅极图案之间的场区域的一部分。该方法还可以包括在有源区上形成硅化物层以及未被硅化物阻挡层图案掩蔽的多个栅极图案中的任何一个。

6. 发明授权

US07557415B2 Trench isolation type semiconductor device and related method of manufacture 有权
标题翻译：沟槽隔离型半导体器件及相关制造方法
公开(公告)号：US07557415B2
公开(公告)日：2009-07-07
申请号：US11650418
申请日：2007-01-08
申请人： Ki-seog Youn , Jong-hyon Ahn , Kwan-jong Roh , Hye-kyoung Lee
发明人： Ki-seog Youn , Jong-hyon Ahn , Kwan-jong Roh , Hye-kyoung Lee
IPC分类号： H01L29/94
CPC分类号： H01L21/76224
摘要： A semiconductor device and related method of manufacture are disclosed. The device comprises; a trench having a corner portion formed in the semiconductor substrate, a first oxide film formed on an inner wall of the trench and having an upper end portion exposing the corner portion of the semiconductor substrate, a nitride liner formed on the first oxide film, a second oxide film formed in contact with the upper end of the first oxide film and on the exposed corner portion and an upper surface of the semiconductor substrate, a field insulating film formed on the nitride liner to substantially fill the trench, and a field protecting film formed in contact with the second oxide film and filling a trench edge recess formed between the field insulating film and the second oxide film.
摘要翻译：公开了一种半导体器件及其制造方法。该装置包括：具有形成在所述半导体衬底中的角部的沟槽，形成在所述沟槽的内壁上并具有暴露所述半导体衬底的角部的上端部的第一氧化膜，形成在所述第一氧化物膜上的氮化物衬垫，与第一氧化物膜的上端接触形成的第二氧化物膜，暴露的角部和半导体衬底的上表面，形成在氮化物衬垫上以基本上填充沟槽的场绝缘膜，以及场保护膜形成为与第二氧化物膜接触并填充形成在场绝缘膜和第二氧化物膜之间的沟槽边缘凹陷。

7. 发明申请

US20070187770A1 Semiconductor integrated circuit device and method of manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US20070187770A1
公开(公告)日：2007-08-16
申请号：US11705164
申请日：2007-02-12
申请人： Jong-hyon Ahn , Jae-cheol Yoo , Ki-seog Youn , Kwan-jong Roh , Su-gon Bae , Ki-young Kim
发明人： Jong-hyon Ahn , Jae-cheol Yoo , Ki-seog Youn , Kwan-jong Roh , Su-gon Bae , Ki-young Kim
IPC分类号： H01L29/94 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823864 , H01L27/11 , H01L27/1104 , H01L29/7843
摘要： A semiconductor integrated circuit device may include a semiconductor substrate, a static memory cell on the semiconductor substrate, a tensile stress film on the pull-down transistors, and a compressive stress film on the pass transistors. The static memory cell may include multiple pull-up transistors and pull-down transistors, which form a latch, and multiple pass transistors may be used to access the latch.
摘要翻译：半导体集成电路器件可以包括半导体衬底，半导体衬底上的静态存储单元，下拉晶体管上的拉伸应力膜以及通过晶体管上的压应力膜。静态存储单元可以包括形成锁存器的多个上拉晶体管和下拉晶体管，并且多通道晶体管可用于访问锁存器。

8. 发明申请

US20070164391A1 Trench isolation type semiconductor device and related method of manufacture 有权
标题翻译：沟槽隔离型半导体器件及相关制造方法
公开(公告)号：US20070164391A1
公开(公告)日：2007-07-19
申请号：US11650418
申请日：2007-01-08
申请人： Ki-seog Youn , Jong-hyon Ahn , Kwan-Jong Roh , Hye-Kyoung Lee
发明人： Ki-seog Youn , Jong-hyon Ahn , Kwan-Jong Roh , Hye-Kyoung Lee
IPC分类号： H01L29/00
CPC分类号： H01L21/76224
摘要： A semiconductor device and related method of manufacture are disclosed. The device comprises; a trench having a corner portion formed in the semiconductor substrate, a first oxide film formed on an inner wall of the trench and having an upper end portion exposing the corner portion of the semiconductor substrate, a nitride liner formed on the first oxide film, a second oxide film formed in contact with the upper end of the first oxide film and on the exposed corner portion and an upper surface of the semiconductor substrate, a field insulating film formed on the nitride liner to substantially fill the trench, and a field protecting film formed in contact with the second oxide film and filling a trench edge recess formed between the field insulating film and the second oxide film.
摘要翻译：公开了一种半导体器件及其制造方法。该装置包括：具有形成在所述半导体衬底中的角部的沟槽，形成在所述沟槽的内壁上并具有暴露所述半导体衬底的角部的上端部的第一氧化膜，形成在所述第一氧化物膜上的氮化物衬垫，与第一氧化物膜的上端接触形成的第二氧化物膜，暴露的角部和半导体衬底的上表面，形成在氮化物衬垫上以基本上填充沟槽的场绝缘膜，以及场保护膜形成为与第二氧化物膜接触并填充形成在场绝缘膜和第二氧化物膜之间的沟槽边缘凹陷。

9. 发明申请

US20060163669A1 Method of fabricating semiconductor device having silicide layer and semiconductor device fabricated thereby 审中-公开
公开(公告)号：US20060163669A1
公开(公告)日：2006-07-27
申请号：US11332150
申请日：2006-01-17
申请人： Ki-seog Youn , Jong-hyon Ahn , Su-gon Bae
发明人： Ki-seog Youn , Jong-hyon Ahn , Su-gon Bae
IPC分类号： H01L29/76
CPC分类号： H01L21/823443 , H01L21/823418
摘要： A method of fabricating a semiconductor device having a silicide layer and a semiconductor device fabricated by the method are provided. The method may involve providing a semiconductor substrate having an active region and a field region, and forming a plurality of gate patterns on each of the active region and the field region. The plurality of gate patterns may each have a sidewall spacer. The plurality of gate patterns on the field region include at least two adjacent gate patterns. The method may involve forming a silicide blocking layer pattern that masks a portion of the field region that exists between each of the adjacent gate patterns on the field region. The method may also involve forming a silicide layer on the active region and any of the plurality of the gate patterns that are not masked by the silicide blocking layer pattern.

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