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1. 发明授权

US07358588B2 Trench isolation type semiconductor device which prevents a recess from being formed in a field region 有权
标题翻译：沟槽隔离型半导体器件防止在场区域中形成凹陷
公开(公告)号：US07358588B2
公开(公告)日：2008-04-15
申请号：US11301510
申请日：2005-12-13
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L29/00
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

2. 发明申请

US20060128114A1 Trench isolation type semiconductor device and method of fabricating the same 有权
标题翻译：沟槽隔离型半导体器件及其制造方法
公开(公告)号：US20060128114A1
公开(公告)日：2006-06-15
申请号：US11301510
申请日：2005-12-13
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

3. 发明授权

US07795110B2 Trench isolation type semiconductor device which prevents a recess from being formed in a field region and method of fabricating the same 有权
标题翻译：防止在场区域形成凹部的沟槽隔离型半导体器件及其制造方法
公开(公告)号：US07795110B2
公开(公告)日：2010-09-14
申请号：US12070808
申请日：2008-02-21
申请人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
发明人： Ki-seog Youn , Jong-hyon Ahn , Deok-hyung Lee , Sung-gun Kang , Kong-soo Cheong
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

4. 发明授权

US06878598B2 Method of forming thick metal silicide layer on gate electrode 有权
标题翻译：在栅电极上形成厚金属硅化物层的方法
公开(公告)号：US06878598B2
公开(公告)日：2005-04-12
申请号：US10731761
申请日：2003-12-09
申请人： Jin-won Jun , Kong-soo Cheong , Jeong-ho Shin
发明人： Jin-won Jun , Kong-soo Cheong , Jeong-ho Shin
IPC分类号： H01L21/3205 , H01L21/336 , H01L21/4763
CPC分类号： H01L29/66507
摘要： Provided is a method of forming a thick metal silicide layer on a gate electrode. The method includes forming a gate electrode of a transistor on a semiconductor substrate, wherein a hard mask is formed on the gate electrode, forming a spacer on a sidewall of the gate electrode, forming a first silicide layer on a portion of the semiconductor substrate, adjacent to the spacer, forming an insulating layer on the first suicide layer to expose upper portions of the hard mask and the spacer, selectively etching the exposed upper portions of the hard mask and the spacer using the insulating layer as an etch mask until the top surface and the sidewall of the gate electrode are exposed, forming a metal layer on the exposed top surface and sidewall of the gate electrode, and forming a second silicide layer on the gate electrode by siliciding the metal layer.
摘要翻译：提供了在栅电极上形成厚金属硅化物层的方法。该方法包括在半导体衬底上形成晶体管的栅电极，其中在栅电极上形成硬掩模，在栅电极的侧壁上形成间隔物，在半导体衬底的一部分上形成第一硅化物层，在第一硅化物层上形成绝缘层以暴露硬掩模和间隔物的上部，使用绝缘层作为蚀刻掩模选择性地蚀刻硬掩模和间隔物的暴露的上部，直到顶部露出栅电极的侧壁，在露出的栅电极的顶表面和侧壁上形成金属层，并通过硅化金属层在栅电极上形成第二硅化物层。

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