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1. 发明授权

US06171737B2 Low cost application of oxide test wafer for defect monitor in photolithography process 失效
标题翻译：用于光刻工艺中缺陷监测器的氧化物测试晶片的低成本应用
公开(公告)号：US06171737B2
公开(公告)日：2001-01-09
申请号：US09017695
申请日：1998-02-03
申请人： Khoi A. Phan , Shobhana R. Punjabi , Robert J. Chiu , Bhanwar Singh
发明人： Khoi A. Phan , Shobhana R. Punjabi , Robert J. Chiu , Bhanwar Singh
IPC分类号： G03F900
CPC分类号： G03F7/7065 , H01L22/20 , H01L22/34
摘要： A low cost technique for detecting defects in photolithography processes in a submicron integrated circuit manufacturing environment combines use of a reusable test wafer with in-line processing to monitor defects using a pattern comparator system. A reusable test wafer having an oxide layer overlying a silicon substrate and having a thickness corresponding to a minimum reflectance for an exposure wavelength used for photolithography is patterned using a prescribed photolithographic fabrication process to form a repetitive pattern according to a prescribed design product rule. The pattern is formed using a reticle having a repetitive pattern array with a similar design rule as the product to be developed by the lithography processes. The patterned test wafer is then inspected using image-based inspection techniques, where the image has high resolution pixels of preferably 0.25 microns per pixel. An optical review station and scanning electron microscope system are used to review defect and classify defect types. The test wafer can then be reused by cleaning the photolithographic pattern by removing the photoresist, and then removing polymer particles adhering to the oxide layer following removal of the photoresist.
摘要翻译：在亚微米集成电路制造环境中用于检测光刻工艺中的缺陷的低成本技术将使用可重复使用的测试晶片与在线处理相结合，以使用模式比较器系统来监测缺陷。使用规定的光刻制造工艺对具有覆盖在硅衬底上并具有与用于光刻的曝光波长的最小反射率相对应的厚度的可重复使用的测试晶片图案化以根据规定的设计产品规则形成重复图案。使用具有与通过光刻工艺开发的产品相似的设计规则的具有重复图案阵列的掩模版形成图案。然后使用基于图像的检查技术来检查图案化的测试晶片，其中图像具有每像素优选0.25微米的高分辨率像素。光学检查站和扫描电子显微镜系统用于检查缺陷并分类缺陷类型。然后可以通过除去光致抗蚀剂来清洁光刻图案，然后在去除光致抗蚀剂之后去除粘附到氧化物层上的聚合物颗粒，来重新使用测试晶片。

2. 发明授权

US07295288B1 Systems and methods of imprint lithography with adjustable mask 有权
标题翻译：带可调面罩的压印光刻系统和方法
公开(公告)号：US07295288B1
公开(公告)日：2007-11-13
申请号：US11000869
申请日：2004-12-01
申请人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
发明人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
IPC分类号： G03B27/62 , G03B27/02 , G03B27/20
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Systems and methodologies are provided that account for surface variations of a wafer by adjusting grating features of an imprint lithography mask. Such adjustment employs piezoelectric elements as part of the mask, which can change dimensions (e.g., a height change) and/or move when subjected to an electric voltage. Accordingly, by regulating the amount of electric voltage applied to the piezoelectric elements a controlled expansion for such elements can be obtained, to accommodate for topography variations of the wafer surface.
摘要翻译：提供了通过调节压印光刻掩模的光栅特征来考虑晶片的表面变化的系统和方法。这种调节使用压电元件作为掩模的一部分，其可以在经受电压时改变尺寸（例如，高度变化）和/或移动。因此，通过调节施加到压电元件的电压量，可以获得这些元件的受控膨胀，以适应晶片表面的形貌变化。

3. 发明授权

US07158896B1 Real time immersion medium control using scatterometry 失效
标题翻译：实时浸入介质控制采用散射法
公开(公告)号：US07158896B1
公开(公告)日：2007-01-02
申请号：US10978604
申请日：2004-11-01
申请人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
发明人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
IPC分类号： G06F19/00
CPC分类号： G03F7/70916 , G03F7/2041 , G03F7/70341
摘要： Systems and/or methods are disclosed for measuring and/or controlling an amount of impurity that is dissolved within an immersion medium employed with immersion lithography. The impurity can be photoresist from a photoresist layer coated upon a substrate surface. A known grating structure is built upon the substrate. A real time immersion medium monitoring component facilitates measuring and/or controlling the amount of impurities dissolved within the immersion medium by utilizing light scattered from the known grating structure.
摘要翻译：公开了用于测量和/或控制溶解在浸入式光刻中使用的浸渍介质中的杂质量的系统和/或方法。杂质可以是来自涂覆在基材表面上的光致抗蚀剂层的光致抗蚀剂。已知的光栅结构被构建在衬底上。实时浸没介质监测部件通过利用从已知光栅结构散射的光来便于测量和/或控制溶解在浸没介质中的杂质的量。

4. 发明授权

US07001830B2 System and method of pattern recognition and metrology structure for an X-initiative layout design 失效
标题翻译：用于X主动布局设计的模式识别和计量结构的系统和方法
公开(公告)号：US07001830B2
公开(公告)日：2006-02-21
申请号：US10653309
申请日：2003-09-02
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： G03F7/70625 , G03F7/70633 , G03F9/7076 , Y10S438/975
摘要： The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.
摘要翻译：本发明涉及用于提供用于检查晶片的最佳方法的检查方法和系统。该方法和系统包括晶片到标线片对准，层间对准和晶片表面特征检查。通过将对角线添加到现有的对准标记来减小交叉点大小和期望点可以驻留的对应区域来改善晶片到标线阵列对准。通过向现有覆盖目标添加倾斜和/或非线性线段，以类似的方式改善了层间对齐。此外，在多个所需的对角轴中提供晶片表面检查允许更精确的特征测量。

5. 发明授权

US06972201B1 Using scatterometry to detect and control undercut for ARC with developable BARCs 失效
标题翻译：使用散射法检测和控制ARC的可切割BARC的底切
公开(公告)号：US06972201B1
公开(公告)日：2005-12-06
申请号：US10755794
申请日：2004-01-12
申请人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
发明人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
IPC分类号： G03F7/09 , G03F7/30 , G03F7/38 , H01L21/00 , H01L21/027 , H01L21/66
CPC分类号： G03F7/3028 , G03F7/091 , G03F7/38 , H01L21/0276 , H01L22/12
摘要： Architecture for monitoring a bottom anti-reflective coating (BARC) undercut and residual portions thereof during a development stage using scatterometry. The scatterometry system monitors for BARC undercut and residual BARC material, and if detected, controls the process to minimize such effects in subsequent wafers. If one or more of such effects has exceeded a predetermined limit, the wafer is rerouted for further processing, which can include rework, etch back of the affected layer, or rejection of the wafer, for example.
摘要翻译：用于在使用散射测量的显影阶段期间监测底部抗反射涂层（BARC）底切及其残余部分的结构。散射测量系统监测BARC底切和残留BARC材料，如果检测到，则控制该过程以使后续晶片中的这种影响最小化。如果这种效应中的一个或多个已经超过预定限制，则晶片被重新路由以用于进一步处理，例如，其可以包括返工，受影响层的回蚀或晶片的拒绝。

6. 发明授权

US06741445B1 Method and system to monitor and control electro-static discharge 失效
标题翻译：监测和控制静电放电的方法和系统
公开(公告)号：US06741445B1
公开(公告)日：2004-05-25
申请号：US10050458
申请日：2002-01-16
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： H01T2300
CPC分类号： H01L21/67253
摘要： A system and methodology is provided for monitoring and controlling static charge during wafer and mask fabrication. The static charge on a target device is monitored. If the static charge becomes too high, corrective actions are taken to reduce the static charge. An antistatic solution is dispensed on the target device. The system and methodology provided reduce damage resulting from electrostatic discharge during fabrication. The system and methodology also reduce delays during fabrication by automatically controlling static charge without the need for manual intervention.
摘要翻译：提供了一种用于在晶片和掩模制造期间监测和控制静电荷的系统和方法。监视目标设备上的静电荷。如果静电荷过高，则采取纠正措施减少静电。抗静电溶液分配在目标装置上。所提供的系统和方法减少了制造过程中静电放电造成的损坏。该系统和方法还通过自动控制静电而减少制造过程中的延迟，而无需人工干预。

7. 发明授权

US06724476B1 Low defect metrology approach on clean track using integrated metrology 失效
标题翻译：使用综合计量的清洁轨道的低缺陷计量方法
公开(公告)号：US06724476B1
公开(公告)日：2004-04-20
申请号：US10261756
申请日：2002-10-01
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01N2100
CPC分类号： G01N21/9501
摘要： One aspect of the present invention relates to a system and method of monitoring for defects on a wafer before and after forming a photoresist layer on the wafer. The system includes a device fabrication system comprising one or more wafer processing system components for producing a device; a defect metrology system integrated within and on track with the fabrication system operative to inspect the wafer for defects before it proceeds to photoresist processing; and a wafer cleaning system for reducing an amount of defects detected on the front and/or back side of the wafer. If the amount of defects have been sufficiently reduced, the front side of the wafer may be coated with a photoresist. Subsequently, the back side of the wafer may be inspected and cleaned while protecting the front side from damage. Cleaning of the wafer may be performed with a thermal shock treatment, for example.
摘要翻译：本发明的一个方面涉及在晶片上形成光致抗蚀剂层之前和之后对晶片上的缺陷进行监测的系统和方法。该系统包括装置制造系统，其包括用于产生装置的一个或多个晶片处理系统部件; 在制造系统内部和轨道上集成的缺陷计量系统，其操作用于在进行光致抗蚀剂处理之前检查晶片的缺陷; 以及用于减少在晶片的前侧和/或后侧检测到的缺陷量的晶片清洁系统。如果缺陷的量已经被充分降低，则晶片的前侧可以涂覆有光致抗蚀剂。随后，可以在保护前侧免受损伤的同时检查和清洁晶片的背面。例如，可以进行热冲击处理来进行晶片的清洁。

8. 发明授权

US06684172B1 Sensor to predict void free films using various grating structures and characterize fill performance 失效
标题翻译：传感器预测使用各种光栅结构的无空隙膜，并表征填充性能
公开(公告)号：US06684172B1
公开(公告)日：2004-01-27
申请号：US10034165
申请日：2001-12-27
申请人： Ramkumar Subramanian , Steven C. Avanzino , Christopher F. Lyons , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Cyrus E. Tabery
发明人： Ramkumar Subramanian , Steven C. Avanzino , Christopher F. Lyons , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Cyrus E. Tabery
IPC分类号： G01L2500
CPC分类号： C23C16/52 , C23C14/547 , C23C18/1675 , C25D21/12 , H01L21/76877
摘要： One aspect of the invention relates to a metal fill process and systems therefor involving providing a standard calibration wafer having a plurality of fill features of known dimensions in a metalization tool; depositing a metal material over the standard calibration wafer; monitoring the deposition of metal material using a sensor system, the sensor system operable to measure one or more fill process parameters and to generate fill process data; controlling the deposition of metal material to minimize void formation using a control system wherein the control system receives fill process data from the sensor system and analyzes the fill process data to generate a feed-forward control data operative to control the metalization tool; and depositing metal material over a production wafer in the metalization tool using the fill process data generated by the sensor system and the control system. The invention further relates to tool characterization processes and systems therefor.
摘要翻译：本发明的一个方面涉及一种金属填充方法及其系统，其涉及在金属化工具中提供具有已知尺寸的多个填充特征的标准校准晶片; 在标准校准晶片上沉积金属材料; 使用传感器系统监测金属材料的沉积，所述传感器系统可操作以测量一个或多个填充过程参数并产生填充过程数据; 控制金属材料的沉积以最小化使用控制系统的空隙形成，其中控制系统从传感器系统接收填充过程数据并分析填充过程数据以产生可操作以控制金属化工具的前馈控制数据; 以及使用由传感器系统和控制系统产生的填充过程数据在金属化工具中的生产晶片上沉积金属材料。本发明还涉及其工具表征过程及其系统。

9. 发明授权

US06665065B1 Defect detection in pellicized reticles via exposure at short wavelengths 有权
标题翻译：通过在短波长下的曝光在斑点状掩模版中的缺陷检测
公开(公告)号：US06665065B1
公开(公告)日：2003-12-16
申请号：US09829195
申请日：2001-04-09
申请人： Khoi A. Phan , Bhanwar Singh , Wolfram Porsche
发明人： Khoi A. Phan , Bhanwar Singh , Wolfram Porsche
IPC分类号： G01N2100
CPC分类号： G01N21/95692
摘要： A system and method are provided for detecting latent defects in a mask or reticle, which defects may vary as a function of radiation at exposure wavelengths. By way of example, the mask or reticle is inspected, exposed to radiation at a specified wavelength, and then reinspected. A correlation between the inspection results before and after exposure provides an indication of exposure-related defects, which may include defect growth and/or formation of defects caused by the exposure. By way of further illustration, the combination of inspection and exposure of a mask or reticle may be implemented with respect to a pellicized mask or reticle so as to detect additional defects related to use of the pellicle with the mask or reticle.
摘要翻译：提供了用于检测掩模或掩模版中的潜在缺陷的系统和方法，该缺陷可以随曝光波长的辐射而变化。作为示例，检查掩模或掩模版，暴露于指定波长的辐射，然后再检查。暴露前后的检查结果之间的相关性提供暴露相关缺陷的指示，其可以包括由暴露引起的缺陷生长和/或形成缺陷。为了进一步说明，掩模或掩模版的检查和曝光的组合可以相对于薄膜掩模或掩模版实现，以便检测与使用掩模或掩模版的防护薄膜相关的附加缺陷。

10. 发明授权

US06613500B1 Reducing resist residue defects in open area on patterned wafer using trim mask 有权
标题翻译：使用修剪掩模减少图案化晶片上的开放区域中的抗蚀剂残留缺陷
公开(公告)号：US06613500B1
公开(公告)日：2003-09-02
申请号：US09824079
申请日：2001-04-02
申请人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Jeff Erhardt
发明人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Jeff Erhardt
IPC分类号： G03F700
CPC分类号： G03F7/70425 , G03F7/2022 , G03F7/203 , G03F7/70466
摘要： One aspect of the present invention relates to a method for reducing resist residue defects on a wafer structure. The method involves providing a semiconductor structure having a photoresist, the photoresist comprising open areas and circuit areas thereon; irradiating the open areas and circuit areas through a first photomask with a first energy dose to effect an image-wise pattern in the photoresist; irradiating the open areas of the photoresist through a second photomask with a second energy dose; and developing the photoresist.
摘要翻译：本发明的一个方面涉及减少晶片结构上的抗蚀剂残留缺陷的方法。该方法包括提供具有光致抗蚀剂的半导体结构，光致抗蚀剂包括开放区域和其上的电路区域; 通过具有第一能量剂量的第一光掩模照射开放区域和电路区域以在光致抗蚀剂中实现成像图案; 通过具有第二能量剂量的第二光掩模照射光致抗蚀剂的开放区域; 并显影光致抗蚀剂。

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