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1. 发明授权

US5721526A Compact high-voltage variable resistor 失效
标题翻译：紧凑型高压可变电阻
公开(公告)号：US5721526A
公开(公告)日：1998-02-24
申请号：US683706
申请日：1996-07-18
申请人： Kazufumi Daimon , Tsuyoshi Ohta , Kenichi Hiraki
发明人： Kazufumi Daimon , Tsuyoshi Ohta , Kenichi Hiraki
IPC分类号： H01C10/32 , H01C10/30
CPC分类号： H01C10/32
摘要： A high-voltage variable resistor capable of significantly reducing a circuit board as compared with a prior art. Terminal fitments each are arranged so as to function as a connector for forming electrical connection between a slide element slid on each of variable resistance patterns and a terminal acting as an output section. A contact point between a contact on a contact support of the terminal fitment and a plate-like member of the slide element is positioned apart from a surface of the circuit board. The terminal fitment includes a positioner, which is positioned outside the pattern in a radial direction thereof, so that the positioner intersects the pattern while being spaced therefrom.
摘要翻译：与现有技术相比，能够显着地减少电路板的高压可变电阻器。端子配件各自布置成用作用于在滑动每个可变电阻图案的滑动元件和用作输出部分的端子之间形成电连接的连接器。端子配件的触点支撑件上的触点与滑动元件的板状元件之间的接触点位于与电路板的表面分开的位置。端子配件包括定位器，其定位在图案的径向方向外侧，使得定位器与图案间隔开。

2. 发明授权

US06200156B1 Terminal fitment for lead wire connection and high-voltage variable resistor unit with relay terminal fitment 失效
标题翻译：引线连接端子配件和带继电器端子配件的高压可变电阻单元
公开(公告)号：US06200156B1
公开(公告)日：2001-03-13
申请号：US09449788
申请日：1999-11-26
申请人： Kenichi Hiraki , Tsuyoshi Ohta , Kazufumi Daimon
发明人： Kenichi Hiraki , Tsuyoshi Ohta , Kazufumi Daimon
IPC分类号： H01R1120
CPC分类号： H01R4/26 , H01C13/00 , H01R13/6616
摘要： A lead wire connection terminal fitment capable of permitting a plurality of lead wires to be readily press-fitted in a single lead wire press fit groove. The terminal fitment may be in the form of a relay terminal fitment, which includes a metal plate formed with a lead wire press fit groove by machining in which lead wires are press-fitted. A pair of inner surfaces of the metal plate defining the lead wire press fit groove therebetween are formed thereon with a plurality of projections and recesses engaged with an outer periphery of lead wires. The projections biting into the lead wires are so arranged that a space defined between the projections opposite to each other is reduced in width at a position thereof spaced by a distance in a depth direction of the lead wire press fit groove, resulting in being divided into a first space portion increased in width and a second space portion decreased in width.
摘要翻译：一种能够使多根引线容易地压入单个引线压配合槽的引线连接端子配件。端子配件可以是中继端子配件的形式，其包括通过加工而形成有引线压配合槽的金属板，其中压配有引线。金属板的一对内表面在其间形成有引线压配合槽，其上形成有与引线的外周接合的多个突起和凹部。引入引线的突起被布置成使得彼此相对的突起之间限定的空间在与引线压配合槽的深度方向上间隔距离的位置处宽度减小，从而被分成宽度增加的第一空间部分和宽度减小的第二空间部分。

3. 发明授权

US09153608B2 Photodiode array, method for determining reference voltage, and method for determining recommended operating voltage 有权
标题翻译：光电二极管阵列，确定参考电压的方法以及确定推荐工作电压的方法
公开(公告)号：US09153608B2
公开(公告)日：2015-10-06
申请号：US13247192
申请日：2011-09-28
申请人： Kenichi Sato , Shogo Kamakura , Shigeyuki Nakamura , Tsuyoshi Ohta , Michito Hirayanagi , Hiroki Suzuki , Shunsuke Adachi
发明人： Kenichi Sato , Shogo Kamakura , Shigeyuki Nakamura , Tsuyoshi Ohta , Michito Hirayanagi , Hiroki Suzuki , Shunsuke Adachi
IPC分类号： H01J40/14 , H01F3/08 , H03K17/78 , H01L27/00 , H01J31/50 , H01L27/144
CPC分类号： H01L27/1446
摘要： A reverse bias voltage is applied to a photodiode array provided with a plurality of avalanche photodiodes operated in Geiger mode and with quenching resistors connected in series to the respective avalanche photodiodes. Electric current is measured with change of the reverse bias voltage applied, and the reverse bias voltage at an inflection point in change of electric current measured is determined as a reference voltage. A voltage obtained by adding a predetermined value to the determined reference voltage is determined as a recommended operating voltage.
摘要翻译：反向偏置电压被施加到设置有以盖革模式操作的多个雪崩光电二极管的光电二极管阵列，以及与相应的雪崩光电二极管串联连接的淬火电阻器。以施加的反向偏置电压的变化来测量电流，并且将测量的电流变化中的拐点处的反向偏置电压确定为参考电压。将通过将预定值加到所确定的参考电压而获得的电压被确定为推荐的工作电压。

4. 发明申请

US20070145416A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20070145416A1
公开(公告)日：2007-06-28
申请号：US11616603
申请日：2006-12-27
申请人： Tsuyoshi Ohta , Bungo Tanaka
发明人： Tsuyoshi Ohta , Bungo Tanaka
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L29/0649 , H01L29/0696 , H01L29/4236 , H01L29/42372 , H01L29/4925 , H01L29/4958 , H01L29/7397
摘要： A semiconductor device comprises on a surface of a first semiconductor layer of the first conduction type a second semiconductor layer of the first conduction type. A semiconductor base layer of the second conduction type is formed on the second semiconductor layer, and a semiconductor diffusion layer of the first conduction type is formed on a surface of the semiconductor base layer. A trench is formed from the surface of the semiconductor diffusion layer to a depth reaching the second semiconductor layer. A gate electrode is formed of a conductor film buried in the trench with a gate insulator interposed therebetween. The conductor film includes a first conductor film formed along the gate electrode to have a recess and a second conductor film formed to fill the recess.
摘要翻译：半导体器件包括在第一导电类型的第一半导体层的表面上的第一导电类型的第二半导体层。第二导电类型的半导体基层形成在第二半导体层上，并且在半导体基底层的表面上形成第一导电类型的半导体扩散层。从半导体扩散层的表面到到达第二半导体层的深度形成沟槽。栅电极由埋在沟槽中的导体膜形成，栅极绝缘体插入其间。导体膜包括沿着栅电极形成以具有凹部的第一导体膜和形成为填充凹部的第二导体膜。

5. 发明授权

US5556729A Negatively chargeable electrophotographic photoreceptor 失效
标题翻译：可负电荷的电子照相感光体
公开(公告)号：US5556729A
公开(公告)日：1996-09-17
申请号：US464466
申请日：1995-06-05
申请人： Yuzuru Fukuda , Tsuyoshi Ohta , Masato Ono , Taketoshi Higashi , Shigeru Yagi
发明人： Yuzuru Fukuda , Tsuyoshi Ohta , Masato Ono , Taketoshi Higashi , Shigeru Yagi
IPC分类号： G03G5/08 , G03G5/082 , G03G5/147
CPC分类号： G03G5/08235 , G03G5/08278
摘要： An electrophotographic photoreceptor comprising: an electrically conductive substrate, a charge injection blocking layer formed on said electrically conductive substrate, a photoconductive layer comprising a single layer formed on said charge injection blocking layer, said photoconductive layer comprising amorphous silicon containing boron, a positive hole capturing layer formed on said photoconductive layer, said positive hole capturing layer being selected from the group comprising amorphous silicon containing less than 50 ppm boron and amorphous silicon being substantially composed of hydrogen and silicon atoms, and a surface layer formed on said positive hole capturing layer. The boron concentration contained in said photoconductive layer is 0.01-1000 ppm. The surface layer is formed by amorphous silicon nitride, amorphous silicon oxide, amorphous silicon carbide or amorphous carbon as a main body. The charge injection blocking layer has amorphous silicon as a main body and contains a group V element. The electrophotographic photoreceptor is excellent in the dark attenuation, the sensitivity and electrification capacity and does not cause image flow or image fogging on copied images obtained by using the photoreceptor.
摘要翻译：一种电子照相感光体，其特征在于，具有：导电性基板，形成在所述导电性基板上的电荷注入阻挡层，含有形成于所述电荷注入阻挡层上的单层的光电导层，所述光电导层含有含硼的非晶硅，所述空穴捕获层选自含有小于50ppm硼的非晶硅和基本上由氢和硅原子组成的非晶硅，以及形成在所述正空穴捕获层上的表面层。所述光电导层中含有的硼浓度为0.01〜1000ppm。表面层由非晶氮化硅，非晶氧化硅，非晶碳化硅或无定形碳作为主体形成。电荷注入阻挡层以非晶硅为主体，含有V族元素。电子照相感光体在黑暗衰减，灵敏度和带电能力方面优异，并且不会对通过使用感光体获得的复印图像上的图像流动或图像起雾。

6. 发明授权

US08502305B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08502305B2
公开(公告)日：2013-08-06
申请号：US13421816
申请日：2012-03-15
申请人： Tsuyoshi Ohta , Tatsuya Nishiwaki , Norio Yasuhara , Masatoshi Arai , Takahiro Kawano
发明人： Tsuyoshi Ohta , Tatsuya Nishiwaki , Norio Yasuhara , Masatoshi Arai , Takahiro Kawano
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L21/2255 , H01L21/26586 , H01L29/0696 , H01L29/0856 , H01L29/1095 , H01L29/407 , H01L29/42368 , H01L29/42376 , H01L29/66734 , H01L29/861
摘要： According to an embodiment, a semiconductor device includes a semiconductor layer of a first conductive type, a base region of a second conductive type provided on the semiconductor layer and a first contact region of a second conductive type provided on the base region. The device includes a gate electrode provided in a trench piercing through the first contact region and the base region, and an interlayer insulating film provided on the gate electrode and containing a first conductive type impurity element. The device further includes a source region of a first conductive type provided between the interlayer insulating film and the first contact region, the source region being in contact with a side face of the interlayer insulating film and extending in the base region.
摘要翻译：根据实施例，半导体器件包括第一导电类型的半导体层，设置在半导体层上的第二导电类型的基极区域和设置在基极区域上的第二导电类型的第一接触区域。该器件包括设置在穿过第一接触区域和基极区域的沟槽中的栅电极，以及设置在栅极上并包含第一导电型杂质元素的层间绝缘膜。该器件还包括设置在层间绝缘膜和第一接触区域之间的第一导电类型的源极区域，源极区域与层间绝缘膜的侧面接触并且在基极区域中延伸。

7. 外观设计

USD589698S1 Key case 有权
公开(公告)号：USD589698S1
公开(公告)日：2009-04-07
申请号：US29323741
申请日：2008-08-29
申请人： Tsuyoshi Ohta , Rumi Ohta
设计人： Tsuyoshi Ohta , Rumi Ohta

8. 发明授权

US5631087A Electrostatic image-bearing dielectric member 失效
标题翻译：静电影像承载电介质
公开(公告)号：US5631087A
公开(公告)日：1997-05-20
申请号：US479566
申请日：1995-06-07
申请人： Yuzuru Fukuda , Shigeru Yagi , Tsuyoshi Ohta , Masato Ono
发明人： Yuzuru Fukuda , Shigeru Yagi , Tsuyoshi Ohta , Masato Ono
IPC分类号： G03G5/02 , G03G5/082 , B23B9/00
CPC分类号： G03G5/0217 , G03G5/08285 , Y10T428/30
摘要： An electrostatic image-bearing dielectric member comprises a support and a dielectric layer formed on the support. The dielectric layer is formed of at least one of amorphous carbon, diamond-like carbon and diamond. The dielectric layer may contain not larger than 60 atomic percent of at least one of hydrogen and fluorine. An intermediate layer may be provided between the support and the dielectric layer in order to improve the adhesion therebetween.
摘要翻译：静电图像承载电介质构件包括支撑体和形成在支撑体上的电介质层。电介质层由无定形碳，类金刚石碳和金刚石中的至少一种形成。电介质层可以含有不大于60原子％的氢和氟中的至少一种。可以在支撑体和电介质层之间设置中间层，以改善它们之间的粘合性。

9. 发明授权

US5548112A Photodetecting circuit using avalanche photodiode 失效
标题翻译：使用雪崩光电二极管的光检测电路
公开(公告)号：US5548112A
公开(公告)日：1996-08-20
申请号：US359722
申请日：1994-12-20
申请人： Shigeki Nakase , Shigeyuki Nakamura , Tsuyoshi Ohta
发明人： Shigeki Nakase , Shigeyuki Nakamura , Tsuyoshi Ohta
IPC分类号： G01D5/30 , G01D5/36 , H01L31/10 , H01L31/107 , H03F3/08 , H03K17/78 , H04B10/07 , H04B10/40 , H04B10/50 , H04B10/60 , H04B10/67 , H04B10/80 , H01J40/14
CPC分类号： H03F3/087 , H01L31/107 , H04B10/6911
摘要： A photodetecting circuit using an avalanche photodiode of the present invention has an avalanche photodiode, and a bias control means for applying a bias voltage to the avalanche photodiode to drive the avalanche photodiode at a high multiplication factor. The bias control means has a diode having the same temperature dependence of a breakdown voltage as that of the avalanche photodiode, and a control circuit for applying positive and negative potentials with respect to the ground potential between the anode and the cathode of the diode such that the diode is set in a breakdown state at a predetermined current. A positive or negative potential is applied from one of the anode and the cathode of the avalanche photodiode as a bias voltage, and a photocurrent is output from the other terminal of the avalanche photodiode.
摘要翻译：使用本发明的雪崩光电二极管的光检测电路具有雪崩光电二极管，以及偏置控制装置，用于向雪崩光电二极管施加偏置电压，以高倍增系数驱动雪崩光电二极管。偏置控制装置具有与雪崩光电二极管的击穿电压相同的温度依赖性的二极管，以及用于相对于二极管的阳极和阴极之间的接地电位施加正和负电位的控制电路，使得二极管以预定电流设置为击穿状态。从雪崩光电二极管的阳极和阴极之一施加正电位或负电位作为偏置电压，并从雪崩光电二极管的另一端输出光电流。

10. 发明授权

US08629526B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08629526B2
公开(公告)日：2014-01-14
申请号：US13233941
申请日：2011-09-15
申请人： Tsuyoshi Ohta , Masatoshi Arai , Miwako Suzuki
发明人： Tsuyoshi Ohta , Masatoshi Arai , Miwako Suzuki
IPC分类号： H01L29/47
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/36 , H01L29/402 , H01L29/66136 , H01L29/66143 , H01L29/861
摘要： According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type and a first electrode. The second regions are provided separately on a first major surface side of the first layer. The third region is provided on the first major surface side of the first layer so as to surround the second regions. The first electrode is provided on the first layer and the second regions. The first layer has a first portion and a second portion. The second portion has a lower resistivity than the first portion. The second portion is provided between the second regions and between the first portion and the first major surface and is provided outside the third region and between the first portion and the first major surface.
摘要翻译：根据一个实施例，半导体器件包括第一导电类型的第一半导体层，第二导电类型的多个第二半导体区域，第二导电类型的第三半导体区域和第一电极。第二区域分别设置在第一层的第一主表面侧。第三区域设置在第一层的第一主表面侧，以围绕第二区域。第一电极设置在第一层和第二区域上。第一层具有第一部分和第二部分。第二部分具有比第一部分更低的电阻率。第二部分设置在第二区域之间以及第一部分与第一主表面之间，并且设置在第三区域的外部以及第一部分与第一主表面之间。

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