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1. 发明授权

US4197472A Voltage comparator having capacitively cascade-connected inverting amplifiers 失效
标题翻译：具有电容级联连接的反相放大器的电压比较器
公开(公告)号：US4197472A
公开(公告)日：1980-04-08
申请号：US925802
申请日：1978-07-18
申请人： Kazuhide Aoki , Yasuo Nakada
发明人： Kazuhide Aoki , Yasuo Nakada
IPC分类号： H03F3/16 , G01R19/00 , H03F3/34 , H03F3/345 , H03K5/08 , H03K5/24 , H03K5/20 , H03K17/60
CPC分类号： G01R19/0038 , H03K5/249
摘要： A voltage comparator suitable for use in an analog-to-digital converter such as a successive-approximation converter which is comprised of a plurality of capacitively cascade-connected inverters to generate an output signal of a logic level 1 or 0 according to the relationship between the magnitudes of two analog input voltage signals to be compared. A bias circuit for impressing a bias voltage on the inputs of the inverters comprises first and second MOS transistor resistor elements connected in series across a power source and a third MOS transistor which is connected in parallel to the second MOS transistor, and whose gate is supplied with a control voltage so that the inverters are respectively biased to the optimum operation point for comparison through adjustment of the control voltage. With another embodiment of this invention, the respective inverters are automatically biased to the optimum operation point for comparison by detection of the bias voltage of inverters.
摘要翻译：一种适用于诸如逐次逼近转换器的模数转换器的电压比较器，其包括多个电容级联连接的反相器，以根据以下之间的关系产生逻辑电平1或0的输出信号两个模拟输入电压信号的幅度要比较。用于对反相器的输入施加偏置电压的偏置电路包括串联连接在电源上的第一和第二MOS晶体管电阻元件和与第二MOS晶体管并联连接并且其栅极被提供的第三MOS晶体管具有控制电压，使得逆变器被分别偏置到最佳操作点，以通过调节控制电压进行比较。在本发明的另一实施例中，通过检测逆变器的偏置电压，各自的逆变器被自动偏置到最佳操作点进行比较。

2. 发明授权

US4211942A Voltage comparator provided with capacitively cascade-connected inverting amplifiers 失效
标题翻译：电压比较器提供电容级联连接的反相放大器
公开(公告)号：US4211942A
公开(公告)日：1980-07-08
申请号：US925801
申请日：1978-07-18
申请人： Kazuhide Aoki , Kenji Kawagai
发明人： Kazuhide Aoki , Kenji Kawagai
IPC分类号： H03K5/08 , G01R19/165 , H03K5/24 , H03M1/00 , H03K5/20 , H03K17/60
CPC分类号： H03K5/249 , G01R19/16557 , H03M1/42
摘要： A voltage comparator suitable for use in an analog-to-digital converter such as a successive-approximation converter, and provided with capacitively cascade-connected inverter stages to produce an output signal of a logic level 1 or 0 according to the relationship between the magnitudes of two analog input voltage signals to be compared. A first series circuit of an MOS switching transistor and resistive element is connected between the input and output of the respective inverters; a second series circuit of a MOS switching transistor and resistive element is connected between the input of each inverter and circuit ground. The MOS transistors of the first and second series circuits are simultaneously enabled or disabled by a clock pulse; and two input voltage signals to be compared are alternately applied to the first stage coupling capacitor.
摘要翻译：适用于诸如逐次逼近转换器的模 - 数转换器中的电压比较器，并且具有电容级联连接的反相器级，以根据幅度之间的关系产生逻辑电平1或0的输出信号两个模拟输入电压信号进行比较。 MOS开关晶体管和电阻元件的第一串联电路连接在各个逆变器的输入和输出之间; MOS开关晶体管和电阻元件的第二串联电路连接在每个逆变器的输入端和电路接地之间。第一和第二串联电路的MOS晶体管由时钟脉冲同时使能或禁止; 并且要比较的两个输入电压信号交替地施加到第一级耦合电容器。

3. 发明授权

US4418418A Parallel-serial converter 失效
标题翻译：并行串行转换器
公开(公告)号：US4418418A
公开(公告)日：1983-11-29
申请号：US324557
申请日：1981-11-24
申请人： Kazuhide Aoki
发明人： Kazuhide Aoki
IPC分类号： G11C19/28 , G11C19/38 , H03M9/00 , H03K23/22
CPC分类号： G11C19/38 , H03M9/00
摘要： A parallel-serial converter comprises a plurality of selection-delay unit circuits. The unit circuit selectively receives an output signal from the immediately preceding unit circuit and one of a plurality of input parallel signals and shifts the selectively received signal to the immediately succeeding unit circuit. The selection-delay unit circuit is only formed of three transfer gates and two inverters in order to reduce a chip size and save power consumption.
摘要翻译：并行串行转换器包括多个选择延迟单元电路。单元电路选择性地接收来自紧接在前的单元电路的输出信号和多个输入并行信号中的一个，并将选择性地接收的信号移位到紧随其后的单元电路。选择延迟单元电路仅由三个传输门和两个反相器构成，以便减小芯片尺寸并节省功耗。

4. 发明授权

US4217505A Monostable multivibrator 失效
标题翻译：单稳态多谐振荡器
公开(公告)号：US4217505A
公开(公告)日：1980-08-12
申请号：US954822
申请日：1978-10-26
申请人： Kazuhide Aoki , Kenji Kawagai , Akira Nagae , Shuichi Goto
发明人： Kazuhide Aoki , Kenji Kawagai , Akira Nagae , Shuichi Goto
IPC分类号： H03K5/04 , H03K3/02 , H03K3/355 , H03K3/284
CPC分类号： H03K3/355
摘要： Disclosed is a monostable multivibrator in which an output voltage of an integrating circuit and a reference voltage from a reference voltage source are compared by means of a comparator, and a flip-flop is set in response to a comparison voltage of the comparator and reset in response to an external reset signal. The output of the flip-flop operates a transistor for controlling the discharge of a capacitor of the integrating circuit, and is taken out as an output pulse of the monostable multivibrator.
摘要翻译：公开了一种单稳态多谐振荡器，其中通过比较器比较积分电路的输出电压和参考电压的参考电压，并且触发器响应于比较器的比较电压而被设置，并且复位响应外部复位信号。触发器的输出操作用于控制积分电路的电容器的放电的晶体管，并且作为单稳态多谐振荡器的输出脉冲被取出。

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