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1. 发明授权

US08604536B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08604536B2
公开(公告)日：2013-12-10
申请号：US12406841
申请日：2009-03-18
申请人： Katsuyuki Sekine , Yoshio Ozawa
发明人： Katsuyuki Sekine , Yoshio Ozawa
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/513 , H01L29/66833
摘要： A semiconductor device includes a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first lower insulating film, a first upper insulating film provided on the first intermediate insulating film, and a first gate electrode provided on the first upper insulating film, and a select transistor including a second lower insulating film provided on the semiconductor substrate, a second intermediate insulating film provided on the second lower insulating film, a second upper insulating film provided on the second intermediate insulating film, and a second gate electrode provided on the second upper insulating film, wherein trap density of the second intermediate insulating film is lower than that of the first intermediate insulating film.
摘要翻译：半导体器件包括存储单元晶体管，其包括设置在半导体衬底上的第一下绝缘膜，设置在第一下绝缘膜上的第一中间绝缘膜，设置在第一中间绝缘膜上的第一上绝缘膜和第一栅极设置在第一上绝缘膜上的电极和设置在半导体衬底上的第二下绝缘膜的选择晶体管，设置在第二下绝缘膜上的第二中间绝缘膜，设置在第二中间绝缘膜上的第二上绝缘膜以及设置在第二上绝缘膜上的第二栅电极，其中第二中间绝缘膜的阱密度低于第一中间绝缘膜的陷阱密度。

2. 发明授权

US07999304B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07999304B2
公开(公告)日：2011-08-16
申请号：US12026942
申请日：2008-02-06
申请人： Yoshio Ozawa , Akihito Yamamoto , Katsuaki Natori , Masayuki Tanaka , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
发明人： Yoshio Ozawa , Akihito Yamamoto , Katsuaki Natori , Masayuki Tanaka , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
IPC分类号： H01L29/76
CPC分类号： H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/512 , H01L29/513 , H01L29/66825 , H01L29/7881
摘要： A semiconductor device includes a semiconductor substrate, and nonvolatile memory cells, each of the cells including a channel region having a channel length and a channel width, a tunnel insulating film, a floating gate electrode, a control gate electrode, an inter-electrode insulating film between the floating and control gate electrodes, and an electrode side-wall insulating film on side-wall surfaces of the floating and control gate electrodes, the electrode side-wall insulating film including first and second insulating films having first and second dielectric constants, the first dielectric constant being higher than the second dielectric constant, the second dielectric constant being higher than a dielectric constant of a silicon nitride film, the first insulating film being in a central region of a facing region between the floating and control gate electrodes, the second insulating region being in the both end regions of the facing region and protruding from the both end portions.
摘要翻译：半导体器件包括半导体衬底和非易失性存储单元，每个单元包括具有沟道长度和沟道宽度的沟道区，隧道绝缘膜，浮栅电极，控制栅电极，电极间绝缘在浮置控制栅电极和控制栅极电极的侧壁表面之间的电极侧壁绝缘膜，电极侧壁绝缘膜包括具有第一和第二介电常数的第一和第二绝缘膜，所述第一介电常数高于所述第二介电常数，所述第二介电常数高于氮化硅膜的介电常数，所述第一绝缘膜位于所述浮动栅极和控制栅电极之间的面对区域的中心区域中，第二绝缘区域位于面对区域的两端区域中并从两端口突出 ons。

3. 发明申请

US20110069530A1 NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20110069530A1
公开(公告)日：2011-03-24
申请号：US12823467
申请日：2010-06-25
申请人： Katsuyuki SEKINE , Ryota Fujitsuka , Yoshio Ozawa
发明人： Katsuyuki SEKINE , Ryota Fujitsuka , Yoshio Ozawa
IPC分类号： G11C11/00 , H01L21/66
CPC分类号： G11C13/0069 , G11C11/005 , G11C11/5685 , G11C13/0007 , G11C13/0064 , G11C2013/0083 , G11C2213/32 , G11C2213/34 , G11C2213/72 , H01L27/101
摘要： According to one embodiment, there is provided a method of manufacturing a nonvolatile memory device. In this method, a first voltage may be applied to a variable resistive element having a resistance value which is electrically rewritable in a high resistance and in a low resistance. In this method, a second voltage may be applied to the variable resistive element in a case where the resistance value of the variable resistive element to which the first voltage has been applied is greater than a resistance value of the low resistance and is not greater than a resistance value of the high resistance. Further, in this method, the applying of the second voltage to the variable resistive element may be repeated until the resistance value of the variable resistive element to which the second voltage has been applied falls within a range of the resistance value of the low resistance.
摘要翻译：根据一个实施例，提供了一种制造非易失性存储器件的方法。在该方法中，可以将第一电压施加到具有电阻可变的电阻值的高电阻和低电阻的可变电阻元件。在该方法中，在施加了第一电压的可变电阻元件的电阻值大于低电阻的电阻值的情况下，可以向可变电阻元件施加第二电压，并且不大于电阻值为高电阻。此外，在该方法中，可以重复向可变电阻元件施加第二电压，直到施加了第二电压的可变电阻元件的电阻值落在低电阻的电阻值的范围内。

4. 发明授权

US07863166B2 Method of manufacturing semiconductor storage device 有权
标题翻译：制造半导体存储装置的方法
公开(公告)号：US07863166B2
公开(公告)日：2011-01-04
申请号：US12646563
申请日：2009-12-23
申请人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
发明人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
IPC分类号： H01L21/20
CPC分类号： H01L27/115 , H01L21/76264 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203 , H01L29/66825
摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
摘要翻译：一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在开口部。然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。然后，在硅单晶层上形成存储单元阵列。

5. 发明申请

US20100314602A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100314602A1
公开(公告)日：2010-12-16
申请号：US12728579
申请日：2010-03-22
申请人： Kensuke Takano , Yoshio Ozawa , Katsuyuki Sekine , Junichi Wada
发明人： Kensuke Takano , Yoshio Ozawa , Katsuyuki Sekine , Junichi Wada
IPC分类号： H01L45/00 , H01L21/28
CPC分类号： H01L45/08 , G11C11/5685 , G11C13/0007 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/1608 , H01L45/1666
摘要： A nonvolatile memory device includes: a first conductive layer; a second conductive layer; a first resistance change layer provided between the first conductive layer and the second conductive layer and having an electrical resistance changing with at least one of an applied electric field and a passed current; and a first lateral layer provided on a lateral surface of the first resistance change layer and having an oxygen concentration higher than an oxygen concentration in the first resistance change layer
摘要翻译：非易失性存储器件包括：第一导电层; 第二导电层; 第一电阻变化层，设置在所述第一导电层和所述第二导电层之间，并且具有通过施加电场和通过电流中的至少一个而改变的电阻; 以及第一侧面层，设置在第一电阻变化层的侧面上，其氧浓度高于第一电阻变化层中的氧浓度

6. 发明申请

US20090273021A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090273021A1
公开(公告)日：2009-11-05
申请号：US12432453
申请日：2009-04-29
申请人： Katsuyuki SEKINE , Daisuke Nishida , Ryota Fujitsuka , Yoshio Ozawa , Katsuaki Natori , Takashi Nakao
发明人： Katsuyuki SEKINE , Daisuke Nishida , Ryota Fujitsuka , Yoshio Ozawa , Katsuaki Natori , Takashi Nakao
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/4234 , H01L29/7887
摘要： A semiconductor device includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a charge storage layer on the tunnel insulating film, a block insulating film on the charge storage layer, and a control gate electrode on the block insulating film, the charge storage layer including a plurality of layers including first and second charge storage layers, the second charge storage layer being provided on a nearest side of the block insulating film, the first charge storage layer being provided between the tunnel insulating film and the second charge storage layer, the second charge storage layer having a higher trap density than the first charge storage layer, the second charge storage layer having a smaller band gap than the first charge storage layer, and the second charge storage layer having a higher permittivity than the first charge storage layer and a silicon nitride film.
摘要翻译：半导体器件包括半导体衬底，半导体衬底上的隧道绝缘膜，隧道绝缘膜上的电荷存储层，电荷存储层上的块绝缘膜和块绝缘膜上的控制栅电极，电荷存储层，包括包括第一和第二电荷存储层的多个层，所述第二电荷存储层设置在所述块绝缘膜的最近侧，所述第一电荷存储层设置在所述隧道绝缘膜和所述第二电荷存储层之间所述第二电荷存储层具有比所述第一电荷存储层高的陷阱密度，所述第二电荷存储层具有比所述第一电荷存储层更小的带隙，并且所述第二电荷存储层具有比所述第一电荷存储层高的介电常数层和氮化硅膜。

7. 发明授权

US07521263B2 Method of forming an insulating film, method of manufacturing a semiconductor device, and semiconductor device 有权
标题翻译：形成绝缘膜的方法，制造半导体器件的方法以及半导体器件
公开(公告)号：US07521263B2
公开(公告)日：2009-04-21
申请号：US11270536
申请日：2005-11-10
申请人： Ichiro Mizushima , Masayuki Tanaka , Katsuaki Natori , Yoshio Ozawa , Seiji Inumiya , Katsuyuki Sekine , Tetsuya Kai
发明人： Ichiro Mizushima , Masayuki Tanaka , Katsuaki Natori , Yoshio Ozawa , Seiji Inumiya , Katsuyuki Sekine , Tetsuya Kai
IPC分类号： H01L21/00
CPC分类号： H01L21/02236 , H01L21/022 , H01L21/28273 , H01L21/3142 , H01L21/31616 , H01L21/31645 , H01L29/513 , H01L29/7881
摘要： A method of forming an insulating film includes forming a base film comprising a material whose surface is oxidized by being exposed to an oxidant. A source gas containing a metal material and a first oxidant having a first oxidation force are alternately supplied to form a first insulating film on the base film. A source gas containing a metal material and a second oxidant having a second oxidation force stronger than the first oxidation force are alternately supplied to form a second insulating film on the first insulating film.
摘要翻译：形成绝缘膜的方法包括形成包括通过暴露于氧化剂而使其表面被氧化的材料的基膜。交替地供给含有金属材料的源气体和具有第一氧化力的第一氧化剂，以在基膜上形成第一绝缘膜。交替地供给含有金属材料的源气体和具有比第一氧化力更强的第二氧化力的第二氧化剂，以在第一绝缘膜上形成第二绝缘膜。

8. 发明申请

US20070287254A1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20070287254A1
公开(公告)日：2007-12-13
申请号：US11727536
申请日：2007-03-27
申请人： Katsuaki Natori , Masayuki Tanaka , Akihito Yamamoto , Katsuyuki Sekine , Ryota Fujitsuka , Daisuke Nishida , Yoshio Ozawa
发明人： Katsuaki Natori , Masayuki Tanaka , Akihito Yamamoto , Katsuyuki Sekine , Ryota Fujitsuka , Daisuke Nishida , Yoshio Ozawa
IPC分类号： H01L21/336
CPC分类号： H01L27/11568 , H01L27/115 , H01L27/11521
摘要： A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, wherein forming the second insulating film comprises forming an insulating film containing silicon using source gas not containing chlorine, and forming an insulating film containing oxygen and a metal element on the insulating film containing silicon.
摘要翻译：一种制造半导体器件的方法，包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极其中，形成所述第二绝缘膜包括使用不含氯的源气体形成含硅的绝缘膜，以及在含有硅的绝缘膜上形成含有氧和金属元素的绝缘膜。

9. 发明申请

US20070241390A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070241390A1
公开(公告)日：2007-10-18
申请号：US11783952
申请日：2007-04-13
申请人： Masayuki Tanaka , Daisuke Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
发明人： Masayuki Tanaka , Daisuke Nishida , Ryota Fujitsuka , Katsuyuki Sekine , Akihito Yamamoto , Katsuaki Natori , Yoshio Ozawa
IPC分类号： H01L29/76
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521 , H01L29/7883
摘要： A semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, the second insulating film including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及形成在第二绝缘膜上的控制电极，所述第二绝缘膜包括下氮化硅膜，形成在所述下氮化硅膜上的下氧化硅膜，形成在所述下氧化硅膜上并含有金属元素的中间绝缘膜，所述中间绝缘膜具有相对电介质大于7的常数，形成在中间绝缘膜上的上部氧化硅膜和形成在上部氧化硅膜上的上部氮化硅膜。

10. 发明申请

US20070241389A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20070241389A1
公开(公告)日：2007-10-18
申请号：US11783934
申请日：2007-04-13
申请人： Yoshio Ozawa , Akihito Yamamoto , Masayuki Tanaka , Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
发明人： Yoshio Ozawa , Akihito Yamamoto , Masayuki Tanaka , Katsuaki Natori , Katsuyuki Sekine , Daisuke Nishida , Ryota Fujitsuka
IPC分类号： H01L29/76
CPC分类号： H01L29/7883 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A semiconductor device includes a semiconductor substrate, a plurality of nonvolatile memory cells provided on the semiconductor substrate, each of the plurality of nonvolatile memory cells comprising a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a control gate electrode provided above the charge storage layer, a second insulating film provided between the control gate electrode and the charge storage layer, the second insulating film between adjacent charge storage layers including a first region having permittivity lower than that of the second insulating film on a top surface of the charge storage layer in a cross-section view of a channel width direction of the nonvolatile memory cell, and the first region having composition differing from that of the second insulating film on the top surface of the charge storage layer.
摘要翻译：半导体器件包括半导体衬底，设置在半导体衬底上的多个非易失性存储单元，所述多个非易失性存储单元中的每一个包括设置在所述半导体衬底上的第一绝缘膜，设置在所述第一绝缘膜上的电荷存储层，设置在所述电荷存储层上方的控制栅电极，设置在所述控制栅电极和所述电荷存储层之间的第二绝缘膜，所述相邻电荷存储层之间的所述第二绝缘膜包括具有低于所述第二绝缘膜的介电常数的第一区域在电荷存储层的顶表面上，以非易失性存储单元的沟道宽度方向的横截面视图，并且第一区域具有与电荷存储层的顶表面上的第二绝缘膜不同的组成。

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