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    • 1. 发明授权
    • Method of weighing and apparatus therefor
    • 称重方法及其设备
    • US3974888A
    • 1976-08-17
    • US502218
    • 1974-08-30
    • Katsuhiko MurakamiTetsuo IkedaMasahiro TakedaOsamu KazamaHidaka Nishinaka
    • Katsuhiko MurakamiTetsuo IkedaMasahiro TakedaOsamu KazamaHidaka Nishinaka
    • G01G11/00B07C5/28G01G13/00G01G13/32G01G19/387B07B13/08G01G19/52
    • G01G13/00G01G13/32
    • A method of weighing and an apparatus therefor, wherein articles varying in unit weight are continuously weighed by a single weighing machine to classify them into three ranks, one for articles having error weights outside the allowable error limits, another for articles having error weights plus-oriented inside the allowable error limits and the other for articles having error weights minus-oriented inside the allowable error limits, said articles having error weights outside the allowable error limits being rejected, said articles having plus-oriented and minus-oriented error weights inside the allowable error limits being separately pooled and their weights or error weights being allotted to two shift registers and memorized therein in correspondence to the pooling order, and arithmetic operations for combinations of said memorized values are performed to provide a combination of weights equal or most approximate to a predetermined weight. Other merits and details of the construction will be made clear.
    • 一种称重方法及其装置,其中以单位重量变化的制品通过单个称重机连续称重,将其分为三级,一类用于误差重量超出允许误差极限的物品,另一种用于具有误差加权值的物品, 在容许误差范围内定向,另一种是在容许误差范围内具有偏差减去的物品,所述物品具有超出允许误差极限的误差,所述物品在内部具有正向和负向的误差重量 允许的误差限制被分开汇总,并且它们的权重或误差权重被分配给两个移位寄存器并且与存储顺序相对应地存储在其中,并且执行用于所述存储值的组合的算术运算,以提供等于或最接近于 预定重量。 建设的其他优点和细节将会明确。
    • 2. 发明授权
    • Semiconductor failure analysis apparatus, failure analysis method, failure analysis program, and failure analysis system
    • 半导体故障分析装置,故障分析方法,故障分析程序和故障分析系统
    • US07752594B2
    • 2010-07-06
    • US11409273
    • 2006-04-24
    • Masahiro TakedaKazuhiro Hotta
    • Masahiro TakedaKazuhiro Hotta
    • G06F17/50
    • G01N21/956G06T7/0004G06T2207/30148
    • A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring at least a pattern image P1 of a semiconductor device, a layout information acquirer 12 for acquiring a layout image P3, a failure analyzer 13 for analyzing a failure of the semiconductor device, and an analysis screen display controller 14 for letting a display device 40 display information about the failure analysis. The analysis screen display controller 14 generates a superimposed image in which the pattern image P1 and the layout image P3 are superimposed, as an image of the semiconductor device to be displayed by the display device 40, and sets a transmittance of the layout image P3 relative to the pattern image P1 in the superimposed image. This substantializes a semiconductor failure analysis apparatus, analysis method, analysis program, and analysis system capable of securely and efficiently carrying out the analysis of the failure of the semiconductor device.
    • 故障分析装置10由用于获取至少半导体装置的图案图像P1的检查信息获取部11,用于获取布局图像P3的布局信息获取部12,用于分析半导体装置的故障的故障分析部13 以及用于使显示装置40显示关于故障分析的信息的分析屏幕显示控制器14。 分析画面显示控制器14生成将图案图像P1和布局图像P3重叠的叠加图像作为要由显示装置40显示的半导体器件的图像,并且将布局图像P3的透射率相对于 到叠加图像中的图案图像P1。 这实现了能够安全有效地进行半导体器件的故障分析的半导体故障分析装置,分析方法,分析程序和分析系统。
    • 4. 发明授权
    • Fuel injection system for engine
    • 发动机燃油喷射系统
    • US5058554A
    • 1991-10-22
    • US427646
    • 1989-10-27
    • Masahiro TakedaHideo Shiraishi
    • Masahiro TakedaHideo Shiraishi
    • F02M51/08F02M51/00F02M51/06F02M55/02F02M61/14F02M69/04F02M69/46F16B21/18H01R13/639
    • H01R13/639F02M51/005F02M61/145F02M69/465F16B21/186F02M2200/853
    • A fuel injection system for an engine has a plurality of bottom-feed type fuel injection valve assemblies. Each of the assemblies has an outer casing and an injector main body which is accommodated in the outer casing and is electrically operated. The outer casing is provided with a fuel inlet and a fuel outlet in communication with each other. A fuel supply pipe is connected to the fuel inlet of the upstreammost fuel injection valve assembly, and a fuel return pipe is connected to the fuel outlet of the downstreammost fuel injection valve assembly. A connection pipe connects the fuel outlet of each fuel injection valve assembly to the fuel inlet of the next fuel injection valve assembly. A wire harness for supplying power to the injector main body extends through a harness member which has a plurality of valve holders formed integrally therewith. Each valve holder is fixed to the upper portion of the outer casing by a fastener.
    • 用于发动机的燃料喷射系统具有多个底部进料型燃料喷射阀组件。 每个组件具有外壳和喷射器主体,其容纳在外壳中并被电操作。 外壳设置有彼此连通的燃料入口和燃料出口。 燃料供给管连接到最上游的燃料喷射阀组件的燃料入口,并且燃料返回管连接到最下游燃料喷射阀组件的燃料出口。 连接管将每个燃料喷射阀组件的燃料出口连接到下一个燃料喷射阀组件的燃料入口。 用于向喷射器主体供电的线束延伸穿过具有与其一体形成的多个阀支架的线束构件。 每个阀座通过紧固件固定在外壳的上部。
    • 5. 发明授权
    • Memory card having static electricity protection
    • 存储卡具有静电保护功能
    • US4532419A
    • 1985-07-30
    • US528467
    • 1983-09-01
    • Masahiro Takeda
    • Masahiro Takeda
    • G06K19/07G06K19/077H01L23/60H01L23/64H05K1/02H05K1/11G06K19/06
    • H01L23/60G06K19/07G06K19/07743H01L23/647H05K1/026H01L2224/48091H01L2224/48227H01L2924/3011H05K1/0219H05K1/117H05K2201/09354
    • A memory card includes a card support formed by two plastic boards; a printed circuit board mounted on the card support; an integrated circuit mounted on the printed circuit board and including a memory for storing information, a central processing unit for accessing the information, and access terminals connected to the memory and central processing unit for accessing the information from the memory; a plurality of connection terminals provided on an exposed surface of the printed circuit board; a common ground discharge pattern provided on the exposed surface of the printed circuit board and separated from the connection terminals by first discharge gaps; a plurality of lead terminals provided on a non-exposed surface of the printed circuit board and connected between respective ones of the connection terminals and respective ones of the access terminals of the integrated circuit; a second discharge pattern formed on the non-exposed surface and separated from the lead terminals by second discharge gaps such that undesirable static electricity supplied to the connection terminals on the exposed surface is discharged to the respective discharge patterns through the first and second discharge gaps.
    • 存储卡包括由两个塑料板形成的卡片支架; 安装在卡支架上的印刷电路板; 安装在印刷电路板上的集成电路,包括用于存储信息的存储器,用于访问信息的中央处理单元,以及连接到存储器的接入终端和用于从存储器访问信息的中央处理单元; 设置在印刷电路板的暴露表面上的多个连接端子; 在印刷电路板的暴露表面上提供的公共接地放电图案,并且通过第一放电间隙与连接端子分离; 多个引线端子,设置在所述印刷电路板的未露出的表面上并且连接在所述集成电路的各个所述连接端子和所述接入端子的各个之间; 第二放电图案形成在非暴露表面上并且通过第二放电间隙与引线端子分离,使得提供给暴露表面上的连接端子的不期望的静电通过第一和第二放电间隙被排放到各个放电图案。
    • 9. 发明授权
    • Recursive digital filter with less no-signal noise
    • 具有较少无信号噪声的递归数字滤波器
    • US4920507A
    • 1990-04-24
    • US387298
    • 1989-07-31
    • Masahiro Takeda
    • Masahiro Takeda
    • H03H17/04
    • H03H17/04
    • A recursive digital filter comprises an input terminal receiving an input signal, an output terminal for outputting a filtered signal, an offset value circuit for outputting a predetermined offset value, an adder having a first input connected to the input terminal and a second input connected to receive the predetermined offset value from the offset value circuit, and a recursive digital filter loop having an input connected to an output of the adder and an output connected to the output terminal. With this arrangement, the recursive digital filter loop receives the input signal added wtih the predetermined offset value, so that, even if the input signal is zero the recursive digital filter loop will process some signal which is not zero, and accordingly, the result of the processing of the recursive digital filter loop never becomes zero. Accordingly, the limit cycle caused due to accumulation of rounding error will not occur.
    • 递归数字滤波器包括接收输入信号的输入端,用于输出滤波信号的输出端,用于输出预定偏移值的偏移值电路,具有连接到输入端的第一输入的加法器和连接到输入端的第二输入 从偏移值电路接收预定的偏移值,以及递归数字滤波器回路,其具有连接到加法器的输出的输入端和连接到输出端子的输出。 通过这种布置,递归数字滤波器回路接收在预定偏移值上添加的输入信号,使得即使输入信号为零,递归数字滤波器回路将处理一些不为零的信号,因此, 递归数字滤波器循环的处理决不会变为零。 因此,不会发生由于舍入误差的积累引起的极限循环。