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    • 1. 发明授权
    • Digital neural network executed in integrated circuit technology
    • 数字神经网络在集成电路技术中执行
    • US5276773A
    • 1994-01-04
    • US374745
    • 1989-07-03
    • Karl KnauerUlrich RamacherJuergen PandelHans-Joerg Pfleiderer
    • Karl KnauerUlrich RamacherJuergen PandelHans-Joerg Pfleiderer
    • G06F15/18G06N3/04G06N3/063G06N99/00
    • G06N3/063
    • A digital neural network has a plurality of neurons (NR) completely meshed with one another, each of which comprises an evaluation stage having a plurality of evaluators (B) that is equal in number to the plurality of neurons (NR) and each of which comprises a decision stage having a decision unit (E). An adjustment information (INF.sub.E) that effects a defined pre-adjustment of the decision unit (E) can be supplied to every decision unit (E) by a pre-processing means via an information input. A weighting information (INF.sub.G) can be supplied to every evaluator (B) by a pre-processing means via an individual information input. An output information (INF.sub.A) can be output by every decision unit (E) to a post-processing means via a respective individual information output. The information outputs of the decision units (E) are each connected to an individual processing input of all evaluators (B) allocated to the appertaining decision unit (E). Individual processing outputs of the evaluators (B) are connected to individual processing inputs of the decision unit (E) in the appertaining neuron (N), so that every output information (INF.sub.A) can be indirectly fed back onto every neuron (NR).
    • 数字神经网络具有彼此完全啮合的多个神经元(NR),每个神经元(NR)包括评估阶段,其具有与多个神经元(NR)数目相等的多个评估器(B),其中每个 包括具有决定单元(E)的判定阶段。 可以通过预处理装置经由信息输入向每个判定单元(E)提供影响决定单元(E)的定义的预调整的调整信息(INFE)。 加密信息(INFG)可以通过预处理装置经由个人信息输入提供给每个评估者(B)。 输出信息(INFA)可以由每个决定单元(E)通过相应的个人信息输出输出到后处理装置。 决策单元(E)的信息输出各自连接到分配给独立决定单元(E)的所有评估者(B)的单独处理输入。 评估器(B)的单独处理输出连接到独立神经元(N)中的决策单元(E)的各个处理输入,使得每个输出信息(INFA)可被间接反馈到每个神经元(NR)。
    • 2. 发明授权
    • Transversal filter with at least one analogue shift register, and
process for the operation thereof
    • 具有至少一个模拟移位寄存器的横向滤波器及其操作的处理
    • US4163957A
    • 1979-08-07
    • US832232
    • 1977-09-12
    • Karl KnauerMax SchlichteHans-Joerg Pfleiderer
    • Karl KnauerMax SchlichteHans-Joerg Pfleiderer
    • H01L29/768H03H15/02H03H7/28G11C19/28H01L29/76H03K5/156
    • H03H15/02H01L29/76891H03H15/023
    • In illustrated embodiments, at least one analogue shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. The capacity of every storage position of the shift register is at least such that it is always able to accommodate the maximum quantity of charge supplied by the preceding storage position, and when the storage position has a parallel input, can additionally accommodate the maximum quantities of charge supplied by the associated evaluating circuit (s). Various modifications are disclosed for reducing the space requirement of a transversal filter when implemented, for example, as a CCD.
    • 在所示实施例中,至少一个模拟移位寄存器具有多个并行输入和一个串联输出。 多个单独的评估电路接收要滤波的信号,并提供相应的输出电荷量等于相关信号值与预定最小值或最大值之差的乘积,以及各自的评估因子。 每个评估电路的输出可以经由开关元件连接到相关联的并行输入。 移位寄存器的每个存储位置的容量至少使得其总是能够适应由先前存储位置提供的最大量的电荷,并且当存储位置具有并行输入时,可另外容纳最大量的 由相关联的评估电路提供的电荷。 公开了用于在实现例如CCD时减小横向滤波器的空间需求的各种修改。
    • 3. 发明授权
    • Information memory for storing information in the form of electric
charge carriers and method of operating thereof
    • US4064491A
    • 1977-12-20
    • US723312
    • 1976-09-15
    • Karl KnauerHans Joerg Pfleiderer
    • Karl KnauerHans Joerg Pfleiderer
    • G11C11/404H01L27/108H01L27/12H01L29/10H01L29/423H01L29/94G11C11/24
    • G11C11/404H01L27/10805H01L27/12H01L29/1062H01L29/42396H01L29/94
    • An information memory for storing information in the form of electric charge carriers has at least one dynamic storage element which is arranged upon a surface of at least one substrate made of semiconductor material and doped with a given basic type doping. The substrate connection is included and the memory comprises at least one MIS capacitor. Upon the substrate surface at least one electrically insulating layer is present which carries at least one capacitor electrode. The dynamic storage element comprises the MIS capacitor or an adjacent arrangement of several MIS capacitors, separated from one another by, at the most, narrow distances and comprises at least one contact area at the substrate surface which is provided with an externally accessible ohmic terminal contact, and which contacts at least the margin of the MIS capacitor or t least one of the MIS capacitors, nd which contains material having the basic type of doping. Within the electrically insulating layer, within the MIS capacitor or capacitors, the values of the numerical ratio .epsilon./d--whereby .epsilon. is the dielectric constant and d is the layer thickness of the electrically insulating layer--and/or the values of the surface density of the basic type of doping of the substrate in the area or in the areas of the MIS capacitor or capacitors and/or the values of the surface density, with respect to the surface of the substrate, of and adjacent to the substrate and doped opposite to the type of doping of the substrate layer, are selected differently with respect to location in such a way that, by the way of applying an electrode voltage, which may be given within a wide range between the substrate terminal and electrode, the local distribution of the amounts of the potential maximum between the range or within the ranges of the MIS capacitor or capacitor, comprises, laterally away from the contact area beginning at the side of the contact area, at least one increase from a minimum value to a maximum value.
    • 4. 发明授权
    • Transversal filter having parallel inputs
    • 具有并行输入的横向滤波器
    • US4539537A
    • 1985-09-03
    • US499483
    • 1983-05-31
    • Hans-Joerg PfleidererKarl Knauer
    • Hans-Joerg PfleidererKarl Knauer
    • H03H15/02
    • H03H15/023
    • A transversal filter with an analog shift register has a plurality of parallel inputs and a serial output at which a filtered signal appears. An object is to provide as simple as possible a realization of the n signal evaluators allocated to the n stages of the shift register. This is achieved by providing the n signal evaluators in a signal path proceeding from the input of the first stage over all n stages, and to evaluate according to evaluation factors b.sub.n through b.sub.1 which occur in the system functionH(z)=b.sub.o .multidot.(1+b.sub.1 z(1+b.sub.2 .multidot.z( . . . 1+b.sub.n .multidot.z)))describing the filtered signal, where z is the delay which the signal values respectively experience when traversing a stage of the shift register. The filter is employed as an analog filter in communication technology.
    • 具有模拟移位寄存器的横向滤波器具有多个并行输入和串行输出,滤波信号出现在该串行输出端。 目的是尽可能简单地提供分配给移位寄存器的n个级的n个信号评估器的实现。 这通过在从n个阶段的第一阶段的输入开始的信号路径中提供n个信号评估器来实现,并且根据系统函数H(z)=框(1)中发生的评估因子bn至b1来评估 + b1z(1 + b2xz(。... 1 + bnxz))),其中z是信号值在穿过移位寄存器的阶段时分别经历的延迟。 该滤波器用作通信技术中的模拟滤波器。
    • 5. 发明授权
    • Arrangement for the generating of pulse trains for charge-coupled
circuits
    • 用于产生电荷耦合电路的脉冲串的布置
    • US3987313A
    • 1976-10-19
    • US537073
    • 1974-12-30
    • Hans-Joerg PfleidererKarl Knauer
    • Hans-Joerg PfleidererKarl Knauer
    • G11C27/04G06F1/04H03K3/037H03K5/15H03K5/151H03K23/80H03K21/00H04B1/00
    • H03K5/15093H03K3/0372H03K5/1515
    • An arrangement for generating pulse trains for charged-coupled circuits employs a plurality of series-connected master-slave JK flip-flop circuits in which a Q output of a flip-flop circuit is connected to a J input of the following flip-flop circuit and in which a terminal for obtaining the generated timing pulses is provided at each Q output of a flip-flop circuit. A pulse train input for providing timing pulses to the flip-flop circuits and for each flip-flop circuit an NAND gate is provided whose output is connected to the clear input of the flip-flop circuit. One input of the NAND gate is connected to the timing pulse input line and another input is connected to a Q output of the following flip-flop circuit, except for the last flip-flop circuit in which the other input of the NAND gate associated therewith is connected to the Q output of the first flip-flop circuit. The K inputs of the flip-flop circuits are connected to a fixed potential, preferably a common connection to ground, and the individual flip-flop circuits may be additionally set by way of the clear inputs. In one embodiment the arrangement is constructed for two-phase operation and in another embodiment the arrangement is constructed for three-phase operation.
    • 用于产生用于充电耦合电路的脉冲串的布置采用多个串联的主从JK触发器电路,其中触发电路的Q输出连接到以下触发器电路的J输入 并且其中在触发器电路的每个Q输出处提供用于获得产生的定时脉冲的端子。 提供用于向触发器电路和每个触发器电路提供定时脉冲的脉冲序列输入,其NAND输出与触发电路的清零输入相连。 与非门的一个输入端连接到定时脉冲输入线,另外一个输入连接到下面的触发器电路的Q输出,除了最后的触发器电路,其中与其相关联的与非门的另一个输入 连接到第一触发器电路的Q输出端。 触发器电路的K个输入端连接到固定电位,最好是连接到地的公共连接,并且各个触发电路可以通过清除输入额外设置。 在一个实施例中,该装置被构造用于两相操作,并且在另一实施例中,该装置被构造用于三相操作。
    • 6. 发明授权
    • Transversal filter having an analog shift register
    • 具有模拟移位寄存器的横向滤波器
    • US4605913A
    • 1986-08-12
    • US508873
    • 1983-06-29
    • Hans-Joerg PfleidererKarl Knauer
    • Hans-Joerg PfleidererKarl Knauer
    • H03H15/02
    • H03H15/02
    • A transversal filter has an analog shift register exhibiting a series input and a plurality of parallel outputs which are connected to a summing and/or subtracting circuit. A simple realization of signal weighting circuits assigned to the stages of the shift register is achieved in that n signal weighting devices assigned to a group of n stages are disposed in a signal path which extends from the input of the first stage of the group over all stages thereof and in that the signal weighting devices of the n stages respectively weight according to filter coefficients b.sub.1 -b.sub.n which occur in the system functionH(z)=b.sub.0 .multidot.(1+b.sub.1 .multidot.z(1+b.sub.2 .multidot.z(. . . (1+b.sub.n .multidot.z))))determining the filtered signal, where z represents the delay time per stage for each signal value. The transversal filter of the invention is useful in analog filters of communications technology.
    • 横向滤波器具有呈现串联输入的模拟移位寄存器和连接到求​​和和/或减法电路的多个并行输出。 实现分配给移位寄存器的各级的信号加权电路的简单实现是,分配给一组n级的n个信号加权装置被布置在信号路径中,该信号路径从组的第一级的输入全部延伸 并且n阶段的信号加权装置分别根据在系统函数H(z)= b0x(1 + b1xz(1 + b2xz(...(1 + bxx(1))中出现的滤波器系数b1-bn来加权 ))))确定滤波信号,其中z表示每个信号值的每级的延迟时间。 本发明的横向滤波器在通信技术的模拟滤波器中是有用的。
    • 7. 发明授权
    • Input stage for a charge transfer device (CTD) arrangement
    • 电荷转移装置(CTD)布置的输入级
    • US4314163A
    • 1982-02-02
    • US219215
    • 1980-12-22
    • Karl KnauerHans-Joerg Pfleiderer
    • Karl KnauerHans-Joerg Pfleiderer
    • H03H15/02G11C27/04H01L21/339H01L27/14H01L27/146H01L29/423H01L29/762H01L29/768H03H15/00G11C19/28H01L29/78
    • H01L29/42396H01L29/76808
    • The invention relates to an input stage for a charge transfer device (CTD) arrangement which contains a source zone in a semiconductor body, two input electrodes, and a transfer gate, wherein one input gate is connected to a fixed voltage, and the other input gate is supplied with an analog input signal. In input stages of this kind, it is endeavored to evaluate the input signal within the widest possible limits without the need of altering the assigned semiconductor surface. The invention achieves this aim in that the input stage is divided into two input channels which possess different widths and which open into the CTD channel. A positive evaluation of the input signal is carried out via the first input channel, whereas a negative evaluation is carried out via the second input channel. The difference in area between the second input gate electrodes of the two input channels represents a gauge of the evaluation coefficient and can be kept very small. The range of application of the invention covers arbitrary CTD circuits, and in particular CTD transversal filters.
    • 本发明涉及一种用于电荷转移装置(CTD)布置的输入级,其包含半导体本体中的源极区,两个输入电极和传输门,其中一个输入栅极连接到固定电压,另一个输入 门提供模拟输入信号。 在这种输入级中,尽可能在最宽的范围内评估输入信号,而不需要改变分配的半导体表面。 本发明实现了这一目的,即输入级被分成具有不同宽度的两个输入通道,并且通向CTD通道。 通过第一输入通道进行对输入信号的肯定评估,而通过第二输入通道执行负评估。 两个输入通道的第二输入栅电极之间的面积差表示评价系数的量度,并且可以保持非常小。 本发明的应用范围涵盖任意CTD电路,特别是CTD横向滤波器。
    • 8. 发明授权
    • Transversal filter
    • 横向过滤器
    • US4200848A
    • 1980-04-29
    • US907011
    • 1978-05-18
    • Karl KnauerHans-Joerg Pfleiderer
    • Karl KnauerHans-Joerg Pfleiderer
    • G11C27/00H01L21/339H01L29/40H01L29/417H01L29/76H01L29/762H01L29/768H03H15/02H03H7/28G11C19/14H03H7/30H03K5/159
    • H03H15/023G11C27/00H01L29/40H01L29/76H01L29/76866H03H15/02
    • A transversal filter has at least one analog shift register which includes a number of parallel inputs and one series output. A further number of individual, predeterminable evaluator circuits are provided, each evaluator circuit having at least one signal input for the input of the signal to be filtered and at least one output, and each evaluator circuit comprises a pair of capacitors arranged on a surface of a substrate. The substrate has at least one substrate terminal and comprises doped semiconductor material which carries a first insulating layer or blocking layer capacitor which contacts an oppositely doped zone located on the surface of the substrate and which is provided with a terminal contact. A second insulating layer or blocking layer capacitor is arranged beside the first capacitor, the second capacitor connectible, via a switching element, to an associated parallel input. At least one evaluator circuit is designed such that its doped zone has a recess into which the first insulating layer or blocking layer capacitor is disposed, the first capacitor likewise having a recess into which the second capacitor is disposed so that the second capacitor is surrounded by the doped zone and by the first capacitor.
    • 横向滤波器具有至少一个模拟移位寄存器,其包括多个并行输入和一个串联输出。 提供了另外数量的单个可预定的评估器电路,每个评估器电路具有用于输入待滤波的信号和至少一个输出的至少一个信号输入,并且每个评估器电路包括一对电容器,其布置在 底物。 衬底具有至少一个衬底端子,并且包括掺杂半导体材料,该掺杂半导体材料携带第一绝缘层或阻挡层电容器,该第一绝缘层或阻挡层电容器接触位于衬底表面上并且具有端子触点的相对掺杂区。 第二绝缘层或阻挡层电容器设置在第一电容器旁边,第二电容器经由开关元件连接到相关的并行输入端。 至少一个评估器电路被设计成使得其掺杂区具有设置有第一绝缘层或阻挡层电容器的凹槽,第一电容器同样具有凹槽,第二电容器被设置在该凹槽中,使得第二电容器被 掺杂区和第一电容。
    • 9. 发明授权
    • Transversal filter having parallel inputs
    • 具有并行输入的横向滤波器
    • US4231002A
    • 1980-10-28
    • US17242
    • 1979-03-05
    • Karl KnauerHans-Joerg Pfleiderer
    • Karl KnauerHans-Joerg Pfleiderer
    • H01L29/768H03H15/02H03H7/28G11C19/28H03H7/10H03K5/156
    • H03H15/023H01L29/76808
    • A transversal filter is disclosed in which the stages of an analog charge transfer device shift register, integrated on a doped semiconductor substrate, are provided with parallel inputs and evaluation circuits preconnected to the parallel inputs. The evaluation circuits respectively exhibit an area doped opposite to the substrate, a first input gate and a second input gate and a transfer gate, whereby the transfer gate is arranged immediately next to the transfer channel of the charge transfer device shift register. The one input gate is connected to an input signal, the other input gate is connected to a constant direct voltage, the oppositely doped area is connected to a first clock pulse voltage and the transfer gate is connected with a second clock pulse voltage. The output signal can be tapped at an output of the charge transfer device shift register. Comparators are provided having first inputs connected with a counter which is loaded with clock pulses and second inputs connected with digital memories. The outputs of the comparators are connected to the gate circuits which block the evaluation circuits to one of the supply clock pulse voltages as a function of the respective comparison results between the counter signal, on the one hand, and the digital signals input into the memories, on the other hand.
    • 公开了一种横向滤波器,其中集成在掺杂半导体衬底上的模拟电荷转移装置移位寄存器的级设置有预先连接到并行输入的并行输入和评估电路。 评估电路分别表现出与衬底相反掺杂的区域,第一输入栅极和第二输入栅极和传输栅极,由此传输栅极紧邻电荷转移器件移位寄存器的传输沟道布置。 一个输入栅极连接到输入信号,另一个输入栅极连接到恒定的直流电压,相反的掺杂区域连接到第一个时钟脉冲电压,传输门极与第二个时钟脉冲电压连接。 输出信号可以在电荷转移装置移位寄存器的输出端被抽头。 提供比较器,其具有与装载有时钟脉冲的计数器连接的第一输入和与数字存储器连接的第二输入。 比较器的输出端连接到栅极电路,栅极电路根据计数器信号与输入到存储器中的数字信号之间的各自比较结果的函数,将评估电路阻挡到一个电源时钟脉冲电压 , 另一方面。