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1. 发明授权

US07060092B2 Deployable stent 失效
标题翻译：可部署支架
公开(公告)号：US07060092B2
公开(公告)日：2006-06-13
申请号：US10473232
申请日：2002-03-27
申请人： Kaori Kuribayashi , Zhong You
发明人： Kaori Kuribayashi , Zhong You
IPC分类号： A61F2/06
CPC分类号： A61F2/82 , A61F2/07 , A61F2/844 , A61F2/90 , A61F2210/0076 , A61F2230/005
摘要： A stent 1 comprising a sheet 2 of biocompatible material arranged as a tube and having a pattern of folds allowing the stent to be collapsed for deployment. The pattern of folds comprises a unit cell repeated over the sheet 2. A variety of different unit cells 3 are described. The pattern of folds may progress helically around the tube which assists in implantation by synchronising deployment. The stent 1 prevents restenosis because it is formed of a continuous sheet 2, and allows slippage to be minimised.
摘要翻译：一种支架1，其包括布置成管的生物相容性材料的片材2，并且具有允许支架折叠以展开的折叠图案。折叠图案包括在片材2上重复的单元电池。描述了各种不同的单元电池3。折叠的图案可以在管周围螺旋地进行，这有助于通过同步部署来植入。支架1防止再狭窄，因为它由连续的片材2形成，并允许滑动最小化。

2. 发明申请

US20060252624A1 Deployable stent 审中-公开
标题翻译：可部署支架
公开(公告)号：US20060252624A1
公开(公告)日：2006-11-09
申请号：US11410299
申请日：2006-04-25
申请人： Kaori Kuribayashi , Zhong You
发明人： Kaori Kuribayashi , Zhong You
IPC分类号： B31B3/00
CPC分类号： A61F2/82 , A61F2/07 , A61F2/844 , A61F2/90 , A61F2210/0076 , A61F2230/005
摘要： A stent 1 comprises a sheet 2 of biocompatible material having a tubular shape and folded with a pattern of folds allowing the sheet 2 to be collapsed for deployment. The pattern of folds comprises a unit cell repeated over the sheet 2. A variety of different unit cells 3 are described. The pattern of folds may progress helically around the tubular shape of the sheet 2 which assists in implantation by synchronising deployment. The stent 1 further comprises a frame extending around the tubular shape of the sheet 2 and reinforcing the sheet 2. The frame comprises a plurality of elongate members arranged to fold relative to each other in conformity with the sheet 2 to allow the frame to be collapsed with the sheet 2 for deployment of the stent 1. The stent 1 prevents tissue in-growth because it is formed of a continuous sheet 2.
摘要翻译：支架1包括具有管状形状的生物相容性材料片2，并折叠成允许片材2折叠以展开的折叠图案。折叠图案包括在片材2上重复的单元电池。描述了各种不同的单元电池3。折叠图案可以围绕片材2的管状形状螺旋形地进行，这有助于通过同步展开进行植入。支架1还包括围绕片材2的管状形状延伸并且增强片材2的框架。框架包括多个细长构件，其布置成与片材2一致地相对于彼此折叠，以允许框架与用于展开支架1的片材2折叠。支架1防止组织生长，因为它由连续片材2形成。

3. 发明授权

US07711974B1 SCLK auto-detection and generation in various serial port modes 有权
标题翻译： SCLK自动检测和生成各种串口模式
公开(公告)号：US07711974B1
公开(公告)日：2010-05-04
申请号：US11540443
申请日：2006-09-29
申请人： Zhong You , Jieren Bian
发明人： Zhong You , Jieren Bian
IPC分类号： G06F1/00 , H03M1/66
CPC分类号： G06F1/04
摘要： An apparatus and a method for clock mode determination utilizing SCLK auto-detection and generation circuitry at a serial port which has a reduced number of pin-count by eliminating the need for inputting a master input clock signal MCLK and/or a serial input clock signal SCLK. The SCLK auto-detection and generation circuitry includes a SCLK detector circuit, a serial mode detector circuit, an internal SCLK generator circuit, a multiplexer, and an edge detector circuit. The SCLK detector circuit is used to detect whether an external serial clock signal is present and to generate a selection signal. The serial mode detector is used to detect whether an incoming data signal is in a non-TDM mode or a TDM mode and to generate a mode signal.
摘要翻译：一种在串行端口使用SCLK自动检测和产生电路的时钟模式确定的装置和方法，该串行端口通过不需要输入主输入时钟信号MCLK和/或串行输入时钟信号而减少引脚数量 SCLK。 SCLK自动检测和生成电路包括一个SCLK检测器电路，一个串行模式检测器电路，一个内部SCLK发生器电路，一个多路复用器和一个边沿检测电路。 SCLK检测器电路用于检测外部串行时钟信号是否存在并产生选择信号。串行模式检测器用于检测输入数据信号是处于非TDM模式还是TDM模式，并产生模式信号。

4. 发明授权

US07277035B1 Method and apparatus for reducing noise in a digital-to-analog converter (DAC) having a chopper output stage 有权
标题翻译：具有斩波输出级的数/模转换器（DAC）中的噪声降低方法和装置
公开(公告)号：US07277035B1
公开(公告)日：2007-10-02
申请号：US11428108
申请日：2006-06-30
申请人： Zhong You , Brian David Trotter , John L. Melanson
发明人： Zhong You , Brian David Trotter , John L. Melanson
IPC分类号： H03M1/66
CPC分类号： H03M3/34 , H03M3/504
摘要： A method and apparatus for reducing noise in a digital-to-analog converter (DAC) having a chopper amplifier output stage provides improved DAC performance. A switched-current output provided from a digital filter is coupled to the input of a chopper amplifier. The current switches are non-uniform, so that extra zeros are provided at the chopping frequency of the chopping amplifier, thereby reducing noise that would otherwise be aliased in-band at the output of the chopper amplifier. The current switches may include a first set of half-magnitude switches followed by a set of full-magnitude switches and finally by another set of half-magnitude switches having a size equal to that of the first set.
摘要翻译：用于降低具有斩波放大器输出级的数模转换器（DAC）中的噪声的方法和装置提供改进的DAC性能。从数字滤波器提供的开关电流输出耦合到斩波放大器的输入端。电流开关是不均匀的，因此在斩波放大器的斩波频率处提供额外的零，从而减少否则将在斩波放大器的输出处带内的混叠噪声。电流开关可以包括第一组半幅度开关，随后是一组全幅度开关，最后还包括具有等于第一组尺寸的另一组半幅度开关。

5. 发明授权

US07190197B1 Clock phase detector for noise management 有权
标题翻译：时钟相位检测器进行噪声管理
公开(公告)号：US07190197B1
公开(公告)日：2007-03-13
申请号：US10949970
申请日：2004-09-24
申请人： Zhong You , Trenton John Grale
发明人： Zhong You , Trenton John Grale
IPC分类号： H03L7/00
CPC分类号： H03M1/0827 , G11C27/02 , H03M1/1245 , H03M3/368 , H03M3/458
摘要： Clock signal control circuitry including a selector for selecting between a first clock signal and an inverse of the first clock signal and a phase detector for determining a phase relationship between the first clock signal and the second clock signal and in response causing the selector to select between the first clock signal and the inverse of the first clock signal.
摘要翻译：时钟信号控制电路包括用于在第一时钟信号和第一时钟信号的反相之间进行选择的选择器和用于确定第一时钟信号和第二时钟信号之间的相位关系的相位检测器，并且响应于使选择器在第一时钟信号和第一时钟信号的反相。

6. 发明申请

US20150190256A1 STENT AND METHOD OF INSERTING A STENT INTO A DELIVERY CATHETER 有权
标题翻译：将固定在输送管中的固定方法和方法
公开(公告)号：US20150190256A1
公开(公告)日：2015-07-09
申请号：US14343522
申请日：2012-09-07
申请人： Xiang Zhou , Zhong You , James Byrne
发明人： Xiang Zhou , Zhong You , James Byrne
IPC分类号： A61F2/90
CPC分类号： A61F2/844 , A61F2/90 , A61F2/91 , A61F2/915 , A61F2002/823 , A61F2002/9522 , A61F2210/0014 , A61F2210/0019 , A61F2230/0054 , A61F2250/0023
摘要： Stents and method of inserting a stent into a delivery catheter are disclosed. In a disclosed embodiment, a stent for redirecting blood flow away from an aneurysmal sac is provided. The stent comprises an elongate frame (2) that is radially contractable from a fully radially expanded state to a radially contracted state in a process involving elongation of the frame, wherein: the fully radially expanded state represents the state of the frame at body temperature when no external force is applied to the frame; in the radially contracted state the frame has a maximum lateral dimension that is at least 30% smaller than the maximum lateral dimension of the frame in the fully radially expanded state; and the frame comprises a low porosity region (4) for positioning at the opening to the aneurysmal sac, the low porosity region having a porosity of less than 50% when the frame is in the fully radially expanded state.
摘要翻译：公开了将支架插入输送导管的支架和方法。在公开的实施例中，提供了用于将血液流动从动脉瘤囊重新定向的支架。支架包括细长框架（2），其在涉及框架伸长的过程中从完全径向扩张状态径向收缩到径向收缩状态，其中：完全径向扩张状态表示框架在体温时的状态，没有外力施加到框架上; 在径向收缩状态下，框架具有比完全放大状态下的框架的最大横向尺寸小至少30％的最大横向尺寸; 并且所述框架包括用于定位在所述动脉瘤囊的开口处的低孔隙率区域（4），当所述框架处于完全径向膨胀状态时，所述低孔隙率区域具有小于50％的孔隙率。

7. 发明授权

US07746972B1 Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment 有权
标题翻译：具有输入定时参考相关比例调节的数控锁相环
公开(公告)号：US07746972B1
公开(公告)日：2010-06-29
申请号：US11689729
申请日：2007-03-22
申请人： John L. Melanson , Zhong You , Scott Allan Woodford , Steven Randall Green
发明人： John L. Melanson , Zhong You , Scott Allan Woodford , Steven Randall Green
IPC分类号： H03D3/24
CPC分类号： H03L7/148 , H03L7/0994 , H03L7/10 , H03L7/1976 , H03L2207/50
摘要： A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.
摘要翻译：具有输入时钟相关比率调整的数字控制锁相环路提供锁定到宽范围频率和/或在缺少或降级的输入定时参考的情况下的较窄带宽环路。定时参考特征检测器确定输入定时参考信号的输入频率范围，定时参考的数据类型和/或是否存在足够质量的定时参考信号。数字振荡器由数值比例控制，数值比被调节以提供符合检测到的频率范围和/或数据类型的所需时钟频率输出。如果定时参考信号不存在或劣化，则可以将数值比设置为固定值，或者可以应用本地定时参考以产生所需的时钟输出频率。

8. 发明授权

US07668279B1 Signal processing system with low bandwidth phase-locked loop 有权
标题翻译：具有低带宽锁相环的信号处理系统
公开(公告)号：US07668279B1
公开(公告)日：2010-02-23
申请号：US11427910
申请日：2006-06-30
申请人： Zhong You , Hua Hong , Jeff Baumgartner , Jieren Bian
发明人： Zhong You , Hua Hong , Jeff Baumgartner , Jieren Bian
IPC分类号： H03D3/24
CPC分类号： H03L7/093
摘要： A signal processing system includes a phase-locked loop to provide an output signal used, for example, as a delta sigma modulator operating clock signal. In at least one embodiment, a frame clock that provides synchronization for one or more blocks of data is used by the phase-locked loop as a reference signal. Utilizing the frame clock as the reference signal allows the signal processing system to reduce the number of clock signals present in the signal processing system. In another embodiment, a phase-locked loop includes a loop filter that utilizes a sample and reset circuit, a feed forward integrator, and a feed forward stabilizer to provide a low frequency phase-locked loop bandwidth. In at least one embodiment, the feed forward integrator amplifies capacitance of the sample and reset circuit, which reduces the size of loop filter capacitors and, thus, allows on-chip capacitor integration.
摘要翻译：信号处理系统包括锁相环，以提供例如作为Δ-Σ调制器操作时钟信号使用的输出信号。在至少一个实施例中，为一个或多个数据块提供同步的帧时钟由锁相环用作参考信号。利用帧时钟作为参考信号，允许信号处理系统减少信号处理系统中存在的时钟信号的数量。在另一个实施例中，锁相环包括利用采样和复位电路的环路滤波器，前馈积分器和前馈稳定器，以提供低频锁相环带宽。在至少一个实施例中，前馈积分器放大样品和复位电路的电容，这减小了环路滤波电容器的尺寸，因此允许片上电容器集成。

9. 发明授权

US09301861B2 Stent and method of inserting a stent into a delivery catheter 有权
标题翻译：将支架插入输送导管的支架和方法
公开(公告)号：US09301861B2
公开(公告)日：2016-04-05
申请号：US14343522
申请日：2012-09-07
申请人： Xiang Zhou , Zhong You , James Byrne
发明人： Xiang Zhou , Zhong You , James Byrne
IPC分类号： A61F2/90 , A61F2/91 , A61F2/915 , A61F2/82 , A61F2/95
CPC分类号： A61F2/844 , A61F2/90 , A61F2/91 , A61F2/915 , A61F2002/823 , A61F2002/9522 , A61F2210/0014 , A61F2210/0019 , A61F2230/0054 , A61F2250/0023
摘要： Stents and method of inserting a stent into a delivery catheter are disclosed. In a disclosed embodiment, a stent for redirecting blood flow away from an aneurysmal sac is provided. The stent comprises an elongate frame (2) that is radially contractable from a fully radially expanded state to a radially contracted state in a process involving elongation of the frame, wherein: the fully radially expanded state represents the state of the frame at body temperature when no external force is applied to the frame; in the radially contracted state the frame has a maximum lateral dimension that is at least 30% smaller than the maximum lateral dimension of the frame in the fully radially expanded state; and the frame comprises a low porosity region (4) for positioning at the opening to the aneurysmal sac, the low porosity region having a porosity of less than 50% when the frame is in the fully radially expanded state.
摘要翻译：公开了将支架插入输送导管的支架和方法。在公开的实施例中，提供了用于将血液流动从动脉瘤囊重新定向的支架。支架包括细长框架（2），其在涉及框架伸长的过程中从完全径向扩张状态径向收缩到径向收缩状态，其中：完全径向扩张状态表示框架在体温时的状态，没有外力施加到框架上; 在径向收缩状态下，框架具有比完全放大状态下的框架的最大横向尺寸小至少30％的最大横向尺寸; 并且所述框架包括用于定位在所述动脉瘤囊的开口处的低孔隙率区域（4），当所述框架处于完全径向膨胀状态时，所述低孔隙率区域具有小于50％的孔隙率。

10. 发明授权

US08022688B2 RF power detector 有权
标题翻译：射频功率检测器
公开(公告)号：US08022688B2
公开(公告)日：2011-09-20
申请号：US12366734
申请日：2009-02-06
申请人： Zhong You
发明人： Zhong You
IPC分类号： G01R17/00
CPC分类号： G01R21/002 , H03F3/195 , H03F3/245 , H03F2200/207 , H03F2200/391 , H03F2200/399 , H03F2200/451 , H03G3/3042
摘要： Real power delivered to a load in an RF transmit path is measured. Measuring the real power includes supplying a first voltage from a first side of a passive network disposed between the power amplifier and the load, supplying a second voltage from a second side of the passive network; and using the first and second voltages and a phase delayed voltage to determine the real power delivered to the load. A voltage difference between the first and second voltages is determined and multiplied by the phase shifted voltage. A low pass filter is then applied to the output of the multiplier to provide an indication of the real power consumed by the load. The indication of real power consumed may then be used to control the power amplifier.
摘要翻译：测量传送到RF发射路径中的负载的实际功率。测量实际功率包括从设置在功率放大器和负载之间的无源网络的第一侧提供第一电压，从无源网络的第二侧提供第二电压; 并且使用第一和第二电压和相位延迟电压来确定传送到负载的实际功率。确定第一和第二电压之间的电压差并乘以相移电压。然后将低通滤波器应用于乘法器的输出，以提供负载所消耗的实际功率的指示。然后可以使用消耗的实际功率的指示来控制功率放大器。

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